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author | Sunil Shetye | 2019-03-11 12:11:24 +0530 |
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committer | Sunil Shetye | 2019-07-01 17:41:27 +0530 |
commit | 5e116a4676854289fabeb6cce57f3d01ae8f5709 (patch) | |
tree | 317985a949497440e3bb98ac07ab0e2a0d5a9a1c /src/SubcircuitLibrary/scr/scr.cir.out~ | |
parent | e9064e423b586c2a31926fb5a1e582e8d1f626f8 (diff) | |
download | eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.tar.gz eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.tar.bz2 eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.zip |
remove temporary files
Diffstat (limited to 'src/SubcircuitLibrary/scr/scr.cir.out~')
-rw-r--r-- | src/SubcircuitLibrary/scr/scr.cir.out~ | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/SubcircuitLibrary/scr/scr.cir.out~ b/src/SubcircuitLibrary/scr/scr.cir.out~ deleted file mode 100644 index d600f25d..00000000 --- a/src/SubcircuitLibrary/scr/scr.cir.out~ +++ /dev/null @@ -1,29 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/scr/scr.cir - -.include PowerDiode.lib -* u2 3 7 1 port -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 (1 6) u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -.tran 0e-12 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end |