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| author | fossee | 2019-08-29 12:03:11 +0530 |
|---|---|---|
| committer | fossee | 2019-08-29 12:03:11 +0530 |
| commit | fe3bd934634bb2dae1cadf35e7c6d59facbedf66 (patch) | |
| tree | ab841ad9ca3d56f7eb85cb3650f6608b80656027 /src/SubcircuitLibrary/scr/scr.cir.ckt | |
| parent | f7567ac99f21fb6c87d60f309f0aa71dee6ae975 (diff) | |
| download | eSim-fe3bd934634bb2dae1cadf35e7c6d59facbedf66.tar.gz eSim-fe3bd934634bb2dae1cadf35e7c6d59facbedf66.tar.bz2 eSim-fe3bd934634bb2dae1cadf35e7c6d59facbedf66.zip | |
adding files
Diffstat (limited to 'src/SubcircuitLibrary/scr/scr.cir.ckt')
| -rw-r--r-- | src/SubcircuitLibrary/scr/scr.cir.ckt | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/scr/scr.cir.ckt b/src/SubcircuitLibrary/scr/scr.cir.ckt new file mode 100644 index 00000000..ec994b75 --- /dev/null +++ b/src/SubcircuitLibrary/scr/scr.cir.ckt @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: 08/21/14 11:07:22 +.include diode.lib + +u2 5 8 1 port +* f2 +* Analog Switch analogswitch +d1 4 2 diode +v2 3 4 dc 0 +c1 5 6 10u +r2 5 6 1 +* f1 +v1 9 7 dc 0 +r1 8 9 50 +Vf2 2 5 0 +f2 5 6 Vf2 100 +Vf1 7 5 0 +f1 5 6 Vf1 10 +a1 6 (1 3) u1 +.model u1 aswitch(cntl_on=0.25 cntl_off=0.1 r_on=0.0125 r_off=1000000) |