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| author | fahim | 2015-07-28 14:16:32 +0530 |
|---|---|---|
| committer | fahim | 2015-07-28 14:16:32 +0530 |
| commit | 7cdabba6ca27643fc290c6fada8c8fa333e7f8fb (patch) | |
| tree | 38c1cb7101ccb2e1b88861c3a4f1939703ece88f /src/SubcircuitLibrary/full_adder/half_adder.sub | |
| parent | 1c21a0ad49a75671a9fd775463ab6e6e6f3a8e36 (diff) | |
| download | eSim-7cdabba6ca27643fc290c6fada8c8fa333e7f8fb.tar.gz eSim-7cdabba6ca27643fc290c6fada8c8fa333e7f8fb.tar.bz2 eSim-7cdabba6ca27643fc290c6fada8c8fa333e7f8fb.zip | |
Subject: Added subcircuit for Half Adder and Full Adder.
Description: Added subcircuit for Half Adder and Full Adder.
Diffstat (limited to 'src/SubcircuitLibrary/full_adder/half_adder.sub')
| -rw-r--r-- | src/SubcircuitLibrary/full_adder/half_adder.sub | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/full_adder/half_adder.sub b/src/SubcircuitLibrary/full_adder/half_adder.sub new file mode 100644 index 00000000..e9f92223 --- /dev/null +++ b/src/SubcircuitLibrary/full_adder/half_adder.sub @@ -0,0 +1,14 @@ +* Subcircuit half_adder +.subckt half_adder 1 4 3 2 +* eeschema netlist version 1.1 (spice format) creation date: wed jun 24 11:31:48 2015 +* u2 1 4 3 d_xor +* u3 1 4 2 d_and +a1 [1 4 ] 3 u2 +a2 [1 4 ] 2 u3 +* Schematic Name: d_xor, NgSpice Name: d_xor +.model u2 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Control Statements + +.ends half_adder
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