summaryrefslogtreecommitdiff
path: root/src/SubcircuitLibrary/7485/c_gate.cir
diff options
context:
space:
mode:
authorsaurabhb172019-07-02 17:08:16 +0530
committerGitHub2019-07-02 17:08:16 +0530
commit83d93769478a1805083666479d4ff83b875ba955 (patch)
treed97a2f3543ab4e5164490495ee19f20352ecb71f /src/SubcircuitLibrary/7485/c_gate.cir
parent29dc2de214a60216e62d80dfa3e5cbd998c2d6ee (diff)
parent8c44f97b533607d057a28e029e42f001270f4fd4 (diff)
downloadeSim-83d93769478a1805083666479d4ff83b875ba955.tar.gz
eSim-83d93769478a1805083666479d4ff83b875ba955.tar.bz2
eSim-83d93769478a1805083666479d4ff83b875ba955.zip
Merge pull request #115 from nilshah98/ese
Adding the work done by FSF 2019 eSim ECE Fellows
Diffstat (limited to 'src/SubcircuitLibrary/7485/c_gate.cir')
-rw-r--r--src/SubcircuitLibrary/7485/c_gate.cir19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/7485/c_gate.cir b/src/SubcircuitLibrary/7485/c_gate.cir
new file mode 100644
index 00000000..865e4229
--- /dev/null
+++ b/src/SubcircuitLibrary/7485/c_gate.cir
@@ -0,0 +1,19 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\c_gate\c_gate.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 19:11:36
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1 Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U8-Pad1_ 5_and
+U8 Net-_U8-Pad1_ Net-_U7-Pad2_ Net-_U1-Pad7_ d_and
+U2 Net-_U1-Pad1_ Net-_U2-Pad2_ d_inverter
+U3 Net-_U1-Pad2_ Net-_U3-Pad2_ d_inverter
+U4 Net-_U1-Pad3_ Net-_U4-Pad2_ d_inverter
+U5 Net-_U1-Pad4_ Net-_U5-Pad2_ d_inverter
+U6 Net-_U1-Pad5_ Net-_U6-Pad2_ d_inverter
+U7 Net-_U1-Pad6_ Net-_U7-Pad2_ d_inverter
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ PORT
+
+.end