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| author | nilshah98 | 2019-07-02 16:42:20 +0530 |
|---|---|---|
| committer | nilshah98 | 2019-07-02 16:46:12 +0530 |
| commit | b085a3df519debbc99acf4ded7e118a1690d6665 (patch) | |
| tree | 0fc3e5389c2a77a97d1a065875fe87ddee2c23f4 /src/SubcircuitLibrary/7485/c_gate-cache.lib | |
| parent | e7cd941bc4a48ff8684e4db6b9dff0efeb51fa6e (diff) | |
| download | eSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.gz eSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.bz2 eSim-b085a3df519debbc99acf4ded7e118a1690d6665.zip | |
Subcircuit added by ECE fellows 2019
Diffstat (limited to 'src/SubcircuitLibrary/7485/c_gate-cache.lib')
| -rw-r--r-- | src/SubcircuitLibrary/7485/c_gate-cache.lib | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/7485/c_gate-cache.lib b/src/SubcircuitLibrary/7485/c_gate-cache.lib new file mode 100644 index 00000000..e83bf18b --- /dev/null +++ b/src/SubcircuitLibrary/7485/c_gate-cache.lib @@ -0,0 +1,95 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 5_and
+#
+DEF 5_and X 0 40 Y Y 1 F N
+F0 "X" 1350 800 60 H V C CNN
+F1 "5_and" 1400 1050 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 1400 900 255 787 -787 0 1 0 N 1450 1150 1450 650
+P 2 0 1 0 1050 1150 1450 1150 N
+P 3 0 1 0 1050 1150 1050 650 1450 650 N
+X in1 1 850 1100 200 R 50 50 1 1 I
+X in2 2 850 1000 200 R 50 50 1 1 I
+X in3 3 850 900 200 R 50 50 1 1 I
+X in4 4 850 800 200 R 50 50 1 1 I
+X in5 5 850 700 200 R 50 50 1 1 I
+X out 6 1850 900 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+#End Library
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