diff options
author | rahulp13 | 2020-02-14 15:16:35 +0530 |
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committer | rahulp13 | 2020-02-14 15:16:35 +0530 |
commit | cb55e59de7ee4383c04edfae7c39ad9ae9552b36 (patch) | |
tree | de1b292a10e8196689bf1a208fe6fe32f4618846 /src/SubcircuitLibrary/7485/5_and.pro | |
parent | 08d4a0336550a0e610709970a0c5d366e109fe82 (diff) | |
download | eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.gz eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.bz2 eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.zip |
common code for Win and Linux, merged py2 changes
Diffstat (limited to 'src/SubcircuitLibrary/7485/5_and.pro')
-rw-r--r-- | src/SubcircuitLibrary/7485/5_and.pro | 100 |
1 files changed, 50 insertions, 50 deletions
diff --git a/src/SubcircuitLibrary/7485/5_and.pro b/src/SubcircuitLibrary/7485/5_and.pro index a9d6304f..c82e4e6d 100644 --- a/src/SubcircuitLibrary/7485/5_and.pro +++ b/src/SubcircuitLibrary/7485/5_and.pro @@ -1,50 +1,50 @@ -update=06/01/19 11:31:03
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=cypress
-LibName2=siliconi
-LibName3=opto
-LibName4=atmel
-LibName5=contrib
-LibName6=valves
-LibName7=eSim_Analog
-LibName8=eSim_Devices
-LibName9=eSim_Digital
-LibName10=eSim_Hybrid
-LibName11=eSim_Miscellaneous
-LibName12=eSim_Plot
-LibName13=eSim_Power
-LibName14=eSim_PSpice
-LibName15=eSim_Sources
-LibName16=eSim_Subckt
-LibName17=eSim_User
+update=03/26/19 18:50:27 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=cypress +LibName2=siliconi +LibName3=opto +LibName4=atmel +LibName5=contrib +LibName6=valves +LibName7=eSim_Analog +LibName8=eSim_Devices +LibName9=eSim_Digital +LibName10=eSim_Hybrid +LibName11=eSim_Miscellaneous +LibName12=eSim_Plot +LibName13=eSim_Power +LibName14=eSim_PSpice +LibName15=eSim_Sources +LibName16=eSim_Subckt +LibName17=eSim_User |