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| author | Rahul P | 2020-03-04 17:01:11 +0530 |
|---|---|---|
| committer | GitHub | 2020-03-04 17:01:11 +0530 |
| commit | 8ffe81b36caa259151978de0434e4e0c5c32d217 (patch) | |
| tree | 32202454d13dfabbf6556e98987f2a9632619ea9 /src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir | |
| parent | e40317e709c220176fc5b7edf23d4434504335b0 (diff) | |
| parent | 13f3bcfda9416624cebbf5705de398e8efcad344 (diff) | |
| download | eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.gz eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.bz2 eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.zip | |
Merge pull request #132 from rahulp13/master
major changes
Diffstat (limited to 'src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir')
| -rw-r--r-- | src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir deleted file mode 100644 index ea7aed36..00000000 --- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir +++ /dev/null @@ -1,16 +0,0 @@ -* C:\esim\eSim\src\SubcircuitLibrary\Full-Adder\Full-Adder.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/21/19 17:15:52
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ PORT
-U2 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_xor
-U5 Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_xor
-U4 Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U4-Pad3_ d_and
-U3 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U3-Pad3_ d_and
-U6 Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U1-Pad5_ d_or
-
-.end
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