summaryrefslogtreecommitdiff
path: root/src/SubcircuitLibrary/4to16_demux/5_nand.sub
diff options
context:
space:
mode:
authorsaurabhb172019-07-02 17:08:16 +0530
committerGitHub2019-07-02 17:08:16 +0530
commit83d93769478a1805083666479d4ff83b875ba955 (patch)
treed97a2f3543ab4e5164490495ee19f20352ecb71f /src/SubcircuitLibrary/4to16_demux/5_nand.sub
parent29dc2de214a60216e62d80dfa3e5cbd998c2d6ee (diff)
parent8c44f97b533607d057a28e029e42f001270f4fd4 (diff)
downloadeSim-83d93769478a1805083666479d4ff83b875ba955.tar.gz
eSim-83d93769478a1805083666479d4ff83b875ba955.tar.bz2
eSim-83d93769478a1805083666479d4ff83b875ba955.zip
Merge pull request #115 from nilshah98/ese
Adding the work done by FSF 2019 eSim ECE Fellows
Diffstat (limited to 'src/SubcircuitLibrary/4to16_demux/5_nand.sub')
-rw-r--r--src/SubcircuitLibrary/4to16_demux/5_nand.sub12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.sub b/src/SubcircuitLibrary/4to16_demux/5_nand.sub
new file mode 100644
index 00000000..c3e041fa
--- /dev/null
+++ b/src/SubcircuitLibrary/4to16_demux/5_nand.sub
@@ -0,0 +1,12 @@
+* Subcircuit 5_nand
+.subckt 5_nand net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir
+.include 5_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and
+* u2 net-_u2-pad1_ net-_u1-pad6_ d_inverter
+a1 net-_u2-pad1_ net-_u1-pad6_ u2
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 5_nand \ No newline at end of file