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authorrahulp132020-02-21 12:36:46 +0530
committerrahulp132020-02-21 12:36:46 +0530
commit47d4daff2ab483c4cdfb82117ef0d25d53832214 (patch)
tree55aefefe974f151de76c6a2dbe8df3b4c3393bbe /src/SubcircuitLibrary/4073/3_and.cir.out
parent453c2dab78f81046fcbd42034a86c4e759a0ff68 (diff)
downloadeSim-47d4daff2ab483c4cdfb82117ef0d25d53832214.tar.gz
eSim-47d4daff2ab483c4cdfb82117ef0d25d53832214.tar.bz2
eSim-47d4daff2ab483c4cdfb82117ef0d25d53832214.zip
restructured eSim libraries
Diffstat (limited to 'src/SubcircuitLibrary/4073/3_and.cir.out')
-rw-r--r--src/SubcircuitLibrary/4073/3_and.cir.out20
1 files changed, 0 insertions, 20 deletions
diff --git a/src/SubcircuitLibrary/4073/3_and.cir.out b/src/SubcircuitLibrary/4073/3_and.cir.out
deleted file mode 100644
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-* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
-
-* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
-* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
-* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port
-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end