Merge pull request #145 from saurabhb17/master

UA741 removed from SubcircuitLibrary

8 files changed, 0 insertions, 434 deletions

diff --git a/library/SubcircuitLibrary/ua741/analysis b/library/SubcircuitLibrary/ua741/analysis
deleted file mode 100644
index 52ccc5ec..00000000
--- a/library/SubcircuitLibrary/ua741/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.ac lin 0 0Hz 0Hz
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/ua741/ua741-cache.lib b/library/SubcircuitLibrary/ua741/ua741-cache.lib
deleted file mode 100644
index a330f429..00000000
--- a/library/SubcircuitLibrary/ua741/ua741-cache.lib
+++ /dev/null
@@ -1,127 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# GND
-#
-DEF GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -250 50 H I C CNN
-F1 "GND" 0 -150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
-X GND 1 0 0 0 D 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 75 50 H I C CNN
-F1 "PWR_FLAG" 0 150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-X pwr 1 0 0 0 U 50 50 0 0 w
-P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
-ENDDRAW
-ENDDEF
-#
-# VCVS
-#
-DEF VCVS E 0 40 Y Y 1 F N
-F0 "E" 0 150 50 H V C CNN
-F1 "VCVS" -200 -50 50 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-S -100 100 100 -100 0 1 0 N
-X + 1 -300 50 200 R 35 35 1 1 P
-X - 2 300 50 200 L 35 35 1 1 P
-X +c 3 -50 -200 100 U 35 35 1 1 P
-X -c 4 50 -200 100 U 35 35 1 1 P
-ENDDRAW
-ENDDEF
-#
-# eSim_C
-#
-DEF eSim_C C 0 10 N Y 1 F N
-F0 "C" 25 100 50 H V L CNN
-F1 "eSim_C" 25 -100 50 H V L CNN
-F2 "" 38 -150 30 H V C CNN
-F3 "" 0 0 60 H V C CNN
-ALIAS capacitor
-$FPLIST
- C_*
-$ENDFPLIST
-DRAW
-P 2 0 1 20 -80 -30 80 -30 N
-P 2 0 1 20 -80 30 80 30 N
-X ~ 1 0 150 110 D 40 40 1 1 P
-X ~ 2 0 -150 110 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# eSim_R
-#
-DEF eSim_R R 0 0 N Y 1 F N
-F0 "R" 50 130 50 H V C CNN
-F1 "eSim_R" 50 -50 50 H V C CNN
-F2 "" 50 -20 30 H V C CNN
-F3 "" 50 50 30 V V C CNN
-ALIAS resistor
-$FPLIST
- R_*
- Resistor_*
-$ENDFPLIST
-DRAW
-S 150 10 -50 90 0 1 10 N
-X ~ 1 -100 50 50 R 60 60 1 1 P
-X ~ 2 200 50 50 L 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/library/SubcircuitLibrary/ua741/ua741.cir b/library/SubcircuitLibrary/ua741/ua741.cir
deleted file mode 100644
index de797429..00000000
--- a/library/SubcircuitLibrary/ua741/ua741.cir
+++ /dev/null
@@ -1,15 +0,0 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-*Sheet Name:/
-U1  6 7 3 PORT		
-Rout1  3 2 75		
-Eout1  2 0 1 0 1		
-Cbw1  1 0 31.85e-9		
-Rbw1  1 4 0.5e6		
-Ein1  4 0 7 6 100e3		
-Rin1  7 6 2e6		
-
-.end
diff --git a/library/SubcircuitLibrary/ua741/ua741.cir.out b/library/SubcircuitLibrary/ua741/ua741.cir.out
deleted file mode 100644
index 72e68514..00000000
--- a/library/SubcircuitLibrary/ua741/ua741.cir.out
+++ /dev/null
@@ -1,18 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
-
-* u1  6 7 3 port
-rout1  3 2 75
-eout1  2 0 1 0 1
-cbw1  1 0 31.85e-9
-rbw1  1 4 0.5e6
-ein1  4 0 7 6 100e3
-rin1  7 6 2e6
-.ac lin 0 0Hz 0Hz
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/library/SubcircuitLibrary/ua741/ua741.pro b/library/SubcircuitLibrary/ua741/ua741.pro
deleted file mode 100644
index c7b1d67b..00000000
--- a/library/SubcircuitLibrary/ua741/ua741.pro
+++ /dev/null
@@ -1,17 +0,0 @@
-update=Wed Mar 18 14:21:29 2020
-last_client=eeschema
-[eeschema]
-version=1
-LibDir=/home/yogesh/FreeEDA/library
-[eeschema/libraries]
-LibName1=power
-LibName2=eSim_Devices
-LibName3=eSim_User
-LibName4=eSim_Subckt
-LibName5=eSim_Sources
-LibName6=eSim_Power
-LibName7=eSim_Plot
-LibName8=eSim_Miscellaneous
-LibName9=eSim_Hybrid
-LibName10=eSim_Digital
-LibName11=eSim_Analog
diff --git a/library/SubcircuitLibrary/ua741/ua741.sch b/library/SubcircuitLibrary/ua741/ua741.sch
deleted file mode 100644
index b06dcc17..00000000
--- a/library/SubcircuitLibrary/ua741/ua741.sch
+++ /dev/null
@@ -1,229 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:power
-LIBS:eSim_Devices
-LIBS:eSim_User
-LIBS:eSim_Subckt
-LIBS:eSim_Sources
-LIBS:eSim_Power
-LIBS:eSim_Plot
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Hybrid
-LIBS:eSim_Digital
-LIBS:eSim_Analog
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "19 dec 2012"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-Text Notes 3800 2400 0    60   ~ 0
-Op-Amp
-Text Notes 3750 2850 0    60   ~ 0
-VCCS
-Text Notes 5800 2500 0    60   ~ 0
-out
-Text Notes 2750 3100 0    60   ~ 0
--
-Text Notes 2700 2600 0    60   ~ 0
-+
-$Comp
-L PORT U1
-U 6 1 5082C027
-P 6250 2500
-F 0 "U1" H 6250 2450 30  0000 C CNN
-F 1 "PORT" H 6250 2500 30  0000 C CNN
-F 2 "" H 6250 2500 60  0001 C CNN
-F 3 "" H 6250 2500 60  0001 C CNN
-	6    6250 2500
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5082C011
-P 2300 3100
-F 0 "U1" H 2300 3050 30  0000 C CNN
-F 1 "PORT" H 2300 3100 30  0000 C CNN
-F 2 "" H 2300 3100 60  0001 C CNN
-F 3 "" H 2300 3100 60  0001 C CNN
-	2    2300 3100
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5082C00B
-P 2250 2600
-F 0 "U1" H 2250 2550 30  0000 C CNN
-F 1 "PORT" H 2250 2600 30  0000 C CNN
-F 2 "" H 2250 2600 60  0001 C CNN
-F 3 "" H 2250 2600 60  0001 C CNN
-	3    2250 2600
-	1    0    0    -1  
-$EndComp
-$Comp
-L PWR_FLAG #FLG1
-U 1 1 508152A0
-P 3450 3200
-F 0 "#FLG1" H 3450 3470 30  0001 C CNN
-F 1 "PWR_FLAG" H 3450 3430 30  0000 C CNN
-F 2 "" H 3450 3200 60  0001 C CNN
-F 3 "" H 3450 3200 60  0001 C CNN
-	1    3450 3200
-	1    0    0    -1  
-$EndComp
-$Comp
-L VCVS Eout1
-U 1 1 50813F0F
-P 5200 2900
-F 0 "Eout1" H 5000 3000 50  0000 C CNN
-F 1 "1" H 5000 2850 50  0000 C CNN
-F 2 "" H 5200 2900 60  0001 C CNN
-F 3 "" H 5200 2900 60  0001 C CNN
-	1    5200 2900
-	0    1    1    0   
-$EndComp
-$Comp
-L GND #PWR1
-U 1 1 50813E0D
-P 3700 3400
-F 0 "#PWR1" H 3700 3400 30  0001 C CNN
-F 1 "GND" H 3700 3330 30  0001 C CNN
-F 2 "" H 3700 3400 60  0001 C CNN
-F 3 "" H 3700 3400 60  0001 C CNN
-	1    3700 3400
-	1    0    0    -1  
-$EndComp
-$Comp
-L VCVS Ein1
-U 1 1 50813D7C
-P 3650 2850
-F 0 "Ein1" H 3450 2950 50  0000 C CNN
-F 1 "100e3" H 3450 2800 50  0000 C CNN
-F 2 "" H 3650 2850 60  0001 C CNN
-F 3 "" H 3650 2850 60  0001 C CNN
-	1    3650 2850
-	0    1    1    0   
-$EndComp
-Text Notes 2600 2900 0    60   ~ 0
-2e6\n
-Connection ~ 3700 3200
-Wire Wire Line
-	3450 3200 3700 3200
-Connection ~ 5000 3300
-Wire Wire Line
-	3700 3300 5250 3300
-Wire Wire Line
-	5250 3300 5250 3200
-Connection ~ 4550 3300
-Wire Wire Line
-	5000 3300 5000 2950
-Connection ~ 3700 3300
-Wire Wire Line
-	4550 3000 4550 3300
-Wire Wire Line
-	3900 2500 3700 2500
-Wire Wire Line
-	3700 2500 3700 2550
-Wire Wire Line
-	3450 2900 3300 2900
-Wire Wire Line
-	3300 2900 3300 3200
-Wire Wire Line
-	3300 3200 2950 3200
-Connection ~ 2950 3100
-Wire Wire Line
-	2950 3200 2950 3100
-Wire Wire Line
-	3000 2600 2500 2600
-Wire Wire Line
-	2550 3100 3000 3100
-Wire Wire Line
-	2950 2600 2950 2500
-Connection ~ 2950 2600
-Wire Wire Line
-	2950 2500 3300 2500
-Wire Wire Line
-	3300 2500 3300 2800
-Wire Wire Line
-	3300 2800 3450 2800
-Wire Wire Line
-	3700 3150 3700 3400
-Wire Wire Line
-	4550 2500 4550 2700
-Wire Wire Line
-	4400 2500 5000 2500
-Wire Wire Line
-	5000 2500 5000 2850
-Connection ~ 4550 2500
-Wire Wire Line
-	5250 2600 5250 2500
-Wire Wire Line
-	5250 2500 5400 2500
-Wire Wire Line
-	5700 2500 6000 2500
-$Comp
-L resistor Rin1
-U 1 1 5E71E232
-P 2950 2900
-F 0 "Rin1" H 3000 3030 50  0000 C CNN
-F 1 "2e6" H 3000 2850 50  0000 C CNN
-F 2 "" H 3000 2880 30  0000 C CNN
-F 3 "" V 3000 2950 30  0000 C CNN
-	1    2950 2900
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	3000 2600 3000 2800
-$Comp
-L resistor Rbw1
-U 1 1 5E71E326
-P 4050 2100
-F 0 "Rbw1" H 4100 2230 50  0000 C CNN
-F 1 "0.5e6" H 4100 2050 50  0000 C CNN
-F 2 "" H 4100 2080 30  0000 C CNN
-F 3 "" V 4100 2150 30  0000 C CNN
-	1    4050 2100
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3900 2500 3900 2050
-Wire Wire Line
-	3900 2050 3950 2050
-Wire Wire Line
-	4250 2050 4400 2050
-Wire Wire Line
-	4400 2050 4400 2500
-$Comp
-L capacitor Cbw1
-U 1 1 5E71E45C
-P 4550 2850
-F 0 "Cbw1" H 4575 2950 50  0000 L CNN
-F 1 "31.85e-9" H 4575 2750 50  0000 L CNN
-F 2 "" H 4588 2700 30  0000 C CNN
-F 3 "" H 4550 2850 60  0000 C CNN
-	1    4550 2850
-	1    0    0    -1  
-$EndComp
-$Comp
-L resistor Rout1
-U 1 1 5E71E59C
-P 5500 2250
-F 0 "Rout1" H 5550 2380 50  0000 C CNN
-F 1 "75" H 5550 2200 50  0000 C CNN
-F 2 "" H 5550 2230 30  0000 C CNN
-F 3 "" V 5550 2300 30  0000 C CNN
-	1    5500 2250
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	5400 2500 5400 2200
-Wire Wire Line
-	5700 2200 5700 2500
-$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/ua741/ua741.sub b/library/SubcircuitLibrary/ua741/ua741.sub
deleted file mode 100644
index ad26c001..00000000
--- a/library/SubcircuitLibrary/ua741/ua741.sub
+++ /dev/null
@@ -1,12 +0,0 @@
-* Subcircuit ua741
-.subckt ua741 6 7 3 
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
-rout1  3 2 75
-eout1  2 0 1 0 1
-cbw1  1 0 31.85e-9
-rbw1  1 4 0.5e6
-ein1  4 0 7 6 100e3
-rin1  7 6 2e6
-* Control Statements
-
-.ends ua741
\ No newline at end of file
diff --git a/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib b/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib
index 0151b65f..a84f0727 100644
--- a/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib
+++ b/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib
@@ -487,21 +487,6 @@ X G 3 -350 -400 150 R 60 60 1 1 I
 ENDDRAW
 ENDDEF
 #
-# UA741
-#
-DEF UA741 X 0 40 Y Y 1 F N
-F0 "X" 150 0 60 H V C CNN
-F1 "UA741" 250 -150 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-P 4 0 1 0 0 150 0 -150 350 0 0 150 N
-X + 1 -200 100 200 R 50 50 1 1 I
-X - 2 -200 -100 200 R 50 50 1 1 I
-X ~ 3 550 0 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
 # UJT
 #
 DEF UJT X 0 40 Y Y 1 F N