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author | saurabhb17 | 2020-03-18 14:26:36 +0530 |
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committer | saurabhb17 | 2020-03-18 14:26:36 +0530 |
commit | 50cc0a9c65834db636c502cde6548f9e3971600c (patch) | |
tree | 28faa109a0674593dfa190c00508e4680232d934 /library/SubcircuitLibrary/ua741/ua741-cache.lib | |
parent | c967b3b3b27dc4e76ee2bb7a1820a97c5306b8d2 (diff) | |
download | eSim-50cc0a9c65834db636c502cde6548f9e3971600c.tar.gz eSim-50cc0a9c65834db636c502cde6548f9e3971600c.tar.bz2 eSim-50cc0a9c65834db636c502cde6548f9e3971600c.zip |
Subcircuit libs cleanup
Diffstat (limited to 'library/SubcircuitLibrary/ua741/ua741-cache.lib')
-rw-r--r-- | library/SubcircuitLibrary/ua741/ua741-cache.lib | 127 |
1 files changed, 127 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/ua741/ua741-cache.lib b/library/SubcircuitLibrary/ua741/ua741-cache.lib new file mode 100644 index 00000000..a330f429 --- /dev/null +++ b/library/SubcircuitLibrary/ua741/ua741-cache.lib @@ -0,0 +1,127 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 75 50 H I C CNN +F1 "PWR_FLAG" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +X pwr 1 0 0 0 U 50 50 0 0 w +P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" 0 150 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library |