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| author | Eyantra698Sumanto | 2022-02-08 12:38:17 +0530 |
|---|---|---|
| committer | Eyantra698Sumanto | 2022-02-08 12:38:17 +0530 |
| commit | b2c5afc0a22390f221083af05c1ce2703907df25 (patch) | |
| tree | ca64a1d433730e2b4752f9f268f8d2ad32e709fb /library/SubcircuitLibrary/Clock_pulse_generator/analysis | |
| parent | a4c84ad5858d64054d7b810a913fe7ccfdbf92c0 (diff) | |
| download | eSim-b2c5afc0a22390f221083af05c1ce2703907df25.tar.gz eSim-b2c5afc0a22390f221083af05c1ce2703907df25.tar.bz2 eSim-b2c5afc0a22390f221083af05c1ce2703907df25.zip | |
Added Clock Generator and DAC
Diffstat (limited to 'library/SubcircuitLibrary/Clock_pulse_generator/analysis')
| -rw-r--r-- | library/SubcircuitLibrary/Clock_pulse_generator/analysis | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/Clock_pulse_generator/analysis b/library/SubcircuitLibrary/Clock_pulse_generator/analysis new file mode 100644 index 00000000..f496aec4 --- /dev/null +++ b/library/SubcircuitLibrary/Clock_pulse_generator/analysis @@ -0,0 +1 @@ +.tran 1e-03 100e-03 0e-00
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