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author | Sumanto Kar | 2023-05-04 13:13:01 +0530 |
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committer | GitHub | 2023-05-04 13:13:01 +0530 |
commit | 57e699fdd79e8be77385bc2a4e017408e5d5afaa (patch) | |
tree | 9a81f2090740d02ad33b29f5db49123995c0a41e /library/SubcircuitLibrary/CD_4077 | |
parent | 427467420f97eef76fd0ecc067ebd426f5cac554 (diff) | |
parent | 732e2c2a1b63b3af1f17a2f1a8c128db2a757b4c (diff) | |
download | eSim-57e699fdd79e8be77385bc2a4e017408e5d5afaa.tar.gz eSim-57e699fdd79e8be77385bc2a4e017408e5d5afaa.tar.bz2 eSim-57e699fdd79e8be77385bc2a4e017408e5d5afaa.zip |
Merge branch 'master' into master
Diffstat (limited to 'library/SubcircuitLibrary/CD_4077')
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/CD_4077-cache.lib | 100 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/CD_4077.cir | 59 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/CD_4077.cir.out | 62 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/CD_4077.pro | 71 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/CD_4077.sch | 1376 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/CD_4077.sub | 56 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/CD_4077_Previous_Values.xml | 1 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/NMOS-180nm.lib | 13 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/PMOS-180nm.lib | 11 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/README.md | 28 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD_4077/analysis | 1 |
11 files changed, 1778 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD_4077/CD_4077-cache.lib b/library/SubcircuitLibrary/CD_4077/CD_4077-cache.lib new file mode 100644 index 00000000..6c512720 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/CD_4077-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_MOS_N +# +DEF eSim_MOS_N M 0 0 Y N 1 F N +F0 "M" 0 -150 50 H V R CNN +F1 "eSim_MOS_N" 100 -50 50 H V R CNN +F2 "" 300 -300 29 H V C CNN +F3 "" 100 -200 60 H V C CNN +ALIAS mosfet_n +DRAW +C 150 -200 111 0 1 10 N +P 2 0 1 10 130 -290 130 -250 N +P 2 0 1 0 130 -270 200 -270 N +P 2 0 1 10 130 -220 130 -180 N +P 2 0 1 0 130 -200 200 -200 N +P 2 0 1 10 130 -150 130 -110 N +P 2 0 1 0 130 -130 200 -130 N +P 2 0 1 0 200 -300 200 -270 N +P 2 0 1 0 200 -130 200 -100 N +P 3 0 1 10 110 -275 110 -125 110 -125 N +P 3 0 1 0 200 -200 300 -200 300 -250 N +P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F +X D 1 200 0 100 D 50 50 1 1 P +X G 2 -100 -200 210 R 50 50 1 1 P +X S 3 200 -400 100 U 50 50 1 1 P +X B 4 300 -350 98 U 47 47 1 1 P +ENDDRAW +ENDDEF +# +# eSim_MOS_P +# +DEF eSim_MOS_P M 0 0 Y N 1 F N +F0 "M" -50 50 50 H V R CNN +F1 "eSim_MOS_P" 50 150 50 H V R CNN +F2 "" 250 100 29 H V C CNN +F3 "" 50 0 60 H V C CNN +ALIAS mosfet_p +DRAW +C 100 0 111 0 1 10 N +P 2 0 1 0 80 -70 150 -70 N +P 2 0 1 10 80 -50 80 -90 N +P 2 0 1 0 80 0 150 0 N +P 2 0 1 10 80 20 80 -20 N +P 2 0 1 0 80 70 150 70 N +P 2 0 1 10 80 90 80 50 N +P 2 0 1 0 150 -70 150 -100 N +P 2 0 1 0 150 100 150 70 N +P 3 0 1 10 60 75 60 -75 60 -75 N +P 3 0 1 0 150 0 250 0 250 -50 N +P 4 0 1 0 140 0 100 -15 100 15 140 0 F +X D 1 150 200 100 D 50 50 1 1 P +X G 2 -150 0 210 R 50 50 1 1 P +X S 3 150 -200 100 U 50 50 1 1 P +X B 4 250 -150 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/CD_4077/CD_4077.cir b/library/SubcircuitLibrary/CD_4077/CD_4077.cir new file mode 100644 index 00000000..349ff880 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/CD_4077.cir @@ -0,0 +1,59 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD_4077\CD_4077.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/19/22 23:08:47 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +M15 Net-_M11-Pad1_ Net-_M15-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M11 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M12 Net-_M12-Pad1_ Net-_M12-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P +M16 Net-_M12-Pad1_ Net-_M16-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P +M7 Net-_M12-Pad1_ Net-_M11-Pad2_ Net-_M7-Pad3_ Net-_M7-Pad3_ eSim_MOS_N +M19 Net-_M12-Pad1_ Net-_M12-Pad2_ Net-_M19-Pad3_ Net-_M19-Pad3_ eSim_MOS_N +M8 Net-_M7-Pad3_ Net-_M15-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M20 Net-_M19-Pad3_ Net-_M16-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M4 Net-_M12-Pad2_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M2 Net-_M12-Pad2_ Net-_M11-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M22 Net-_M15-Pad2_ Net-_M16-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M24 Net-_M15-Pad2_ Net-_M16-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M39 Net-_M35-Pad1_ Net-_M32-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M35 Net-_M35-Pad1_ Net-_M26-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M36 Net-_M31-Pad1_ Net-_M26-Pad1_ Net-_M35-Pad1_ Net-_M35-Pad1_ eSim_MOS_P +M40 Net-_M31-Pad1_ Net-_M40-Pad2_ Net-_M35-Pad1_ Net-_M35-Pad1_ eSim_MOS_P +M31 Net-_M31-Pad1_ Net-_M26-Pad2_ Net-_M31-Pad3_ Net-_M31-Pad3_ eSim_MOS_N +M43 Net-_M31-Pad1_ Net-_M26-Pad1_ Net-_M43-Pad3_ Net-_M43-Pad3_ eSim_MOS_N +M32 Net-_M31-Pad3_ Net-_M32-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M44 Net-_M43-Pad3_ Net-_M40-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M28 Net-_M26-Pad1_ Net-_M26-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M26 Net-_M26-Pad1_ Net-_M26-Pad2_ Net-_M26-Pad3_ Net-_M26-Pad3_ eSim_MOS_N +M46 Net-_M32-Pad2_ Net-_M40-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M48 Net-_M32-Pad2_ Net-_M40-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M13 Net-_M10-Pad3_ Net-_M13-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M9 Net-_M10-Pad3_ Net-_M1-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M10 Net-_M10-Pad1_ Net-_M1-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P +M14 Net-_M10-Pad1_ Net-_M14-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P +M5 Net-_M10-Pad1_ Net-_M1-Pad2_ Net-_M5-Pad3_ Net-_M5-Pad3_ eSim_MOS_N +M17 Net-_M10-Pad1_ Net-_M1-Pad1_ Net-_M17-Pad3_ Net-_M17-Pad3_ eSim_MOS_N +M6 Net-_M5-Pad3_ Net-_M13-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M18 Net-_M17-Pad3_ Net-_M14-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M3 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M21 Net-_M13-Pad2_ Net-_M14-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M23 Net-_M13-Pad2_ Net-_M14-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M37 Net-_M33-Pad1_ Net-_M30-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M33 Net-_M33-Pad1_ Net-_M25-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M34 Net-_M29-Pad1_ Net-_M25-Pad1_ Net-_M33-Pad1_ Net-_M33-Pad1_ eSim_MOS_P +M38 Net-_M29-Pad1_ Net-_M38-Pad2_ Net-_M33-Pad1_ Net-_M33-Pad1_ eSim_MOS_P +M29 Net-_M29-Pad1_ Net-_M25-Pad2_ Net-_M29-Pad3_ Net-_M29-Pad3_ eSim_MOS_N +M41 Net-_M29-Pad1_ Net-_M25-Pad1_ Net-_M41-Pad3_ Net-_M41-Pad3_ eSim_MOS_N +M30 Net-_M29-Pad3_ Net-_M30-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M42 Net-_M41-Pad3_ Net-_M38-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M27 Net-_M25-Pad1_ Net-_M25-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M25 Net-_M25-Pad1_ Net-_M25-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M45 Net-_M30-Pad2_ Net-_M38-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M47 Net-_M30-Pad2_ Net-_M38-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +U1 Net-_M1-Pad2_ Net-_M14-Pad2_ Net-_M10-Pad1_ Net-_M29-Pad1_ Net-_M25-Pad2_ Net-_M38-Pad2_ Net-_M1-Pad3_ Net-_M26-Pad2_ Net-_M40-Pad2_ Net-_M31-Pad1_ Net-_M12-Pad1_ Net-_M11-Pad2_ Net-_M16-Pad2_ Net-_M11-Pad3_ PORT + +.end diff --git a/library/SubcircuitLibrary/CD_4077/CD_4077.cir.out b/library/SubcircuitLibrary/CD_4077/CD_4077.cir.out new file mode 100644 index 00000000..07aa4263 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/CD_4077.cir.out @@ -0,0 +1,62 @@ +* c:\fossee\esim\library\subcircuitlibrary\cd_4077\cd_4077.cir + +.include PMOS-180nm.lib +.include NMOS-180nm.lib +m15 net-_m11-pad1_ net-_m15-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m12-pad1_ net-_m12-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m16 net-_m12-pad1_ net-_m16-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m7 net-_m12-pad1_ net-_m11-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1 +m19 net-_m12-pad1_ net-_m12-pad2_ net-_m19-pad3_ net-_m19-pad3_ CMOSN W=100u L=100u M=1 +m8 net-_m7-pad3_ net-_m15-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m20 net-_m19-pad3_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m12-pad2_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m12-pad2_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m22 net-_m15-pad2_ net-_m16-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m24 net-_m15-pad2_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m39 net-_m35-pad1_ net-_m32-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m35 net-_m35-pad1_ net-_m26-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m36 net-_m31-pad1_ net-_m26-pad1_ net-_m35-pad1_ net-_m35-pad1_ CMOSP W=100u L=100u M=1 +m40 net-_m31-pad1_ net-_m40-pad2_ net-_m35-pad1_ net-_m35-pad1_ CMOSP W=100u L=100u M=1 +m31 net-_m31-pad1_ net-_m26-pad2_ net-_m31-pad3_ net-_m31-pad3_ CMOSN W=100u L=100u M=1 +m43 net-_m31-pad1_ net-_m26-pad1_ net-_m43-pad3_ net-_m43-pad3_ CMOSN W=100u L=100u M=1 +m32 net-_m31-pad3_ net-_m32-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m44 net-_m43-pad3_ net-_m40-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m28 net-_m26-pad1_ net-_m26-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m26 net-_m26-pad1_ net-_m26-pad2_ net-_m26-pad3_ net-_m26-pad3_ CMOSN W=100u L=100u M=1 +m46 net-_m32-pad2_ net-_m40-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m48 net-_m32-pad2_ net-_m40-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m13 net-_m10-pad3_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m9 net-_m10-pad3_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m10 net-_m10-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m14 net-_m10-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m5 net-_m10-pad1_ net-_m1-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1 +m17 net-_m10-pad1_ net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad3_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m18 net-_m17-pad3_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m3 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m21 net-_m13-pad2_ net-_m14-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m23 net-_m13-pad2_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m37 net-_m33-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m33 net-_m33-pad1_ net-_m25-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m34 net-_m29-pad1_ net-_m25-pad1_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1 +m38 net-_m29-pad1_ net-_m38-pad2_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1 +m29 net-_m29-pad1_ net-_m25-pad2_ net-_m29-pad3_ net-_m29-pad3_ CMOSN W=100u L=100u M=1 +m41 net-_m29-pad1_ net-_m25-pad1_ net-_m41-pad3_ net-_m41-pad3_ CMOSN W=100u L=100u M=1 +m30 net-_m29-pad3_ net-_m30-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m42 net-_m41-pad3_ net-_m38-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m27 net-_m25-pad1_ net-_m25-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m25 net-_m25-pad1_ net-_m25-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m45 net-_m30-pad2_ net-_m38-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m47 net-_m30-pad2_ net-_m38-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +* u1 net-_m1-pad2_ net-_m14-pad2_ net-_m10-pad1_ net-_m29-pad1_ net-_m25-pad2_ net-_m38-pad2_ net-_m1-pad3_ net-_m26-pad2_ net-_m40-pad2_ net-_m31-pad1_ net-_m12-pad1_ net-_m11-pad2_ net-_m16-pad2_ net-_m11-pad3_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/CD_4077/CD_4077.pro b/library/SubcircuitLibrary/CD_4077/CD_4077.pro new file mode 100644 index 00000000..d7f78c3b --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/CD_4077.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/CD_4077/CD_4077.sch b/library/SubcircuitLibrary/CD_4077/CD_4077.sch new file mode 100644 index 00000000..393fedbc --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/CD_4077.sch @@ -0,0 +1,1376 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:CD_4077-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 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7000 2100 +Wire Wire Line + 7000 2100 7000 2950 +Wire Wire Line + 7000 2950 7300 2950 +Connection ~ 8900 1450 +Wire Wire Line + 8750 2950 8400 2950 +Connection ~ 8750 2050 +Wire Wire Line + 7200 2200 8400 2200 +Wire Wire Line + 8400 2200 8400 2450 +Connection ~ 7200 1800 +Wire Wire Line + 7850 2150 8600 2150 +Wire Wire Line + 8600 2150 8600 2500 +Wire Wire Line + 8600 2500 9500 2500 +Connection ~ 7850 2150 +Wire Wire Line + 6900 1950 6900 3150 +Connection ~ 7600 3150 +Connection ~ 6900 1950 +Wire Wire Line + 9050 3150 9050 1950 +Connection ~ 8100 3150 +Connection ~ 9050 1950 +Wire Wire Line + 3600 3800 3600 3850 +Wire Wire Line + 2850 3800 5100 3800 +Wire Wire Line + 4100 3800 4100 3850 +Wire Wire Line + 3600 4250 3600 4400 +Wire Wire Line + 4100 4250 4100 4400 +Wire Wire Line + 3600 4300 4100 4300 +Connection ~ 4100 4300 +Connection ~ 3600 4300 +Wire Wire Line + 3600 4800 4100 4800 +Wire Wire Line + 3600 5050 4100 5050 +Wire Wire Line + 2900 5950 9000 5950 +Wire Wire Line + 3850 4800 3850 5050 +Connection ~ 3850 5050 +Connection ~ 3850 4800 +Wire Wire Line + 3600 5450 3600 5550 +Wire Wire Line + 4100 5450 4100 5550 +Wire Wire Line + 3700 3900 3700 3800 +Connection ~ 3700 3800 +Wire Wire Line + 4000 3900 4000 3800 +Connection ~ 4000 3800 +Wire Wire Line + 3700 4450 3700 4350 +Wire Wire Line + 3700 4350 3600 4350 +Connection ~ 3600 4350 +Wire Wire Line + 4000 4450 4000 4350 +Wire Wire Line + 4000 4350 4100 4350 +Connection ~ 4100 4350 +Wire Wire Line + 3700 5400 3700 5500 +Wire Wire Line + 3700 5500 3600 5500 +Connection ~ 3600 5500 +Wire Wire Line + 4000 5400 4000 5500 +Wire Wire Line + 4000 5500 4100 5500 +Connection ~ 4100 5500 +Wire Wire Line + 3700 5900 3700 5950 +Connection ~ 3700 5950 +Wire Wire Line + 4000 5900 4000 5950 +Connection ~ 4000 5950 +Wire Wire Line + 2550 4000 2550 4550 +Wire Wire Line + 2950 3800 2950 3850 +Wire Wire Line + 2850 4750 2950 4750 +Wire Wire Line + 2950 4750 2950 4700 +Wire Wire Line + 2850 4200 2850 4350 +Wire Wire Line + 5400 4000 5400 4550 +Wire Wire Line + 5000 3800 5000 3850 +Wire Wire Line + 5000 4750 5100 4750 +Wire Wire Line + 5000 4750 5000 4700 +Wire Wire Line + 5100 4200 5100 4350 +Wire Wire Line + 3300 4050 3150 4050 +Wire Wire Line + 3150 4050 3150 3700 +Wire Wire Line + 3150 3700 2300 3700 +Wire Wire Line + 2300 3700 2300 5250 +Wire Wire Line + 1900 4300 2550 4300 +Connection ~ 2550 4300 +Connection ~ 3600 3800 +Connection ~ 2950 3800 +Connection ~ 4100 3800 +Connection ~ 5000 3800 +Wire Wire Line + 4400 4050 4900 4050 +Wire Wire Line + 4900 4050 4900 4900 +Wire Wire Line + 4900 4250 5100 4250 +Connection ~ 5100 4250 +Wire Wire Line + 2850 4300 3200 4300 +Wire Wire Line + 3200 4300 3200 5000 +Wire Wire Line + 3200 4600 3300 4600 +Connection ~ 2850 4300 +Wire Wire Line + 5700 4250 5400 4250 +Wire Wire Line + 5700 4250 5700 4850 +Wire Wire Line + 5700 4850 4750 4850 +Wire Wire Line + 4750 4600 4750 5750 +Wire Wire Line + 4750 4600 4400 4600 +Connection ~ 5400 4250 +Wire Wire Line + 2300 5250 3300 5250 +Connection ~ 2300 4300 +Wire Wire Line + 4900 4900 3000 4900 +Wire Wire Line + 3000 4900 3000 5750 +Wire Wire Line + 3000 5750 3300 5750 +Connection ~ 4900 4250 +Wire Wire Line + 4750 5750 4400 5750 +Connection ~ 4750 4850 +Wire Wire Line + 3200 5000 4400 5000 +Wire Wire Line + 4400 5000 4400 5250 +Connection ~ 3200 4600 +Wire Wire Line + 3850 4950 4600 4950 +Wire Wire Line + 4600 4950 4600 5300 +Wire Wire Line + 4600 5300 5500 5300 +Connection ~ 3850 4950 +Wire Wire Line + 2900 4750 2900 5950 +Connection ~ 3600 5950 +Connection ~ 2900 4750 +Wire Wire Line + 5050 5950 5050 4750 +Connection ~ 4100 5950 +Connection ~ 5050 4750 +Wire Wire Line + 7550 3800 7550 3850 +Wire Wire Line + 6800 3800 9050 3800 +Wire Wire Line + 8050 3800 8050 3850 +Wire Wire Line + 7550 4250 7550 4400 +Wire Wire Line + 8050 4250 8050 4400 +Wire Wire Line + 7550 4300 8050 4300 +Connection ~ 8050 4300 +Connection ~ 7550 4300 +Wire Wire Line + 7550 4800 8050 4800 +Wire Wire Line + 7550 5050 8050 5050 +Wire Wire Line + 7800 4800 7800 5050 +Connection ~ 7800 5050 +Connection ~ 7800 4800 +Wire Wire Line + 7550 5450 7550 5550 +Wire Wire Line + 8050 5450 8050 5550 +Wire Wire Line + 7650 3900 7650 3800 +Connection ~ 7650 3800 +Wire Wire Line + 7950 3900 7950 3800 +Connection ~ 7950 3800 +Wire Wire Line + 7650 4450 7650 4350 +Wire Wire Line + 7650 4350 7550 4350 +Connection ~ 7550 4350 +Wire Wire Line + 7950 4450 7950 4350 +Wire Wire Line + 7950 4350 8050 4350 +Connection ~ 8050 4350 +Wire Wire Line + 7650 5400 7650 5500 +Wire Wire Line + 7650 5500 7550 5500 +Connection ~ 7550 5500 +Wire Wire Line + 7950 5400 7950 5500 +Wire Wire Line + 7950 5500 8050 5500 +Connection ~ 8050 5500 +Wire Wire Line + 7650 5900 7650 5950 +Connection ~ 7650 5950 +Wire Wire Line + 7950 5900 7950 5950 +Connection ~ 7950 5950 +Wire Wire Line + 6500 4000 6500 4550 +Wire Wire Line + 6900 3800 6900 3850 +Wire Wire Line + 6800 4750 6900 4750 +Wire Wire Line + 6900 4750 6900 4700 +Wire Wire Line + 6800 4200 6800 4350 +Wire Wire Line + 9350 4000 9350 4550 +Wire Wire Line + 8950 3800 8950 3850 +Wire Wire Line + 8950 4750 9050 4750 +Wire Wire Line + 8950 4750 8950 4700 +Wire Wire Line + 9050 4200 9050 4350 +Wire Wire Line + 7250 4050 7100 4050 +Wire Wire Line + 7100 4050 7100 3700 +Wire Wire Line + 7100 3700 6250 3700 +Wire Wire Line + 6250 3700 6250 5250 +Wire Wire Line + 6250 4300 6500 4300 +Connection ~ 6500 4300 +Connection ~ 7550 3800 +Connection ~ 6900 3800 +Connection ~ 8050 3800 +Connection ~ 8950 3800 +Wire Wire Line + 8350 4050 8850 4050 +Wire Wire Line + 8850 4050 8850 4900 +Wire Wire Line + 8850 4250 9050 4250 +Connection ~ 9050 4250 +Wire Wire Line + 6800 4300 7150 4300 +Wire Wire Line + 7150 4300 7150 5000 +Wire Wire Line + 7150 4600 7250 4600 +Connection ~ 6800 4300 +Wire Wire Line + 9350 4250 9800 4250 +Wire Wire Line + 9650 4250 9650 4850 +Wire Wire Line + 9650 4850 8700 4850 +Wire Wire Line + 8700 4600 8700 5750 +Wire Wire Line + 8700 4600 8350 4600 +Connection ~ 9350 4250 +Wire Wire Line + 6250 5250 7250 5250 +Connection ~ 6250 4300 +Wire Wire Line + 8850 4900 6950 4900 +Wire Wire Line + 6950 4900 6950 5750 +Wire Wire Line + 6950 5750 7250 5750 +Connection ~ 8850 4250 +Wire Wire Line + 8700 5750 8350 5750 +Connection ~ 8700 4850 +Wire Wire Line + 7150 5000 8350 5000 +Wire Wire Line + 8350 5000 8350 5250 +Connection ~ 7150 4600 +Wire Wire Line + 7800 4950 8550 4950 +Wire Wire Line + 8550 4950 8550 5300 +Wire Wire Line + 8550 5300 9450 5300 +Connection ~ 7800 4950 +Wire Wire Line + 6850 4750 6850 5950 +Connection ~ 7550 5950 +Connection ~ 6850 4750 +Wire Wire Line + 9000 5950 9000 4750 +Connection ~ 8050 5950 +Connection ~ 9000 4750 +Wire Wire Line + 5150 1000 5150 750 +Wire Wire Line + 5000 750 6850 750 +Wire Wire Line + 6850 750 6850 1000 +Wire Wire Line + 5100 3800 5100 3500 +Wire Wire Line + 5100 3500 6800 3500 +Wire Wire Line + 6800 3500 6800 3800 +Connection ~ 6950 3150 +Connection ~ 5100 3150 +Connection ~ 6850 5950 +Connection ~ 5050 5950 +Wire Wire Line + 5800 3150 5800 6200 +Connection ~ 5800 5950 +Connection ~ 5800 3150 +Wire Wire Line + 6000 750 6000 3500 +Connection ~ 6000 3500 +Connection ~ 6000 750 +Wire Wire Line + 5700 4700 5850 4700 +Connection ~ 5700 4700 +Connection ~ 9650 4250 +Connection ~ 9700 1450 +Connection ~ 5750 2050 +$Comp +L PORT U1 +U 1 1 628776E2 +P 1650 4300 +F 0 "U1" H 1700 4400 30 0000 C CNN +F 1 "PORT" H 1650 4300 30 0000 C CNN +F 2 "" H 1650 4300 60 0000 C CNN +F 3 "" H 1650 4300 60 0000 C CNN + 1 1650 4300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 62877816 +P 6100 4700 +F 0 "U1" H 6150 4800 30 0000 C CNN +F 1 "PORT" H 6100 4700 30 0000 C CNN +F 2 "" H 6100 4700 60 0000 C CNN +F 3 "" H 6100 4700 60 0000 C CNN + 2 6100 4700 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 628778B1 +P 5750 5300 +F 0 "U1" H 5800 5400 30 0000 C CNN +F 1 "PORT" H 5750 5300 30 0000 C CNN +F 2 "" H 5750 5300 60 0000 C CNN +F 3 "" H 5750 5300 60 0000 C CNN + 3 5750 5300 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 4 1 628780D0 +P 9700 5300 +F 0 "U1" H 9750 5400 30 0000 C CNN +F 1 "PORT" H 9700 5300 30 0000 C CNN +F 2 "" H 9700 5300 60 0000 C CNN +F 3 "" H 9700 5300 60 0000 C CNN + 4 9700 5300 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 5 1 62878167 +P 6000 4300 +F 0 "U1" H 6050 4400 30 0000 C CNN +F 1 "PORT" H 6000 4300 30 0000 C CNN +F 2 "" H 6000 4300 60 0000 C CNN +F 3 "" H 6000 4300 60 0000 C CNN + 5 6000 4300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 6 1 628781F8 +P 10050 4250 +F 0 "U1" H 10100 4350 30 0000 C CNN +F 1 "PORT" H 10050 4250 30 0000 C CNN +F 2 "" H 10050 4250 60 0000 C CNN +F 3 "" H 10050 4250 60 0000 C CNN + 6 10050 4250 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 7 1 62878287 +P 5550 6200 +F 0 "U1" H 5600 6300 30 0000 C CNN +F 1 "PORT" H 5550 6200 30 0000 C CNN +F 2 "" H 5550 6200 60 0000 C CNN +F 3 "" H 5550 6200 60 0000 C CNN + 7 5550 6200 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 8 1 6287B799 +P 6050 1500 +F 0 "U1" H 6100 1600 30 0000 C CNN +F 1 "PORT" H 6050 1500 30 0000 C CNN +F 2 "" H 6050 1500 60 0000 C CNN +F 3 "" H 6050 1500 60 0000 C CNN + 8 6050 1500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 9 1 6287B940 +P 10100 1450 +F 0 "U1" H 10150 1550 30 0000 C CNN +F 1 "PORT" H 10100 1450 30 0000 C CNN +F 2 "" H 10100 1450 60 0000 C CNN +F 3 "" H 10100 1450 60 0000 C CNN + 9 10100 1450 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 10 1 6287B9DD +P 9750 2500 +F 0 "U1" H 9800 2600 30 0000 C CNN +F 1 "PORT" H 9750 2500 30 0000 C CNN +F 2 "" H 9750 2500 60 0000 C CNN +F 3 "" H 9750 2500 60 0000 C CNN + 10 9750 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 11 1 6287CC98 +P 5800 2500 +F 0 "U1" H 5850 2600 30 0000 C CNN +F 1 "PORT" H 5800 2500 30 0000 C CNN +F 2 "" H 5800 2500 60 0000 C CNN +F 3 "" H 5800 2500 60 0000 C CNN + 11 5800 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 12 1 6287CD45 +P 1650 1500 +F 0 "U1" H 1700 1600 30 0000 C CNN +F 1 "PORT" H 1650 1500 30 0000 C CNN +F 2 "" H 1650 1500 60 0000 C CNN +F 3 "" H 1650 1500 60 0000 C CNN + 12 1650 1500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 13 1 6287D802 +P 6000 2050 +F 0 "U1" H 6050 2150 30 0000 C CNN +F 1 "PORT" H 6000 2050 30 0000 C CNN +F 2 "" H 6000 2050 60 0000 C CNN +F 3 "" H 6000 2050 60 0000 C CNN + 13 6000 2050 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 14 1 6287D8A7 +P 4750 750 +F 0 "U1" H 4800 850 30 0000 C CNN +F 1 "PORT" H 4750 750 30 0000 C CNN +F 2 "" H 4750 750 60 0000 C CNN +F 3 "" H 4750 750 60 0000 C CNN + 14 4750 750 + 1 0 0 -1 +$EndComp +Connection ~ 5150 750 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/CD_4077/CD_4077.sub b/library/SubcircuitLibrary/CD_4077/CD_4077.sub new file mode 100644 index 00000000..aa351499 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/CD_4077.sub @@ -0,0 +1,56 @@ +* Subcircuit CD_4077 +.subckt CD_4077 net-_m1-pad2_ net-_m14-pad2_ net-_m10-pad1_ net-_m29-pad1_ net-_m25-pad2_ net-_m38-pad2_ net-_m1-pad3_ net-_m26-pad2_ net-_m40-pad2_ net-_m31-pad1_ net-_m12-pad1_ net-_m11-pad2_ net-_m16-pad2_ net-_m11-pad3_ +* c:\fossee\esim\library\subcircuitlibrary\cd_4077\cd_4077.cir +.include PMOS-180nm.lib +.include NMOS-180nm.lib +m15 net-_m11-pad1_ net-_m15-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m12-pad1_ net-_m12-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m16 net-_m12-pad1_ net-_m16-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m7 net-_m12-pad1_ net-_m11-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1 +m19 net-_m12-pad1_ net-_m12-pad2_ net-_m19-pad3_ net-_m19-pad3_ CMOSN W=100u L=100u M=1 +m8 net-_m7-pad3_ net-_m15-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m20 net-_m19-pad3_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m12-pad2_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m12-pad2_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m22 net-_m15-pad2_ net-_m16-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m24 net-_m15-pad2_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m39 net-_m35-pad1_ net-_m32-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m35 net-_m35-pad1_ net-_m26-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m36 net-_m31-pad1_ net-_m26-pad1_ net-_m35-pad1_ net-_m35-pad1_ CMOSP W=100u L=100u M=1 +m40 net-_m31-pad1_ net-_m40-pad2_ net-_m35-pad1_ net-_m35-pad1_ CMOSP W=100u L=100u M=1 +m31 net-_m31-pad1_ net-_m26-pad2_ net-_m31-pad3_ net-_m31-pad3_ CMOSN W=100u L=100u M=1 +m43 net-_m31-pad1_ net-_m26-pad1_ net-_m43-pad3_ net-_m43-pad3_ CMOSN W=100u L=100u M=1 +m32 net-_m31-pad3_ net-_m32-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m44 net-_m43-pad3_ net-_m40-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m28 net-_m26-pad1_ net-_m26-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m26 net-_m26-pad1_ net-_m26-pad2_ net-_m26-pad3_ net-_m26-pad3_ CMOSN W=100u L=100u M=1 +m46 net-_m32-pad2_ net-_m40-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m48 net-_m32-pad2_ net-_m40-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m13 net-_m10-pad3_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m9 net-_m10-pad3_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m10 net-_m10-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m14 net-_m10-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m5 net-_m10-pad1_ net-_m1-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1 +m17 net-_m10-pad1_ net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad3_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m18 net-_m17-pad3_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m3 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m21 net-_m13-pad2_ net-_m14-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m23 net-_m13-pad2_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m37 net-_m33-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m33 net-_m33-pad1_ net-_m25-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m34 net-_m29-pad1_ net-_m25-pad1_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1 +m38 net-_m29-pad1_ net-_m38-pad2_ net-_m33-pad1_ net-_m33-pad1_ CMOSP W=100u L=100u M=1 +m29 net-_m29-pad1_ net-_m25-pad2_ net-_m29-pad3_ net-_m29-pad3_ CMOSN W=100u L=100u M=1 +m41 net-_m29-pad1_ net-_m25-pad1_ net-_m41-pad3_ net-_m41-pad3_ CMOSN W=100u L=100u M=1 +m30 net-_m29-pad3_ net-_m30-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m42 net-_m41-pad3_ net-_m38-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m27 net-_m25-pad1_ net-_m25-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m25 net-_m25-pad1_ net-_m25-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m45 net-_m30-pad2_ net-_m38-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m47 net-_m30-pad2_ net-_m38-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +* Control Statements + +.ends CD_4077
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD_4077/CD_4077_Previous_Values.xml b/library/SubcircuitLibrary/CD_4077/CD_4077_Previous_Values.xml new file mode 100644 index 00000000..fa4a68a2 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/CD_4077_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><m15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m15><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m11><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m12><m16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m16><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m7><m19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m19><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m8><m20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m20><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m4><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m2><m22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m22><m24><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m24><m39><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m39><m35><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m35><m36><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m36><m40><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m40><m31><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m31><m43><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m43><m32><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m32><m44><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m44><m28><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m28><m26><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field 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/></m34><m38><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m38><m29><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m29><m41><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m41><m30><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m30><m42><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m42><m27><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m27><m25><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m25><m45><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m45><m47><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m47></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD_4077/NMOS-180nm.lib b/library/SubcircuitLibrary/CD_4077/NMOS-180nm.lib new file mode 100644 index 00000000..51e9b119 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/library/SubcircuitLibrary/CD_4077/PMOS-180nm.lib b/library/SubcircuitLibrary/CD_4077/PMOS-180nm.lib new file mode 100644 index 00000000..032b5b95 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/PMOS-180nm.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/library/SubcircuitLibrary/CD_4077/README.md b/library/SubcircuitLibrary/CD_4077/README.md new file mode 100644 index 00000000..2d40325c --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/README.md @@ -0,0 +1,28 @@ + +# CD4077 IC + +It is 2-input XNOR Gate IC. CD4077 IC is designed with 180nm CMOS technology in eSim consisting four XNOR Gates. It plays the role of even 1’s detector. When both inputs are same, then output is HIGH, else LOW. It is also known as Special logic Gate. + +## Usage/Examples + +Logical Comparators + +Adders, Subtractors + +Parity Generators and Checkers + +Touch sensor circuit +## Documentation + +To know the details of CD4077 IC please go through with the documentation : [CD4077_datasheet](https://www.ti.com/lit/gpn/cd4077b) + +## Comments/Notes + +Please note this is a complete digital IC. It works fine at the time of simulation. + +## Contributer + +Name: Ankush Mondal +Email: mondalankush369@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellow 2022
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD_4077/analysis b/library/SubcircuitLibrary/CD_4077/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4077/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
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