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| author | AnkushECE | 2022-08-24 23:09:41 +0530 |
|---|---|---|
| committer | AnkushECE | 2022-08-24 23:09:41 +0530 |
| commit | 2ca7e025d9b51c163c35a5eec449eb6243da3d16 (patch) | |
| tree | 6f471dfc24d7d59075ac0ecae79ccc4dbde16a3c /library/SubcircuitLibrary/CD54_HC153 | |
| parent | 384063ac62c38df8d042c22c27ddb5f4a9417f78 (diff) | |
| download | eSim-2ca7e025d9b51c163c35a5eec449eb6243da3d16.tar.gz eSim-2ca7e025d9b51c163c35a5eec449eb6243da3d16.tar.bz2 eSim-2ca7e025d9b51c163c35a5eec449eb6243da3d16.zip | |
CD54HC153 is 4x1 Multiplexer IC.
Diffstat (limited to 'library/SubcircuitLibrary/CD54_HC153')
18 files changed, 3430 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_157-cache.lib b/library/SubcircuitLibrary/CD54_HC153/CD54_157-cache.lib new file mode 100644 index 00000000..6c512720 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_157-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_MOS_N +# +DEF eSim_MOS_N M 0 0 Y N 1 F N +F0 "M" 0 -150 50 H V R CNN +F1 "eSim_MOS_N" 100 -50 50 H V R CNN +F2 "" 300 -300 29 H V C CNN +F3 "" 100 -200 60 H V C CNN +ALIAS mosfet_n +DRAW +C 150 -200 111 0 1 10 N +P 2 0 1 10 130 -290 130 -250 N +P 2 0 1 0 130 -270 200 -270 N +P 2 0 1 10 130 -220 130 -180 N +P 2 0 1 0 130 -200 200 -200 N +P 2 0 1 10 130 -150 130 -110 N +P 2 0 1 0 130 -130 200 -130 N +P 2 0 1 0 200 -300 200 -270 N +P 2 0 1 0 200 -130 200 -100 N +P 3 0 1 10 110 -275 110 -125 110 -125 N +P 3 0 1 0 200 -200 300 -200 300 -250 N +P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F +X D 1 200 0 100 D 50 50 1 1 P +X G 2 -100 -200 210 R 50 50 1 1 P +X S 3 200 -400 100 U 50 50 1 1 P +X B 4 300 -350 98 U 47 47 1 1 P +ENDDRAW +ENDDEF +# +# eSim_MOS_P +# +DEF eSim_MOS_P M 0 0 Y N 1 F N +F0 "M" -50 50 50 H V R CNN +F1 "eSim_MOS_P" 50 150 50 H V R CNN +F2 "" 250 100 29 H V C CNN +F3 "" 50 0 60 H V C CNN +ALIAS mosfet_p +DRAW +C 100 0 111 0 1 10 N +P 2 0 1 0 80 -70 150 -70 N +P 2 0 1 10 80 -50 80 -90 N +P 2 0 1 0 80 0 150 0 N +P 2 0 1 10 80 20 80 -20 N +P 2 0 1 0 80 70 150 70 N +P 2 0 1 10 80 90 80 50 N +P 2 0 1 0 150 -70 150 -100 N +P 2 0 1 0 150 100 150 70 N +P 3 0 1 10 60 75 60 -75 60 -75 N +P 3 0 1 0 150 0 250 0 250 -50 N +P 4 0 1 0 140 0 100 -15 100 15 140 0 F +X D 1 150 200 100 D 50 50 1 1 P +X G 2 -150 0 210 R 50 50 1 1 P +X S 3 150 -200 100 U 50 50 1 1 P +X B 4 250 -150 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_157.cir b/library/SubcircuitLibrary/CD54_HC153/CD54_157.cir new file mode 100644 index 00000000..8a833fef --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_157.cir @@ -0,0 +1,75 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157\CD54_157.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 06/14/22 12:01:36 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +M55 Net-_M55-Pad1_ /i0_3 /vcc /vcc eSim_MOS_P +M60 Net-_M55-Pad1_ Net-_M58-Pad2_ /vcc /vcc eSim_MOS_P +M65 Net-_M55-Pad1_ Net-_M57-Pad2_ /vcc /vcc eSim_MOS_P +M56 /y3_bar /i1_3 Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P +M61 /y3_bar Net-_M58-Pad2_ Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P +M66 /y3_bar /s Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P +M57 /y3_bar Net-_M57-Pad2_ Net-_M57-Pad3_ Net-_M57-Pad3_ eSim_MOS_N +M58 Net-_M57-Pad3_ Net-_M58-Pad2_ Net-_M58-Pad3_ Net-_M58-Pad3_ eSim_MOS_N +M59 Net-_M58-Pad3_ /i0_3 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M62 /y3_bar /s Net-_M62-Pad3_ Net-_M62-Pad3_ eSim_MOS_N +M63 Net-_M62-Pad3_ Net-_M58-Pad2_ Net-_M63-Pad3_ Net-_M63-Pad3_ eSim_MOS_N +M64 Net-_M63-Pad3_ /i1_3 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M68 Net-_M57-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M67 Net-_M57-Pad2_ /s /vcc /vcc eSim_MOS_P +M71 Net-_M58-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P +M72 Net-_M58-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M1 Net-_M1-Pad1_ /i0_1 /vcc /vcc eSim_MOS_P +M11 Net-_M1-Pad1_ Net-_M11-Pad2_ /vcc /vcc eSim_MOS_P +M18 Net-_M1-Pad1_ Net-_M18-Pad2_ /vcc /vcc eSim_MOS_P +M2 /y1_bar /i1_1 Net-_M1-Pad1_ Net-_M1-Pad1_ eSim_MOS_P +M12 /y1_bar Net-_M11-Pad2_ Net-_M1-Pad1_ Net-_M1-Pad1_ eSim_MOS_P +M19 /y1_bar /s Net-_M1-Pad1_ Net-_M1-Pad1_ eSim_MOS_P +M3 /y1_bar Net-_M18-Pad2_ Net-_M3-Pad3_ Net-_M3-Pad3_ eSim_MOS_N +M4 Net-_M3-Pad3_ Net-_M11-Pad2_ Net-_M4-Pad3_ Net-_M4-Pad3_ eSim_MOS_N +M5 Net-_M4-Pad3_ /i0_1 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M15 /y1_bar /s Net-_M15-Pad3_ Net-_M15-Pad3_ eSim_MOS_N +M16 Net-_M15-Pad3_ Net-_M11-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N +M17 Net-_M16-Pad3_ /i1_1 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M26 Net-_M18-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M25 Net-_M18-Pad2_ /s /vcc /vcc eSim_MOS_P +M33 Net-_M11-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P +M34 Net-_M11-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M6 Net-_M13-Pad1_ /i0_2 /vcc /vcc eSim_MOS_P +M13 Net-_M13-Pad1_ Net-_M13-Pad2_ /vcc /vcc eSim_MOS_P +M23 Net-_M13-Pad1_ Net-_M23-Pad2_ /vcc /vcc eSim_MOS_P +M7 /y2_bar /i1_2 Net-_M13-Pad1_ Net-_M13-Pad1_ eSim_MOS_P +M14 /y2_bar Net-_M13-Pad2_ Net-_M13-Pad1_ Net-_M13-Pad1_ eSim_MOS_P +M24 /y2_bar /s Net-_M13-Pad1_ Net-_M13-Pad1_ eSim_MOS_P +M8 /y2_bar Net-_M23-Pad2_ Net-_M8-Pad3_ Net-_M8-Pad3_ eSim_MOS_N +M9 Net-_M8-Pad3_ Net-_M13-Pad2_ Net-_M10-Pad1_ Net-_M10-Pad1_ eSim_MOS_N +M10 Net-_M10-Pad1_ /i0_2 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M20 /y2_bar /s Net-_M20-Pad3_ Net-_M20-Pad3_ eSim_MOS_N +M21 Net-_M20-Pad3_ Net-_M13-Pad2_ Net-_M21-Pad3_ Net-_M21-Pad3_ eSim_MOS_N +M22 Net-_M21-Pad3_ /i1_2 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M30 Net-_M23-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M29 Net-_M23-Pad2_ /s /vcc /vcc eSim_MOS_P +M35 Net-_M13-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P +M36 Net-_M13-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M37 Net-_M37-Pad1_ /i0_4 /vcc /vcc eSim_MOS_P +M42 Net-_M37-Pad1_ Net-_M40-Pad2_ /vcc /vcc eSim_MOS_P +M47 Net-_M37-Pad1_ Net-_M39-Pad2_ /vcc /vcc eSim_MOS_P +M38 /y4_bar /i1_4 Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P +M43 /y4_bar Net-_M40-Pad2_ Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P +M48 /y4_bar /s Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P +M39 /y4_bar Net-_M39-Pad2_ Net-_M39-Pad3_ Net-_M39-Pad3_ eSim_MOS_N +M40 Net-_M39-Pad3_ Net-_M40-Pad2_ Net-_M40-Pad3_ Net-_M40-Pad3_ eSim_MOS_N +M41 Net-_M40-Pad3_ /i0_4 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M44 /y4_bar /s Net-_M44-Pad3_ Net-_M44-Pad3_ eSim_MOS_N +M45 Net-_M44-Pad3_ Net-_M40-Pad2_ Net-_M45-Pad3_ Net-_M45-Pad3_ eSim_MOS_N +M46 Net-_M45-Pad3_ /i1_4 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M50 Net-_M39-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M49 Net-_M39-Pad2_ /s /vcc /vcc eSim_MOS_P +M53 Net-_M40-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P +M54 Net-_M40-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +U1 /s /i0_1 /i1_1 /y1_bar /i0_2 /i1_2 /y2_bar Net-_M10-Pad3_ /y4_bar /i1_4 /i0_4 /y3_bar /i1_3 /i0_3 /enable_bar /vcc PORT + +.end diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_157.cir.out b/library/SubcircuitLibrary/CD54_HC153/CD54_157.cir.out new file mode 100644 index 00000000..1f4b4837 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_157.cir.out @@ -0,0 +1,78 @@ +* c:\fossee\esim\library\subcircuitlibrary\cd54_157\cd54_157.cir + +.include PMOS-180nm.lib +.include NMOS-180nm.lib +m55 net-_m55-pad1_ /i0_3 /vcc /vcc CMOSP W=100u L=100u M=1 +m60 net-_m55-pad1_ net-_m58-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m65 net-_m55-pad1_ net-_m57-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m56 /y3_bar /i1_3 net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1 +m61 /y3_bar net-_m58-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1 +m66 /y3_bar /s net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1 +m57 /y3_bar net-_m57-pad2_ net-_m57-pad3_ net-_m57-pad3_ CMOSN W=100u L=100u M=1 +m58 net-_m57-pad3_ net-_m58-pad2_ net-_m58-pad3_ net-_m58-pad3_ CMOSN W=100u L=100u M=1 +m59 net-_m58-pad3_ /i0_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m62 /y3_bar /s net-_m62-pad3_ net-_m62-pad3_ CMOSN W=100u L=100u M=1 +m63 net-_m62-pad3_ net-_m58-pad2_ net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1 +m64 net-_m63-pad3_ /i1_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m68 net-_m57-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m67 net-_m57-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m71 net-_m58-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m72 net-_m58-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m1 net-_m1-pad1_ /i0_1 /vcc /vcc CMOSP W=100u L=100u M=1 +m11 net-_m1-pad1_ net-_m11-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m18 net-_m1-pad1_ net-_m18-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m2 /y1_bar /i1_1 net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1 +m12 /y1_bar net-_m11-pad2_ net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1 +m19 /y1_bar /s net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1 +m3 /y1_bar net-_m18-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m3-pad3_ net-_m11-pad2_ net-_m4-pad3_ net-_m4-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m4-pad3_ /i0_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m15 /y1_bar /s net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1 +m16 net-_m15-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1 +m17 net-_m16-pad3_ /i1_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m26 net-_m18-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m25 net-_m18-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m33 net-_m11-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m34 net-_m11-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m13-pad1_ /i0_2 /vcc /vcc CMOSP W=100u L=100u M=1 +m13 net-_m13-pad1_ net-_m13-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m23 net-_m13-pad1_ net-_m23-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m7 /y2_bar /i1_2 net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1 +m14 /y2_bar net-_m13-pad2_ net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1 +m24 /y2_bar /s net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1 +m8 /y2_bar net-_m23-pad2_ net-_m8-pad3_ net-_m8-pad3_ CMOSN W=100u L=100u M=1 +m9 net-_m8-pad3_ net-_m13-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1 +m10 net-_m10-pad1_ /i0_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m20 /y2_bar /s net-_m20-pad3_ net-_m20-pad3_ CMOSN W=100u L=100u M=1 +m21 net-_m20-pad3_ net-_m13-pad2_ net-_m21-pad3_ net-_m21-pad3_ CMOSN W=100u L=100u M=1 +m22 net-_m21-pad3_ /i1_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m30 net-_m23-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m29 net-_m23-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m35 net-_m13-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m36 net-_m13-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m37 net-_m37-pad1_ /i0_4 /vcc /vcc CMOSP W=100u L=100u M=1 +m42 net-_m37-pad1_ net-_m40-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m47 net-_m37-pad1_ net-_m39-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m38 /y4_bar /i1_4 net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m43 /y4_bar net-_m40-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m48 /y4_bar /s net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m39 /y4_bar net-_m39-pad2_ net-_m39-pad3_ net-_m39-pad3_ CMOSN W=100u L=100u M=1 +m40 net-_m39-pad3_ net-_m40-pad2_ net-_m40-pad3_ net-_m40-pad3_ CMOSN W=100u L=100u M=1 +m41 net-_m40-pad3_ /i0_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m44 /y4_bar /s net-_m44-pad3_ net-_m44-pad3_ CMOSN W=100u L=100u M=1 +m45 net-_m44-pad3_ net-_m40-pad2_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1 +m46 net-_m45-pad3_ /i1_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m50 net-_m39-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m49 net-_m39-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m53 net-_m40-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m54 net-_m40-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +* u1 /s /i0_1 /i1_1 /y1_bar /i0_2 /i1_2 /y2_bar net-_m10-pad3_ /y4_bar /i1_4 /i0_4 /y3_bar /i1_3 /i0_3 /enable_bar /vcc port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_157.pro b/library/SubcircuitLibrary/CD54_HC153/CD54_157.pro new file mode 100644 index 00000000..d7f78c3b --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_157.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_157.sch b/library/SubcircuitLibrary/CD54_HC153/CD54_157.sch new file mode 100644 index 00000000..1e92f660 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_157.sch @@ -0,0 +1,1721 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:CD54_157-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_MOS_P M55 +U 1 1 62A758F3 +P 6850 1300 +F 0 "M55" H 6800 1350 50 0000 R CNN +F 1 "eSim_MOS_P" H 6900 1450 50 0000 R CNN +F 2 "" H 7100 1400 29 0000 C CNN +F 3 "" H 6900 1300 60 0000 C CNN + 1 6850 1300 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M60 +U 1 1 62A758F4 +P 7700 1300 +F 0 "M60" H 7650 1350 50 0000 R CNN +F 1 "eSim_MOS_P" H 7750 1450 50 0000 R CNN +F 2 "" H 7950 1400 29 0000 C CNN +F 3 "" H 7750 1300 60 0000 C CNN + 1 7700 1300 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M65 +U 1 1 62A758F5 +P 8350 1300 +F 0 "M65" H 8300 1350 50 0000 R CNN +F 1 "eSim_MOS_P" H 8400 1450 50 0000 R CNN +F 2 "" H 8600 1400 29 0000 C CNN +F 3 "" H 8400 1300 60 0000 C CNN + 1 8350 1300 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M56 +U 1 1 62A758F6 +P 6850 1850 +F 0 "M56" H 6800 1900 50 0000 R CNN +F 1 "eSim_MOS_P" H 6900 2000 50 0000 R CNN +F 2 "" H 7100 1950 29 0000 C CNN +F 3 "" H 6900 1850 60 0000 C CNN + 1 6850 1850 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M61 +U 1 1 62A758F7 +P 7700 1850 +F 0 "M61" H 7650 1900 50 0000 R CNN +F 1 "eSim_MOS_P" H 7750 2000 50 0000 R CNN +F 2 "" H 7950 1950 29 0000 C CNN +F 3 "" H 7750 1850 60 0000 C CNN + 1 7700 1850 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M66 +U 1 1 62A758F8 +P 8350 1850 +F 0 "M66" H 8300 1900 50 0000 R CNN +F 1 "eSim_MOS_P" H 8400 2000 50 0000 R CNN +F 2 "" H 8600 1950 29 0000 C CNN +F 3 "" H 8400 1850 60 0000 C CNN + 1 8350 1850 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M57 +U 1 1 62A758F9 +P 7000 2550 +F 0 "M57" H 7000 2400 50 0000 R CNN +F 1 "eSim_MOS_N" H 7100 2500 50 0000 R CNN +F 2 "" H 7300 2250 29 0000 C CNN +F 3 "" H 7100 2350 60 0000 C CNN + 1 7000 2550 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M58 +U 1 1 62A758FA +P 7000 3100 +F 0 "M58" H 7000 2950 50 0000 R CNN +F 1 "eSim_MOS_N" H 7100 3050 50 0000 R CNN +F 2 "" H 7300 2800 29 0000 C CNN +F 3 "" H 7100 2900 60 0000 C CNN + 1 7000 3100 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M59 +U 1 1 62A758FB +P 7000 3650 +F 0 "M59" H 7000 3500 50 0000 R CNN +F 1 "eSim_MOS_N" H 7100 3600 50 0000 R CNN +F 2 "" H 7300 3350 29 0000 C CNN +F 3 "" H 7100 3450 60 0000 C CNN + 1 7000 3650 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M62 +U 1 1 62A758FC +P 8250 2550 +F 0 "M62" H 8250 2400 50 0000 R CNN +F 1 "eSim_MOS_N" H 8350 2500 50 0000 R CNN +F 2 "" H 8550 2250 29 0000 C CNN +F 3 "" H 8350 2350 60 0000 C CNN + 1 8250 2550 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M63 +U 1 1 62A758FD +P 8250 3100 +F 0 "M63" H 8250 2950 50 0000 R CNN +F 1 "eSim_MOS_N" H 8350 3050 50 0000 R CNN +F 2 "" H 8550 2800 29 0000 C CNN +F 3 "" H 8350 2900 60 0000 C CNN + 1 8250 3100 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M64 +U 1 1 62A758FE +P 8250 3650 +F 0 "M64" H 8250 3500 50 0000 R CNN +F 1 "eSim_MOS_N" H 8350 3600 50 0000 R CNN +F 2 "" H 8550 3350 29 0000 C CNN +F 3 "" H 8350 3450 60 0000 C CNN + 1 8250 3650 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M68 +U 1 1 62A758FF +P 9450 1700 +F 0 "M68" H 9450 1550 50 0000 R CNN +F 1 "eSim_MOS_N" H 9550 1650 50 0000 R CNN +F 2 "" H 9750 1400 29 0000 C CNN +F 3 "" H 9550 1500 60 0000 C CNN + 1 9450 1700 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M67 +U 1 1 62A75900 +P 9400 1300 +F 0 "M67" H 9350 1350 50 0000 R CNN +F 1 "eSim_MOS_P" H 9450 1450 50 0000 R CNN +F 2 "" H 9650 1400 29 0000 C CNN +F 3 "" H 9450 1300 60 0000 C CNN + 1 9400 1300 + -1 0 0 1 +$EndComp +Text Label 6550 1300 0 60 ~ 0 +i0_3 +Text Label 6450 1850 0 60 ~ 0 +i1_3 +Text Label 11550 1100 0 60 ~ 0 +sel +Text Label 9050 2300 0 60 ~ 0 +y3_bar +$Comp +L eSim_MOS_P M71 +U 1 1 62A7D356 +P 10250 2800 +F 0 "M71" H 10200 2850 50 0000 R CNN +F 1 "eSim_MOS_P" H 10300 2950 50 0000 R CNN +F 2 "" H 10500 2900 29 0000 C CNN +F 3 "" H 10300 2800 60 0000 C CNN + 1 10250 2800 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M72 +U 1 1 62A7D35C +P 10300 3150 +F 0 "M72" H 10300 3000 50 0000 R CNN +F 1 "eSim_MOS_N" H 10400 3100 50 0000 R CNN +F 2 "" H 10600 2850 29 0000 C CNN +F 3 "" H 10400 2950 60 0000 C CNN + 1 10300 3150 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M1 +U 1 1 62A8A1B2 +P -5350 -50 +F 0 "M1" H -5400 0 50 0000 R CNN +F 1 "eSim_MOS_P" H -5300 100 50 0000 R CNN +F 2 "" H -5100 50 29 0000 C CNN +F 3 "" H -5300 -50 60 0000 C CNN + 1 -5350 -50 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M11 +U 1 1 62A8A1B8 +P -4500 -50 +F 0 "M11" H -4550 0 50 0000 R CNN +F 1 "eSim_MOS_P" H -4450 100 50 0000 R CNN +F 2 "" H -4250 50 29 0000 C CNN +F 3 "" H -4450 -50 60 0000 C CNN + 1 -4500 -50 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M18 +U 1 1 62A8A1BE +P -3850 -50 +F 0 "M18" H -3900 0 50 0000 R CNN +F 1 "eSim_MOS_P" H -3800 100 50 0000 R CNN +F 2 "" H -3600 50 29 0000 C CNN +F 3 "" H -3800 -50 60 0000 C CNN + 1 -3850 -50 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M2 +U 1 1 62A8A1C4 +P -5350 500 +F 0 "M2" H -5400 550 50 0000 R CNN +F 1 "eSim_MOS_P" H -5300 650 50 0000 R CNN +F 2 "" H -5100 600 29 0000 C CNN +F 3 "" H -5300 500 60 0000 C CNN + 1 -5350 500 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M12 +U 1 1 62A8A1CA +P -4500 500 +F 0 "M12" H -4550 550 50 0000 R CNN +F 1 "eSim_MOS_P" H -4450 650 50 0000 R CNN +F 2 "" H -4250 600 29 0000 C CNN +F 3 "" H -4450 500 60 0000 C CNN + 1 -4500 500 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M19 +U 1 1 62A8A1D0 +P -3850 500 +F 0 "M19" H -3900 550 50 0000 R CNN +F 1 "eSim_MOS_P" H -3800 650 50 0000 R CNN +F 2 "" H -3600 600 29 0000 C CNN +F 3 "" H -3800 500 60 0000 C CNN + 1 -3850 500 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M3 +U 1 1 62A8A1D6 +P -5200 1200 +F 0 "M3" H -5200 1050 50 0000 R CNN +F 1 "eSim_MOS_N" H -5100 1150 50 0000 R CNN +F 2 "" H -4900 900 29 0000 C CNN +F 3 "" H -5100 1000 60 0000 C CNN + 1 -5200 1200 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M4 +U 1 1 62A8A1DC +P -5200 1750 +F 0 "M4" H -5200 1600 50 0000 R CNN +F 1 "eSim_MOS_N" H -5100 1700 50 0000 R CNN +F 2 "" H -4900 1450 29 0000 C CNN +F 3 "" H -5100 1550 60 0000 C CNN + 1 -5200 1750 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M5 +U 1 1 62A8A1E2 +P -5200 2300 +F 0 "M5" H -5200 2150 50 0000 R CNN +F 1 "eSim_MOS_N" H -5100 2250 50 0000 R CNN +F 2 "" H -4900 2000 29 0000 C CNN +F 3 "" H -5100 2100 60 0000 C CNN + 1 -5200 2300 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M15 +U 1 1 62A8A1E8 +P -3950 1200 +F 0 "M15" H -3950 1050 50 0000 R CNN +F 1 "eSim_MOS_N" H -3850 1150 50 0000 R CNN +F 2 "" H -3650 900 29 0000 C CNN +F 3 "" H -3850 1000 60 0000 C CNN + 1 -3950 1200 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M16 +U 1 1 62A8A1EE +P -3950 1750 +F 0 "M16" H -3950 1600 50 0000 R CNN +F 1 "eSim_MOS_N" H -3850 1700 50 0000 R CNN +F 2 "" H -3650 1450 29 0000 C CNN +F 3 "" H -3850 1550 60 0000 C CNN + 1 -3950 1750 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M17 +U 1 1 62A8A1F4 +P -3950 2300 +F 0 "M17" H -3950 2150 50 0000 R CNN +F 1 "eSim_MOS_N" H -3850 2250 50 0000 R CNN +F 2 "" H -3650 2000 29 0000 C CNN +F 3 "" H -3850 2100 60 0000 C CNN + 1 -3950 2300 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M26 +U 1 1 62A8A1FA +P -2750 350 +F 0 "M26" H -2750 200 50 0000 R CNN +F 1 "eSim_MOS_N" H -2650 300 50 0000 R CNN +F 2 "" H -2450 50 29 0000 C CNN +F 3 "" H -2650 150 60 0000 C CNN + 1 -2750 350 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M25 +U 1 1 62A8A200 +P -2800 -50 +F 0 "M25" H -2850 0 50 0000 R CNN +F 1 "eSim_MOS_P" H -2750 100 50 0000 R CNN +F 2 "" H -2550 50 29 0000 C CNN +F 3 "" H -2750 -50 60 0000 C CNN + 1 -2800 -50 + -1 0 0 1 +$EndComp +Text Label -5650 -50 0 60 ~ 0 +i0_1 +Text Label -5750 500 0 60 ~ 0 +i1_1 +Text Label -2350 250 0 60 ~ 0 +s +Text Label -8300 100 0 60 ~ 0 +vcc +Text Label -3000 950 2 60 ~ 0 +y1_bar +$Comp +L eSim_MOS_P M33 +U 1 1 62A8A287 +P -1950 1450 +F 0 "M33" H -2000 1500 50 0000 R CNN +F 1 "eSim_MOS_P" H -1900 1600 50 0000 R CNN +F 2 "" H -1700 1550 29 0000 C CNN +F 3 "" H -1900 1450 60 0000 C CNN + 1 -1950 1450 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M34 +U 1 1 62A8A28D +P -1900 1800 +F 0 "M34" H -1900 1650 50 0000 R CNN +F 1 "eSim_MOS_N" H -1800 1750 50 0000 R CNN +F 2 "" H -1600 1500 29 0000 C CNN +F 3 "" H -1800 1600 60 0000 C CNN + 1 -1900 1800 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M6 +U 1 1 62A8A727 +P -5200 4400 +F 0 "M6" H -5250 4450 50 0000 R CNN +F 1 "eSim_MOS_P" H -5150 4550 50 0000 R CNN +F 2 "" H -4950 4500 29 0000 C CNN +F 3 "" H -5150 4400 60 0000 C CNN + 1 -5200 4400 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M13 +U 1 1 62A8A72D +P -4350 4400 +F 0 "M13" H -4400 4450 50 0000 R CNN +F 1 "eSim_MOS_P" H -4300 4550 50 0000 R CNN +F 2 "" H -4100 4500 29 0000 C CNN +F 3 "" H -4300 4400 60 0000 C CNN + 1 -4350 4400 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M23 +U 1 1 62A8A733 +P -3700 4400 +F 0 "M23" H -3750 4450 50 0000 R CNN +F 1 "eSim_MOS_P" H -3650 4550 50 0000 R CNN +F 2 "" H -3450 4500 29 0000 C CNN +F 3 "" H -3650 4400 60 0000 C CNN + 1 -3700 4400 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M7 +U 1 1 62A8A739 +P -5200 4950 +F 0 "M7" H -5250 5000 50 0000 R CNN +F 1 "eSim_MOS_P" H -5150 5100 50 0000 R CNN +F 2 "" H -4950 5050 29 0000 C CNN +F 3 "" H -5150 4950 60 0000 C CNN + 1 -5200 4950 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M14 +U 1 1 62A8A73F +P -4350 4950 +F 0 "M14" H -4400 5000 50 0000 R CNN +F 1 "eSim_MOS_P" H -4300 5100 50 0000 R CNN +F 2 "" H -4100 5050 29 0000 C CNN +F 3 "" H -4300 4950 60 0000 C CNN + 1 -4350 4950 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M24 +U 1 1 62A8A745 +P -3700 4950 +F 0 "M24" H -3750 5000 50 0000 R CNN +F 1 "eSim_MOS_P" H -3650 5100 50 0000 R CNN +F 2 "" H -3450 5050 29 0000 C CNN +F 3 "" H -3650 4950 60 0000 C CNN + 1 -3700 4950 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M8 +U 1 1 62A8A74B +P -5050 5650 +F 0 "M8" H -5050 5500 50 0000 R CNN +F 1 "eSim_MOS_N" H -4950 5600 50 0000 R CNN +F 2 "" H -4750 5350 29 0000 C CNN +F 3 "" H -4950 5450 60 0000 C CNN + 1 -5050 5650 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M9 +U 1 1 62A8A751 +P -5050 6200 +F 0 "M9" H -5050 6050 50 0000 R CNN +F 1 "eSim_MOS_N" H -4950 6150 50 0000 R CNN +F 2 "" H -4750 5900 29 0000 C CNN +F 3 "" H -4950 6000 60 0000 C CNN + 1 -5050 6200 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M10 +U 1 1 62A8A757 +P -5050 6750 +F 0 "M10" H -5050 6600 50 0000 R CNN +F 1 "eSim_MOS_N" H -4950 6700 50 0000 R CNN +F 2 "" H -4750 6450 29 0000 C CNN +F 3 "" H -4950 6550 60 0000 C CNN + 1 -5050 6750 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M20 +U 1 1 62A8A75D +P -3800 5650 +F 0 "M20" H -3800 5500 50 0000 R CNN +F 1 "eSim_MOS_N" H -3700 5600 50 0000 R CNN +F 2 "" H -3500 5350 29 0000 C CNN +F 3 "" H -3700 5450 60 0000 C CNN + 1 -3800 5650 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M21 +U 1 1 62A8A763 +P -3800 6200 +F 0 "M21" H -3800 6050 50 0000 R CNN +F 1 "eSim_MOS_N" H -3700 6150 50 0000 R CNN +F 2 "" H -3500 5900 29 0000 C CNN +F 3 "" H -3700 6000 60 0000 C CNN + 1 -3800 6200 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M22 +U 1 1 62A8A769 +P -3800 6750 +F 0 "M22" H -3800 6600 50 0000 R CNN +F 1 "eSim_MOS_N" H -3700 6700 50 0000 R CNN +F 2 "" H -3500 6450 29 0000 C CNN +F 3 "" H -3700 6550 60 0000 C CNN + 1 -3800 6750 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M30 +U 1 1 62A8A76F +P -2600 4800 +F 0 "M30" H -2600 4650 50 0000 R CNN +F 1 "eSim_MOS_N" H -2500 4750 50 0000 R CNN +F 2 "" H -2300 4500 29 0000 C CNN +F 3 "" H -2500 4600 60 0000 C CNN + 1 -2600 4800 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M29 +U 1 1 62A8A775 +P -2650 4400 +F 0 "M29" H -2700 4450 50 0000 R CNN +F 1 "eSim_MOS_P" H -2600 4550 50 0000 R CNN +F 2 "" H -2400 4500 29 0000 C CNN +F 3 "" H -2600 4400 60 0000 C CNN + 1 -2650 4400 + -1 0 0 1 +$EndComp +Text Label -5500 4400 0 60 ~ 0 +i0_2 +Text Label -5600 4950 0 60 ~ 0 +i1_2 +Text Label -2200 4700 0 60 ~ 0 +s +Text Label -3050 5400 0 60 ~ 0 +y2_bar +Text Label 11500 4450 0 60 ~ 0 +enable_bar +$Comp +L eSim_MOS_P M35 +U 1 1 62A8A7FC +P -1800 5900 +F 0 "M35" H -1850 5950 50 0000 R CNN +F 1 "eSim_MOS_P" H -1750 6050 50 0000 R CNN +F 2 "" H -1550 6000 29 0000 C CNN +F 3 "" H -1750 5900 60 0000 C CNN + 1 -1800 5900 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M36 +U 1 1 62A8A802 +P -1750 6250 +F 0 "M36" H -1750 6100 50 0000 R CNN +F 1 "eSim_MOS_N" H -1650 6200 50 0000 R CNN +F 2 "" H -1450 5950 29 0000 C CNN +F 3 "" H -1650 6050 60 0000 C CNN + 1 -1750 6250 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M37 +U 1 1 62A8AFEC +P 2600 3850 +F 0 "M37" H 2550 3900 50 0000 R CNN +F 1 "eSim_MOS_P" H 2650 4000 50 0000 R CNN +F 2 "" H 2850 3950 29 0000 C CNN +F 3 "" H 2650 3850 60 0000 C CNN + 1 2600 3850 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M42 +U 1 1 62A8AFF2 +P 3450 3850 +F 0 "M42" H 3400 3900 50 0000 R CNN +F 1 "eSim_MOS_P" H 3500 4000 50 0000 R CNN +F 2 "" H 3700 3950 29 0000 C CNN +F 3 "" H 3500 3850 60 0000 C CNN + 1 3450 3850 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M47 +U 1 1 62A8AFF8 +P 4100 3850 +F 0 "M47" H 4050 3900 50 0000 R CNN +F 1 "eSim_MOS_P" H 4150 4000 50 0000 R CNN +F 2 "" H 4350 3950 29 0000 C CNN +F 3 "" H 4150 3850 60 0000 C CNN + 1 4100 3850 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M38 +U 1 1 62A8AFFE +P 2600 4400 +F 0 "M38" H 2550 4450 50 0000 R CNN +F 1 "eSim_MOS_P" H 2650 4550 50 0000 R CNN +F 2 "" H 2850 4500 29 0000 C CNN +F 3 "" H 2650 4400 60 0000 C CNN + 1 2600 4400 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M43 +U 1 1 62A8B004 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--git a/library/SubcircuitLibrary/CD54_HC153/CD54_157.sub b/library/SubcircuitLibrary/CD54_HC153/CD54_157.sub new file mode 100644 index 00000000..9d85337b --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_157.sub @@ -0,0 +1,72 @@ +* Subcircuit CD54_157 +.subckt CD54_157 /s /i0_1 /i1_1 /y1_bar /i0_2 /i1_2 /y2_bar net-_m10-pad3_ /y4_bar /i1_4 /i0_4 /y3_bar /i1_3 /i0_3 /enable_bar /vcc +* c:\fossee\esim\library\subcircuitlibrary\cd54_157\cd54_157.cir +.include PMOS-180nm.lib +.include NMOS-180nm.lib +m55 net-_m55-pad1_ /i0_3 /vcc /vcc CMOSP W=100u L=100u M=1 +m60 net-_m55-pad1_ net-_m58-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m65 net-_m55-pad1_ net-_m57-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m56 /y3_bar /i1_3 net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1 +m61 /y3_bar net-_m58-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1 +m66 /y3_bar /s net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1 +m57 /y3_bar net-_m57-pad2_ net-_m57-pad3_ net-_m57-pad3_ CMOSN W=100u L=100u M=1 +m58 net-_m57-pad3_ net-_m58-pad2_ net-_m58-pad3_ net-_m58-pad3_ CMOSN W=100u L=100u M=1 +m59 net-_m58-pad3_ /i0_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m62 /y3_bar /s net-_m62-pad3_ net-_m62-pad3_ CMOSN W=100u L=100u M=1 +m63 net-_m62-pad3_ net-_m58-pad2_ net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1 +m64 net-_m63-pad3_ /i1_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m68 net-_m57-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m67 net-_m57-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m71 net-_m58-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m72 net-_m58-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m1 net-_m1-pad1_ /i0_1 /vcc /vcc CMOSP W=100u L=100u M=1 +m11 net-_m1-pad1_ net-_m11-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m18 net-_m1-pad1_ net-_m18-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m2 /y1_bar /i1_1 net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1 +m12 /y1_bar net-_m11-pad2_ net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1 +m19 /y1_bar /s net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1 +m3 /y1_bar net-_m18-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m3-pad3_ net-_m11-pad2_ net-_m4-pad3_ net-_m4-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m4-pad3_ /i0_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m15 /y1_bar /s net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1 +m16 net-_m15-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1 +m17 net-_m16-pad3_ /i1_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m26 net-_m18-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m25 net-_m18-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m33 net-_m11-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m34 net-_m11-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m13-pad1_ /i0_2 /vcc /vcc CMOSP W=100u L=100u M=1 +m13 net-_m13-pad1_ net-_m13-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m23 net-_m13-pad1_ net-_m23-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m7 /y2_bar /i1_2 net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1 +m14 /y2_bar net-_m13-pad2_ net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1 +m24 /y2_bar /s net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1 +m8 /y2_bar net-_m23-pad2_ net-_m8-pad3_ net-_m8-pad3_ CMOSN W=100u L=100u M=1 +m9 net-_m8-pad3_ net-_m13-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1 +m10 net-_m10-pad1_ /i0_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m20 /y2_bar /s net-_m20-pad3_ net-_m20-pad3_ CMOSN W=100u L=100u M=1 +m21 net-_m20-pad3_ net-_m13-pad2_ net-_m21-pad3_ net-_m21-pad3_ CMOSN W=100u L=100u M=1 +m22 net-_m21-pad3_ /i1_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m30 net-_m23-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m29 net-_m23-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m35 net-_m13-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m36 net-_m13-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m37 net-_m37-pad1_ /i0_4 /vcc /vcc CMOSP W=100u L=100u M=1 +m42 net-_m37-pad1_ net-_m40-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m47 net-_m37-pad1_ net-_m39-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m38 /y4_bar /i1_4 net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m43 /y4_bar net-_m40-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m48 /y4_bar /s net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m39 /y4_bar net-_m39-pad2_ net-_m39-pad3_ net-_m39-pad3_ CMOSN W=100u L=100u M=1 +m40 net-_m39-pad3_ net-_m40-pad2_ net-_m40-pad3_ net-_m40-pad3_ CMOSN W=100u L=100u M=1 +m41 net-_m40-pad3_ /i0_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m44 /y4_bar /s net-_m44-pad3_ net-_m44-pad3_ CMOSN W=100u L=100u M=1 +m45 net-_m44-pad3_ net-_m40-pad2_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1 +m46 net-_m45-pad3_ /i1_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m50 net-_m39-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m49 net-_m39-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1 +m53 net-_m40-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1 +m54 net-_m40-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +* Control Statements + +.ends CD54_157
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_157_Previous_Values.xml b/library/SubcircuitLibrary/CD54_HC153/CD54_157_Previous_Values.xml new file mode 100644 index 00000000..850ea0ff --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_157_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><m55><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m55><m60><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m60><m65><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m65><m56><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m56><m61><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m61><m66><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m66><m57><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m57><m58><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m58><m59><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m59><m62><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m62><m63><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m63><m64><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m64><m68><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m68><m67><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m67><m71><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m71><m72><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m72><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m1><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m11><m18><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m18><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m2><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m12><m19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m19><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m3><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m4><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m5><m15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m15><m16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m16><m17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m17><m26><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m26><m25><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m25><m33><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m33><m34><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m34><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m6><m13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m13><m23><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m23><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m7><m14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m14><m24><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m24><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m8><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m9><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m10><m20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m20><m21><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m21><m22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m22><m30><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m30><m29><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m29><m35><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m35><m36><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m36><m37><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m37><m42><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m42><m47><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m47><m38><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m38><m43><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m43><m48><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m48><m39><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m39><m40><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m40><m41><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m41><m44><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m44><m45><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m45><m46><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m46><m50><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m50><m49><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m49><m53><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m53><m54><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m54></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_HC153-cache.lib b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153-cache.lib new file mode 100644 index 00000000..fe4a08da --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153-cache.lib @@ -0,0 +1,147 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# CD_54157 +# +DEF CD_54157 X 0 40 Y Y 1 F N +F0 "X" 0 50 60 H V C CNN +F1 "CD_54157" 0 -250 60 V V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -350 200 350 -600 0 1 0 N +X Sel 1 -550 150 200 R 50 50 1 1 I +X I0_1 2 -550 50 200 R 50 50 1 1 I +X I1_1 3 -550 -50 200 R 50 50 1 1 I +X Y1_bar 4 -550 -150 200 R 50 50 1 1 O +X I0_2 5 -550 -250 200 R 50 50 1 1 I +X I1_2 6 -550 -350 200 R 50 50 1 1 I +X Y2_bar 7 -550 -450 200 R 50 50 1 1 O +X GND 8 -550 -550 200 R 50 50 1 1 I +X Y3_bar 9 550 -550 200 L 50 50 1 1 O +X I1_3 10 550 -450 200 L 50 50 1 1 I +X I0_3 11 550 -350 200 L 50 50 1 1 I +X Y4_bar 12 550 -250 200 L 50 50 1 1 O +X I1_4 13 550 -150 200 L 50 50 1 1 I +X I0_4 14 550 -50 200 L 50 50 1 1 I +X E_bar 15 550 50 200 L 50 50 1 1 I +X VCC 16 550 150 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_MOS_N +# +DEF eSim_MOS_N M 0 0 Y N 1 F N +F0 "M" 0 -150 50 H V R CNN +F1 "eSim_MOS_N" 100 -50 50 H V R CNN +F2 "" 300 -300 29 H V C CNN +F3 "" 100 -200 60 H V C CNN +ALIAS mosfet_n +DRAW +C 150 -200 111 0 1 10 N +P 2 0 1 10 130 -290 130 -250 N +P 2 0 1 0 130 -270 200 -270 N +P 2 0 1 10 130 -220 130 -180 N +P 2 0 1 0 130 -200 200 -200 N +P 2 0 1 10 130 -150 130 -110 N +P 2 0 1 0 130 -130 200 -130 N +P 2 0 1 0 200 -300 200 -270 N +P 2 0 1 0 200 -130 200 -100 N +P 3 0 1 10 110 -275 110 -125 110 -125 N +P 3 0 1 0 200 -200 300 -200 300 -250 N +P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F +X D 1 200 0 100 D 50 50 1 1 P +X G 2 -100 -200 210 R 50 50 1 1 P +X S 3 200 -400 100 U 50 50 1 1 P +X B 4 300 -350 98 U 47 47 1 1 P +ENDDRAW +ENDDEF +# +# eSim_MOS_P +# +DEF eSim_MOS_P M 0 0 Y N 1 F N +F0 "M" -50 50 50 H V R CNN +F1 "eSim_MOS_P" 50 150 50 H V R CNN +F2 "" 250 100 29 H V C CNN +F3 "" 50 0 60 H V C CNN +ALIAS mosfet_p +DRAW +C 100 0 111 0 1 10 N +P 2 0 1 0 80 -70 150 -70 N +P 2 0 1 10 80 -50 80 -90 N +P 2 0 1 0 80 0 150 0 N +P 2 0 1 10 80 20 80 -20 N +P 2 0 1 0 80 70 150 70 N +P 2 0 1 10 80 90 80 50 N +P 2 0 1 0 150 -70 150 -100 N +P 2 0 1 0 150 100 150 70 N +P 3 0 1 10 60 75 60 -75 60 -75 N +P 3 0 1 0 150 0 250 0 250 -50 N +P 4 0 1 0 140 0 100 -15 100 15 140 0 F +X D 1 150 200 100 D 50 50 1 1 P +X G 2 -150 0 210 R 50 50 1 1 P +X S 3 150 -200 100 U 50 50 1 1 P +X B 4 250 -150 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.cir b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.cir new file mode 100644 index 00000000..c9b072a5 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.cir @@ -0,0 +1,35 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_HC153\CD54_HC153.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 06/17/22 13:33:21 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 /s0 ? ? ? ? ? ? /gnd Net-_M1-Pad2_ /i1_1 /i0_1 ? ? ? /e_bar_1 /vcc CD_54157 +X2 /s0 ? ? ? ? ? ? /gnd Net-_M3-Pad2_ /i3_1 /i2_1 ? ? ? /e_bar_1 /vcc CD_54157 +X5 /s1 ? ? ? Net-_R1-Pad2_ Net-_R2-Pad2_ Net-_R5-Pad1_ /gnd ? ? ? ? ? ? /e_bar_1 /vcc CD_54157 +M2 Net-_M1-Pad1_ Net-_M1-Pad2_ /vcc /vcc eSim_MOS_P +M1 Net-_M1-Pad1_ Net-_M1-Pad2_ /gnd /gnd eSim_MOS_N +M4 Net-_M3-Pad1_ Net-_M3-Pad2_ /vcc /vcc eSim_MOS_P +M3 Net-_M3-Pad1_ Net-_M3-Pad2_ /gnd /gnd eSim_MOS_N +M10 /y1 Net-_M10-Pad2_ /vcc /vcc eSim_MOS_P +M9 /y1 Net-_M10-Pad2_ /gnd /gnd eSim_MOS_N +R1 Net-_M1-Pad1_ Net-_R1-Pad2_ 1 +R2 Net-_M3-Pad1_ Net-_R2-Pad2_ 1 +R5 Net-_R5-Pad1_ Net-_M10-Pad2_ 1 +X3 /s0 ? ? ? ? ? ? /gnd Net-_M5-Pad2_ /i1_2 /i0_2 ? ? ? /e_bar_2 /vcc CD_54157 +X4 /s0 ? ? ? ? ? ? /gnd Net-_M7-Pad2_ /i3_2 /i2_2 ? ? ? /e_bar_2 /vcc CD_54157 +X6 /s1 ? ? ? Net-_R3-Pad2_ Net-_R4-Pad2_ Net-_R6-Pad1_ /gnd ? ? ? ? ? ? /e_bar_2 /vcc CD_54157 +M6 Net-_M5-Pad1_ Net-_M5-Pad2_ /vcc /vcc eSim_MOS_P +M5 Net-_M5-Pad1_ Net-_M5-Pad2_ /gnd /gnd eSim_MOS_N +M8 Net-_M7-Pad1_ Net-_M7-Pad2_ /vcc /vcc eSim_MOS_P +M7 Net-_M7-Pad1_ Net-_M7-Pad2_ /gnd /gnd eSim_MOS_N +M12 /y2 Net-_M11-Pad2_ /vcc /vcc eSim_MOS_P +M11 /y2 Net-_M11-Pad2_ /gnd /gnd eSim_MOS_N +R3 Net-_M5-Pad1_ Net-_R3-Pad2_ 1 +R4 Net-_M7-Pad1_ Net-_R4-Pad2_ 1 +R6 Net-_R6-Pad1_ Net-_M11-Pad2_ 1 +U1 /e_bar_1 /s1 /i3_1 /i2_1 /i1_1 /i0_1 /y1 /gnd /y2 /i0_2 /i1_2 /i2_2 /i3_2 /s0 /e_bar_2 /vcc PORT + +.end diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.cir.out b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.cir.out new file mode 100644 index 00000000..4a86e695 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.cir.out @@ -0,0 +1,39 @@ +* c:\fossee\esim\library\subcircuitlibrary\cd54_hc153\cd54_hc153.cir + +.include CD54_157.sub +.include NMOS-180nm.lib +.include PMOS-180nm.lib +x1 /s0 ? ? ? ? ? ? /gnd net-_m1-pad2_ /i1_1 /i0_1 ? ? ? /e_bar_1 /vcc CD54_157 +x2 /s0 ? ? ? ? ? ? /gnd net-_m3-pad2_ /i3_1 /i2_1 ? ? ? /e_bar_1 /vcc CD54_157 +x5 /s1 ? ? ? net-_r1-pad2_ net-_r2-pad2_ net-_r5-pad1_ /gnd ? ? ? ? ? ? /e_bar_1 /vcc CD54_157 +m2 net-_m1-pad1_ net-_m1-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m4 net-_m3-pad1_ net-_m3-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m3 net-_m3-pad1_ net-_m3-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m10 /y1 net-_m10-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m9 /y1 net-_m10-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +r1 net-_m1-pad1_ net-_r1-pad2_ 1 +r2 net-_m3-pad1_ net-_r2-pad2_ 1 +r5 net-_r5-pad1_ net-_m10-pad2_ 1 +x3 /s0 ? ? ? ? ? ? /gnd net-_m5-pad2_ /i1_2 /i0_2 ? ? ? /e_bar_2 /vcc CD54_157 +x4 /s0 ? ? ? ? ? ? /gnd net-_m7-pad2_ /i3_2 /i2_2 ? ? ? /e_bar_2 /vcc CD54_157 +x6 /s1 ? ? ? net-_r3-pad2_ net-_r4-pad2_ net-_r6-pad1_ /gnd ? ? ? ? ? ? /e_bar_2 /vcc CD54_157 +m6 net-_m5-pad1_ net-_m5-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m5 net-_m5-pad1_ net-_m5-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m8 net-_m7-pad1_ net-_m7-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m7 net-_m7-pad1_ net-_m7-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m12 /y2 net-_m11-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m11 /y2 net-_m11-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +r3 net-_m5-pad1_ net-_r3-pad2_ 1 +r4 net-_m7-pad1_ net-_r4-pad2_ 1 +r6 net-_r6-pad1_ net-_m11-pad2_ 1 +* u1 /e_bar_1 /s1 /i3_1 /i2_1 /i1_1 /i0_1 /y1 /gnd /y2 /i0_2 /i1_2 /i2_2 /i3_2 /s0 /e_bar_2 /vcc port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.pro b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.pro new file mode 100644 index 00000000..d7f78c3b --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.sch b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.sch new file mode 100644 index 00000000..04e4711c --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.sch @@ -0,0 +1,940 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:CD54HC153-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L CD_54157 X1 +U 1 1 62AC2C84 +P 2150 1300 +F 0 "X1" H 2150 1350 60 0000 C CNN +F 1 "CD_54157" V 2150 1050 60 0000 C CNN +F 2 "" H 2150 1300 60 0001 C CNN +F 3 "" H 2150 1300 60 0001 C CNN + 1 2150 1300 + 1 0 0 -1 +$EndComp +$Comp +L CD_54157 X2 +U 1 1 62AC2C85 +P 2150 2450 +F 0 "X2" H 2150 2500 60 0000 C CNN +F 1 "CD_54157" V 2150 2200 60 0000 C CNN +F 2 "" H 2150 2450 60 0001 C CNN +F 3 "" H 2150 2450 60 0001 C CNN + 1 2150 2450 + 1 0 0 -1 +$EndComp +$Comp +L CD_54157 X5 +U 1 1 62AC2C86 +P 5050 1800 +F 0 "X5" H 5050 1850 60 0000 C CNN +F 1 "CD_54157" V 5050 1550 60 0000 C CNN +F 2 "" H 5050 1800 60 0001 C CNN +F 3 "" H 5050 1800 60 0001 C CNN + 1 5050 1800 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1600 2300 1450 2300 +Wire Wire Line + 1450 2300 1450 1150 +Wire Wire Line + 1000 1150 1600 1150 +Wire Wire Line + 2700 1250 5800 1250 +Wire Wire Line + 2850 1000 2850 2400 +Wire Wire Line + 2850 2400 2700 2400 +Connection ~ 2850 1250 +$Comp +L eSim_MOS_P M2 +U 1 1 62AC2C87 +P 3350 1600 +F 0 "M2" H 3300 1650 50 0000 R CNN +F 1 "eSim_MOS_P" H 3400 1750 50 0000 R CNN +F 2 "" H 3600 1700 29 0000 C CNN +F 3 "" H 3400 1600 60 0000 C CNN + 1 3350 1600 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M1 +U 1 1 62AC2C88 +P 3300 1950 +F 0 "M1" H 3300 1800 50 0000 R CNN +F 1 "eSim_MOS_N" H 3400 1900 50 0000 R CNN +F 2 "" H 3600 1650 29 0000 C CNN +F 3 "" H 3400 1750 60 0000 C CNN + 1 3300 1950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3500 1800 3500 1950 +Wire Wire Line + 3200 1600 3100 1600 +Wire Wire Line + 3100 1600 3100 2150 +Wire Wire Line + 3100 2150 3200 2150 +Wire Wire Line + 3500 1400 3600 1400 +Wire Wire Line + 3600 1400 3600 1450 +Wire Wire Line + 3600 2350 3600 2300 +Wire Wire Line + 3000 2350 3600 2350 +$Comp +L eSim_MOS_P M4 +U 1 1 62AC2C89 +P 3500 2750 +F 0 "M4" H 3450 2800 50 0000 R CNN +F 1 "eSim_MOS_P" H 3550 2900 50 0000 R CNN +F 2 "" H 3750 2850 29 0000 C CNN +F 3 "" H 3550 2750 60 0000 C CNN + 1 3500 2750 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M3 +U 1 1 62AC2C8A +P 3450 3100 +F 0 "M3" H 3450 2950 50 0000 R CNN +F 1 "eSim_MOS_N" H 3550 3050 50 0000 R CNN +F 2 "" H 3750 2800 29 0000 C CNN +F 3 "" H 3550 2900 60 0000 C CNN + 1 3450 3100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3650 2950 3650 3100 +Wire Wire Line + 3350 2750 3250 2750 +Wire Wire Line + 3250 2750 3250 3300 +Wire Wire Line + 3250 3300 3350 3300 +Wire Wire Line + 3650 2550 3750 2550 +Wire Wire Line + 3750 2550 3750 2600 +Wire Wire Line + 3750 3500 3750 3450 +Wire Wire Line + 5600 1750 5800 1750 +Wire Wire Line + 5800 1750 5800 1250 +Wire Wire Line + 2850 1000 1250 1000 +Wire Wire Line + 2700 1850 3100 1850 +Connection ~ 3100 1850 +Wire Wire Line + 2700 3000 3250 3000 +Connection ~ 3250 3000 +$Comp +L eSim_MOS_P M10 +U 1 1 62AC2C8B +P 6000 2450 +F 0 "M10" H 5950 2500 50 0000 R CNN +F 1 "eSim_MOS_P" H 6050 2600 50 0000 R CNN +F 2 "" H 6250 2550 29 0000 C CNN +F 3 "" H 6050 2450 60 0000 C CNN + 1 6000 2450 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M9 +U 1 1 62AC2C8C +P 5950 2800 +F 0 "M9" H 5950 2650 50 0000 R CNN +F 1 "eSim_MOS_N" H 6050 2750 50 0000 R CNN +F 2 "" H 6250 2500 29 0000 C CNN +F 3 "" H 6050 2600 60 0000 C CNN + 1 5950 2800 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6150 2650 6150 2800 +Wire Wire Line + 5850 2450 5750 2450 +Wire Wire Line + 5750 2450 5750 3000 +Wire Wire Line + 5750 3000 5850 3000 +Wire Wire Line + 6150 2250 6250 2250 +Wire Wire Line + 6250 2250 6250 2300 +Wire Wire Line + 6250 3200 6250 3150 +Wire Wire Line + 6150 3200 6250 3200 +Wire Wire Line + 6150 2700 6800 2700 +Connection ~ 6150 2700 +Wire Wire Line + 4350 2700 4750 2700 +Wire Wire Line + 5050 2700 5750 2700 +Connection ~ 5750 2700 +Wire Wire Line + 4500 2250 4350 2250 +Wire Wire Line + 4350 2250 4350 2700 +Wire Wire Line + 2700 1150 6200 1150 +Wire Wire Line + 3550 750 3550 1400 +Wire Wire Line + 1250 750 4100 750 +Connection ~ 3550 1400 +Connection ~ 3550 1150 +Wire Wire Line + 1600 1850 1350 1850 +Wire Wire Line + 1350 1850 1350 3500 +Wire Wire Line + 1350 3000 1600 3000 +Wire Wire Line + 4500 2350 4500 6550 +Connection ~ 3750 3500 +Connection ~ 3650 3500 +Connection ~ 1350 3000 +Wire Wire Line + 3000 3500 3000 2350 +Connection ~ 3000 3500 +Connection ~ 3500 2350 +Wire Wire Line + 3700 1150 3700 2550 +Connection ~ 3700 2550 +Wire Wire Line + 6200 1150 6200 2250 +Connection ~ 3700 1150 +Connection ~ 6200 2250 +Wire Wire Line + 6200 3500 6200 3200 +Connection ~ 4500 3500 +Connection ~ 6200 3200 +Wire Wire Line + 2700 1650 2800 1650 +Wire Wire Line + 2800 1650 2800 1950 +Wire Wire Line + 2800 1950 1000 1950 +Wire Wire Line + 2700 2800 2850 2800 +Wire Wire Line + 2850 2800 2850 3100 +Wire Wire Line + 2850 3100 1000 3100 +Wire Wire Line + 2700 2900 2800 2900 +Wire Wire Line + 2800 2900 2800 3250 +Wire Wire Line + 2800 3250 900 3250 +Connection ~ 1450 1150 +Wire Wire Line + 4500 1650 2950 1650 +Wire Wire Line + 2950 1650 2950 1300 +Wire Wire Line + 2950 1300 900 1300 +Text Label 6450 2700 0 60 ~ 0 +y1 +Text Label 1200 1150 0 60 ~ 0 +s0 +Text Label 1200 1300 0 60 ~ 0 +s1 +Text Label 1150 1950 0 60 ~ 0 +i0_1 +Text Label 1500 750 0 60 ~ 0 +vcc +Text Label 1500 1000 0 60 ~ 0 +e_bar_1 +$Comp +L resistor R1 +U 1 1 62AC2C96 +P 3950 1950 +F 0 "R1" H 4000 2080 50 0000 C CNN +F 1 "1" H 4000 1900 50 0000 C CNN +F 2 "" H 4000 1930 30 0000 C CNN +F 3 "" V 4000 2000 30 0000 C CNN + 1 3950 1950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4500 2050 4300 2050 +Wire Wire Line + 4300 2050 4300 1900 +Wire Wire Line + 4300 1900 4150 1900 +Wire Wire Line + 3850 1900 3500 1900 +Connection ~ 3500 1900 +$Comp +L resistor R2 +U 1 1 62AC2C97 +P 3950 3050 +F 0 "R2" H 4000 3180 50 0000 C CNN +F 1 "1" H 4000 3000 50 0000 C CNN +F 2 "" H 4000 3030 30 0000 C CNN +F 3 "" V 4000 3100 30 0000 C CNN + 1 3950 3050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4500 2150 4300 2150 +Wire Wire Line + 4300 2150 4300 3000 +Wire Wire Line + 4300 3000 4150 3000 +Wire Wire Line + 3850 3000 3650 3000 +Connection ~ 3650 3000 +Connection ~ 1350 3500 +NoConn ~ 1600 1250 +NoConn ~ 1600 1350 +NoConn ~ 1600 1450 +NoConn ~ 1600 1550 +NoConn ~ 1600 1650 +NoConn ~ 1600 1750 +NoConn ~ 2700 1350 +NoConn ~ 2700 1450 +NoConn ~ 2700 1550 +NoConn ~ 1600 2400 +NoConn ~ 1600 2500 +NoConn ~ 1600 2600 +NoConn ~ 1600 2700 +NoConn ~ 1600 2800 +NoConn ~ 1600 2900 +NoConn ~ 2700 2500 +NoConn ~ 2700 2600 +NoConn ~ 2700 2700 +NoConn ~ 4500 1750 +NoConn ~ 4500 1850 +NoConn ~ 4500 1950 +NoConn ~ 5600 1850 +NoConn ~ 5600 1950 +NoConn ~ 5600 2050 +NoConn ~ 5600 2150 +NoConn ~ 5600 2250 +NoConn ~ 5600 2350 +Wire Wire Line + 2700 2300 3000 2300 +Wire Wire Line + 3000 2300 3000 1150 +Connection ~ 3000 1150 +Wire Wire Line + 5600 1650 5600 1150 +Connection ~ 5600 1150 +$Comp +L resistor R5 +U 1 1 62AC2C9C +P 4850 2750 +F 0 "R5" H 4900 2880 50 0000 C CNN +F 1 "1" H 4900 2700 50 0000 C CNN +F 2 "" H 4900 2730 30 0000 C CNN +F 3 "" V 4900 2800 30 0000 C CNN + 1 4850 2750 + 1 0 0 -1 +$EndComp +Text Label 1150 2050 0 60 ~ 0 +i1_1 +Wire Wire Line + 2700 1750 2750 1750 +Wire Wire Line + 2750 1750 2750 2050 +Wire Wire Line + 2750 2050 900 2050 +Text Label 1150 3100 0 60 ~ 0 +i2_1 +Text Label 1100 3250 0 60 ~ 0 +i3_1 +Wire Wire Line + 1100 3500 6200 3500 +Text Label 1150 3500 0 60 ~ 0 +gnd +$Comp +L CD_54157 X3 +U 1 1 62AC3D3E +P 2700 4350 +F 0 "X3" H 2700 4400 60 0000 C CNN +F 1 "CD_54157" V 2700 4100 60 0000 C CNN +F 2 "" H 2700 4350 60 0001 C CNN +F 3 "" H 2700 4350 60 0001 C CNN + 1 2700 4350 + 1 0 0 -1 +$EndComp +$Comp +L CD_54157 X4 +U 1 1 62AC3D44 +P 2700 5500 +F 0 "X4" H 2700 5550 60 0000 C CNN +F 1 "CD_54157" V 2700 5250 60 0000 C CNN +F 2 "" H 2700 5500 60 0001 C CNN +F 3 "" H 2700 5500 60 0001 C CNN + 1 2700 5500 + 1 0 0 -1 +$EndComp +$Comp +L CD_54157 X6 +U 1 1 62AC3D4A +P 5600 4850 +F 0 "X6" H 5600 4900 60 0000 C CNN +F 1 "CD_54157" V 5600 4600 60 0000 C CNN +F 2 "" H 5600 4850 60 0001 C CNN +F 3 "" H 5600 4850 60 0001 C CNN + 1 5600 4850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2150 5350 2000 5350 +Wire Wire Line + 2000 5350 2000 4200 +Wire Wire Line + 1550 4200 2150 4200 +Wire Wire Line + 3250 4300 6350 4300 +Wire Wire Line + 3400 4050 3400 5450 +Wire Wire Line + 3400 5450 3250 5450 +Connection ~ 3400 4300 +$Comp +L eSim_MOS_P M6 +U 1 1 62AC3D57 +P 3900 4650 +F 0 "M6" H 3850 4700 50 0000 R CNN +F 1 "eSim_MOS_P" H 3950 4800 50 0000 R CNN +F 2 "" H 4150 4750 29 0000 C CNN +F 3 "" H 3950 4650 60 0000 C CNN + 1 3900 4650 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M5 +U 1 1 62AC3D5D +P 3850 5000 +F 0 "M5" H 3850 4850 50 0000 R CNN +F 1 "eSim_MOS_N" H 3950 4950 50 0000 R CNN +F 2 "" H 4150 4700 29 0000 C CNN +F 3 "" H 3950 4800 60 0000 C CNN + 1 3850 5000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4050 4850 4050 5000 +Wire Wire Line + 3750 4650 3650 4650 +Wire Wire Line + 3650 4650 3650 5200 +Wire Wire Line + 3650 5200 3750 5200 +Wire Wire Line + 4050 4450 4150 4450 +Wire Wire Line + 4150 4450 4150 4500 +Wire Wire Line + 4150 5400 4150 5350 +Wire Wire Line + 3550 5400 4150 5400 +$Comp +L eSim_MOS_P M8 +U 1 1 62AC3D6B +P 4050 5800 +F 0 "M8" H 4000 5850 50 0000 R CNN +F 1 "eSim_MOS_P" H 4100 5950 50 0000 R CNN +F 2 "" H 4300 5900 29 0000 C CNN +F 3 "" H 4100 5800 60 0000 C CNN + 1 4050 5800 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M7 +U 1 1 62AC3D71 +P 4000 6150 +F 0 "M7" H 4000 6000 50 0000 R CNN +F 1 "eSim_MOS_N" H 4100 6100 50 0000 R CNN +F 2 "" H 4300 5850 29 0000 C CNN +F 3 "" H 4100 5950 60 0000 C CNN + 1 4000 6150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4200 6000 4200 6150 +Wire Wire Line + 3900 5800 3800 5800 +Wire Wire Line + 3800 5800 3800 6350 +Wire Wire Line + 3800 6350 3900 6350 +Wire Wire Line + 4200 5600 4300 5600 +Wire Wire Line + 4300 5600 4300 5650 +Wire Wire Line + 4300 6550 4300 6500 +Wire Wire Line + 6150 4800 6350 4800 +Wire Wire Line + 6350 4800 6350 4300 +Wire Wire Line + 1200 4050 3400 4050 +Wire Wire Line + 3250 4900 3650 4900 +Connection ~ 3650 4900 +Wire Wire Line + 3250 6050 3800 6050 +Connection ~ 3800 6050 +$Comp +L eSim_MOS_P M12 +U 1 1 62AC3D85 +P 6550 5500 +F 0 "M12" H 6500 5550 50 0000 R CNN +F 1 "eSim_MOS_P" H 6600 5650 50 0000 R CNN +F 2 "" H 6800 5600 29 0000 C CNN +F 3 "" H 6600 5500 60 0000 C CNN + 1 6550 5500 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M11 +U 1 1 62AC3D8B +P 6500 5850 +F 0 "M11" H 6500 5700 50 0000 R CNN +F 1 "eSim_MOS_N" H 6600 5800 50 0000 R CNN +F 2 "" H 6800 5550 29 0000 C CNN +F 3 "" H 6600 5650 60 0000 C CNN + 1 6500 5850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6700 5700 6700 5850 +Wire Wire Line + 6400 5500 6300 5500 +Wire Wire Line + 6300 5500 6300 6050 +Wire Wire Line + 6300 6050 6400 6050 +Wire Wire Line + 6700 5300 6800 5300 +Wire Wire Line + 6800 5300 6800 5350 +Wire Wire Line + 6800 6250 6800 6200 +Wire Wire Line + 6700 6250 6800 6250 +Wire Wire Line + 6700 5750 7350 5750 +Connection ~ 6700 5750 +Wire Wire Line + 4900 5750 5300 5750 +Wire Wire Line + 5600 5750 6300 5750 +Connection ~ 6300 5750 +Wire Wire Line + 5050 5300 4900 5300 +Wire Wire Line + 4900 5300 4900 5750 +Wire Wire Line + 3250 4200 6750 4200 +Wire Wire Line + 4100 750 4100 4450 +Connection ~ 4100 4450 +Connection ~ 4100 4200 +Wire Wire Line + 2150 4900 1900 4900 +Wire Wire Line + 1900 4900 1900 6550 +Wire Wire Line + 1900 6050 2150 6050 +Wire Wire Line + 5050 6550 5050 5400 +Connection ~ 4300 6550 +Connection ~ 4200 6550 +Connection ~ 1900 6050 +Wire Wire Line + 3550 5400 3550 6550 +Connection ~ 3550 6550 +Connection ~ 4050 5400 +Wire Wire Line + 4250 4200 4250 5600 +Connection ~ 4250 5600 +Wire Wire Line + 6750 4200 6750 5300 +Connection ~ 4250 4200 +Connection ~ 6750 5300 +Wire Wire Line + 6750 6550 6750 6250 +Connection ~ 5050 6550 +Connection ~ 6750 6250 +Wire Wire Line + 3250 4700 3350 4700 +Wire Wire Line + 3350 4700 3350 5000 +Wire Wire Line + 3350 5000 1550 5000 +Wire Wire Line + 3250 5850 3400 5850 +Wire Wire Line + 3400 5850 3400 6150 +Wire Wire Line + 3400 6150 1550 6150 +Wire Wire Line + 3250 5950 3350 5950 +Wire Wire Line + 3350 5950 3350 6300 +Wire Wire Line + 3350 6300 1450 6300 +Connection ~ 2000 4200 +Wire Wire Line + 5050 4700 3500 4700 +Wire Wire Line + 3500 4700 3500 4350 +Wire Wire Line + 3500 4350 1400 4350 +Text Label 7000 5750 0 60 ~ 0 +y2 +Text Label 1700 5000 0 60 ~ 0 +i0_2 +Text Label 2050 4050 0 60 ~ 0 +e_bar_2 +$Comp +L resistor R3 +U 1 1 62AC3DCA +P 4500 5000 +F 0 "R3" H 4550 5130 50 0000 C CNN +F 1 "1" H 4550 4950 50 0000 C CNN +F 2 "" H 4550 4980 30 0000 C CNN +F 3 "" V 4550 5050 30 0000 C CNN + 1 4500 5000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5050 5100 4850 5100 +Wire Wire Line + 4850 5100 4850 4950 +Wire Wire Line + 4850 4950 4700 4950 +Wire Wire Line + 4400 4950 4050 4950 +Connection ~ 4050 4950 +$Comp +L resistor R4 +U 1 1 62AC3DD5 +P 4500 6100 +F 0 "R4" H 4550 6230 50 0000 C CNN +F 1 "1" H 4550 6050 50 0000 C CNN +F 2 "" H 4550 6080 30 0000 C CNN +F 3 "" V 4550 6150 30 0000 C CNN + 1 4500 6100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5050 5200 4850 5200 +Wire Wire Line + 4850 5200 4850 6050 +Wire Wire Line + 4850 6050 4700 6050 +Wire Wire Line + 4400 6050 4200 6050 +Connection ~ 4200 6050 +NoConn ~ 2150 4300 +NoConn ~ 2150 4400 +NoConn ~ 2150 4500 +NoConn ~ 2150 4600 +NoConn ~ 2150 4700 +NoConn ~ 2150 4800 +NoConn ~ 3250 4400 +NoConn ~ 3250 4500 +NoConn ~ 3250 4600 +NoConn ~ 2150 5450 +NoConn ~ 2150 5550 +NoConn ~ 2150 5650 +NoConn ~ 2150 5750 +NoConn ~ 2150 5850 +NoConn ~ 2150 5950 +NoConn ~ 3250 5550 +NoConn ~ 3250 5650 +NoConn ~ 3250 5750 +NoConn ~ 5050 4800 +NoConn ~ 5050 4900 +NoConn ~ 5050 5000 +NoConn ~ 6150 4900 +NoConn ~ 6150 5000 +NoConn ~ 6150 5100 +NoConn ~ 6150 5200 +NoConn ~ 6150 5300 +NoConn ~ 6150 5400 +Wire Wire Line + 3250 5350 3550 5350 +Wire Wire Line + 3550 5350 3550 4200 +Connection ~ 3550 4200 +Wire Wire Line + 6150 4700 6150 4200 +Connection ~ 6150 4200 +$Comp +L resistor R6 +U 1 1 62AC3E01 +P 5400 5800 +F 0 "R6" H 5450 5930 50 0000 C CNN +F 1 "1" H 5450 5750 50 0000 C CNN +F 2 "" H 5450 5780 30 0000 C CNN +F 3 "" V 5450 5850 30 0000 C CNN + 1 5400 5800 + 1 0 0 -1 +$EndComp +Text Label 1700 5100 0 60 ~ 0 +i1_2 +Wire Wire Line + 3250 4800 3300 4800 +Wire Wire Line + 3300 4800 3300 5100 +Wire Wire Line + 3300 5100 1450 5100 +Text Label 1700 6150 0 60 ~ 0 +i2_2 +Text Label 1650 6300 0 60 ~ 0 +i3_2 +Wire Wire Line + 1900 6550 6750 6550 +Connection ~ 3550 750 +Connection ~ 4500 6550 +Wire Wire Line + 1550 4200 1550 1150 +Connection ~ 1550 1150 +Wire Wire Line + 1400 4350 1400 1300 +Connection ~ 1400 1300 +$Comp +L PORT U1 +U 1 1 62AC5307 +P 1000 1000 +F 0 "U1" H 1050 1100 30 0000 C CNN +F 1 "PORT" H 1000 1000 30 0000 C CNN +F 2 "" H 1000 1000 60 0000 C CNN +F 3 "" H 1000 1000 60 0000 C CNN + 1 1000 1000 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 62AC69FB +P 650 1300 +F 0 "U1" H 700 1400 30 0000 C CNN +F 1 "PORT" H 650 1300 30 0000 C CNN +F 2 "" H 650 1300 60 0000 C CNN +F 3 "" H 650 1300 60 0000 C CNN + 2 650 1300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 62AC6B04 +P 650 3250 +F 0 "U1" H 700 3350 30 0000 C CNN +F 1 "PORT" H 650 3250 30 0000 C CNN +F 2 "" H 650 3250 60 0000 C CNN +F 3 "" H 650 3250 60 0000 C CNN + 3 650 3250 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 62AC6B8F +P 750 3100 +F 0 "U1" H 800 3200 30 0000 C CNN +F 1 "PORT" H 750 3100 30 0000 C CNN +F 2 "" H 750 3100 60 0000 C CNN +F 3 "" H 750 3100 60 0000 C CNN + 4 750 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 62AC6C24 +P 650 2050 +F 0 "U1" H 700 2150 30 0000 C CNN +F 1 "PORT" H 650 2050 30 0000 C CNN +F 2 "" H 650 2050 60 0000 C CNN +F 3 "" H 650 2050 60 0000 C CNN + 5 650 2050 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 6 1 62AC6C8D +P 750 1950 +F 0 "U1" H 800 2050 30 0000 C CNN +F 1 "PORT" H 750 1950 30 0000 C CNN +F 2 "" H 750 1950 60 0000 C CNN +F 3 "" H 750 1950 60 0000 C CNN + 6 750 1950 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 7 1 62AC6D04 +P 7050 2700 +F 0 "U1" H 7100 2800 30 0000 C CNN +F 1 "PORT" H 7050 2700 30 0000 C CNN +F 2 "" H 7050 2700 60 0000 C CNN +F 3 "" H 7050 2700 60 0000 C CNN + 7 7050 2700 + -1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 8 1 62AC6E0E +P 850 3500 +F 0 "U1" H 900 3600 30 0000 C CNN +F 1 "PORT" H 850 3500 30 0000 C CNN +F 2 "" H 850 3500 60 0000 C CNN +F 3 "" H 850 3500 60 0000 C CNN + 8 850 3500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 9 1 62AC6FE7 +P 7600 5750 +F 0 "U1" H 7650 5850 30 0000 C CNN +F 1 "PORT" H 7600 5750 30 0000 C CNN +F 2 "" H 7600 5750 60 0000 C CNN +F 3 "" H 7600 5750 60 0000 C CNN + 9 7600 5750 + -1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 10 1 62AC70DD +P 1300 5000 +F 0 "U1" H 1350 5100 30 0000 C CNN +F 1 "PORT" H 1300 5000 30 0000 C CNN +F 2 "" H 1300 5000 60 0000 C CNN +F 3 "" H 1300 5000 60 0000 C CNN + 10 1300 5000 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 11 1 62AC71F2 +P 1200 5100 +F 0 "U1" H 1250 5200 30 0000 C CNN +F 1 "PORT" H 1200 5100 30 0000 C CNN +F 2 "" H 1200 5100 60 0000 C CNN +F 3 "" H 1200 5100 60 0000 C CNN + 11 1200 5100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 12 1 62AC72E5 +P 1300 6150 +F 0 "U1" H 1350 6250 30 0000 C CNN +F 1 "PORT" H 1300 6150 30 0000 C CNN +F 2 "" H 1300 6150 60 0000 C CNN +F 3 "" H 1300 6150 60 0000 C CNN + 12 1300 6150 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 13 1 62AC7362 +P 1200 6300 +F 0 "U1" H 1250 6400 30 0000 C CNN +F 1 "PORT" H 1200 6300 30 0000 C CNN +F 2 "" H 1200 6300 60 0000 C CNN +F 3 "" H 1200 6300 60 0000 C CNN + 13 1200 6300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 14 1 62AC74E2 +P 750 1150 +F 0 "U1" H 800 1250 30 0000 C CNN +F 1 "PORT" H 750 1150 30 0000 C CNN +F 2 "" H 750 1150 60 0000 C CNN +F 3 "" H 750 1150 60 0000 C CNN + 14 750 1150 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 15 1 62AC763B +P 950 4050 +F 0 "U1" H 1000 4150 30 0000 C CNN +F 1 "PORT" H 950 4050 30 0000 C CNN +F 2 "" H 950 4050 60 0000 C CNN +F 3 "" H 950 4050 60 0000 C CNN + 15 950 4050 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 16 1 62AC7715 +P 1000 750 +F 0 "U1" H 1050 850 30 0000 C CNN +F 1 "PORT" H 1000 750 30 0000 C CNN +F 2 "" H 1000 750 60 0000 C CNN +F 3 "" H 1000 750 60 0000 C CNN + 16 1000 750 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.sub b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.sub new file mode 100644 index 00000000..6152bbf1 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153.sub @@ -0,0 +1,33 @@ +* Subcircuit CD54_HC153 +.subckt CD54_HC153 /e_bar_1 /s1 /i3_1 /i2_1 /i1_1 /i0_1 /y1 /gnd /y2 /i0_2 /i1_2 /i2_2 /i3_2 /s0 /e_bar_2 /vcc +* c:\fossee\esim\library\subcircuitlibrary\cd54_hc153\cd54_hc153.cir +.include CD54_157.sub +.include NMOS-180nm.lib +.include PMOS-180nm.lib +x1 /s0 ? ? ? ? ? ? /gnd net-_m1-pad2_ /i1_1 /i0_1 ? ? ? /e_bar_1 /vcc CD54_157 +x2 /s0 ? ? ? ? ? ? /gnd net-_m3-pad2_ /i3_1 /i2_1 ? ? ? /e_bar_1 /vcc CD54_157 +x5 /s1 ? ? ? net-_r1-pad2_ net-_r2-pad2_ net-_r5-pad1_ /gnd ? ? ? ? ? ? /e_bar_1 /vcc CD54_157 +m2 net-_m1-pad1_ net-_m1-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m4 net-_m3-pad1_ net-_m3-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m3 net-_m3-pad1_ net-_m3-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m10 /y1 net-_m10-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m9 /y1 net-_m10-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +r1 net-_m1-pad1_ net-_r1-pad2_ 1 +r2 net-_m3-pad1_ net-_r2-pad2_ 1 +r5 net-_r5-pad1_ net-_m10-pad2_ 1 +x3 /s0 ? ? ? ? ? ? /gnd net-_m5-pad2_ /i1_2 /i0_2 ? ? ? /e_bar_2 /vcc CD54_157 +x4 /s0 ? ? ? ? ? ? /gnd net-_m7-pad2_ /i3_2 /i2_2 ? ? ? /e_bar_2 /vcc CD54_157 +x6 /s1 ? ? ? net-_r3-pad2_ net-_r4-pad2_ net-_r6-pad1_ /gnd ? ? ? ? ? ? /e_bar_2 /vcc CD54_157 +m6 net-_m5-pad1_ net-_m5-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m5 net-_m5-pad1_ net-_m5-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m8 net-_m7-pad1_ net-_m7-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m7 net-_m7-pad1_ net-_m7-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +m12 /y2 net-_m11-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1 +m11 /y2 net-_m11-pad2_ /gnd /gnd CMOSN W=100u L=100u M=1 +r3 net-_m5-pad1_ net-_r3-pad2_ 1 +r4 net-_m7-pad1_ net-_r4-pad2_ 1 +r6 net-_r6-pad1_ net-_m11-pad2_ 1 +* Control Statements + +.ends CD54_HC153
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD54_HC153/CD54_HC153_Previous_Values.xml b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153_Previous_Values.xml new file mode 100644 index 00000000..a2652f75 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/CD54_HC153_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m2><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m1><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m4><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m3><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m10><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m9><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m6><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m5><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m8><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m7><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m12><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m11></devicemodel><subcircuit><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157</field></x1><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157</field></x2><x5><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157</field></x5><x3><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157</field></x3><x4><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157</field></x4><x6><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157</field></x6></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD54_HC153/NMOS-180nm.lib b/library/SubcircuitLibrary/CD54_HC153/NMOS-180nm.lib new file mode 100644 index 00000000..51e9b119 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/library/SubcircuitLibrary/CD54_HC153/PMOS-180nm.lib b/library/SubcircuitLibrary/CD54_HC153/PMOS-180nm.lib new file mode 100644 index 00000000..032b5b95 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/PMOS-180nm.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/library/SubcircuitLibrary/CD54_HC153/README.md b/library/SubcircuitLibrary/CD54_HC153/README.md new file mode 100644 index 00000000..de49a7cf --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/README.md @@ -0,0 +1,21 @@ + +# CD54HC153 IC + +It is 4:1 Multiplexer IC. CD54153 IC is designed with 180nm CMOS technology in eSim. It is 16 pin IC. The output depends on the select lines. +## Usage/Examples + +Multiplexers +## Documentation + +To know the details of CD54HC153 IC please go through with the documentation : [CD54HC153_datasheet](https://www.ti.com/lit/gpn/cd54hc153) + +## Comments/Notes + +Please note this is a complete digital IC. It works fine at the time of simulation. + +## Contributer + +Name: Ankush Mondal +Email: mondalankush369@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellow 2022
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD54_HC153/analysis b/library/SubcircuitLibrary/CD54_HC153/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/CD54_HC153/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file |