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authorrahulp132020-02-21 12:36:46 +0530
committerrahulp132020-02-21 12:36:46 +0530
commit47d4daff2ab483c4cdfb82117ef0d25d53832214 (patch)
tree55aefefe974f151de76c6a2dbe8df3b4c3393bbe /library/SubcircuitLibrary/7485/7485.sch
parent453c2dab78f81046fcbd42034a86c4e759a0ff68 (diff)
downloadeSim-47d4daff2ab483c4cdfb82117ef0d25d53832214.tar.gz
eSim-47d4daff2ab483c4cdfb82117ef0d25d53832214.tar.bz2
eSim-47d4daff2ab483c4cdfb82117ef0d25d53832214.zip
restructured eSim libraries
Diffstat (limited to 'library/SubcircuitLibrary/7485/7485.sch')
-rw-r--r--library/SubcircuitLibrary/7485/7485.sch1127
1 files changed, 1127 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/7485/7485.sch b/library/SubcircuitLibrary/7485/7485.sch
new file mode 100644
index 00000000..0db5f0d6
--- /dev/null
+++ b/library/SubcircuitLibrary/7485/7485.sch
@@ -0,0 +1,1127 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_User
+LIBS:eSim_Subckt
+LIBS:7485-cache
+EELAYER 25 0
+EELAYER END
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+P 850 1350
+F 0 "U1" H 900 1450 30 0000 C CNN
+F 1 "PORT" H 850 1350 30 0000 C CNN
+F 2 "" H 850 1350 60 0000 C CNN
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+ 4 850 1350
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+$EndComp
+$Comp
+L PORT U1
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+ 5 850 1550
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1100 1550 1100 1450
+$Comp
+L PORT U1
+U 6 1 5C9A8815
+P 950 2650
+F 0 "U1" H 1000 2750 30 0000 C CNN
+F 1 "PORT" H 950 2650 30 0000 C CNN
+F 2 "" H 950 2650 60 0000 C CNN
+F 3 "" H 950 2650 60 0000 C CNN
+ 6 950 2650
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
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+L PORT U1
+U 7 1 5C9A8B82
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+$EndComp
+$Comp
+L PORT U1
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+F 0 "U1" H 1000 4000 30 0000 C CNN
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+F 3 "" H 950 3900 60 0000 C CNN
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+$EndComp
+$Comp
+L PORT U1
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+ 9 950 4100
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+$EndComp
+$Comp
+L PORT U1
+U 10 1 5C9A8DBD
+P 1000 5100
+F 0 "U1" H 1050 5200 30 0000 C CNN
+F 1 "PORT" H 1000 5100 30 0000 C CNN
+F 2 "" H 1000 5100 60 0000 C CNN
+F 3 "" H 1000 5100 60 0000 C CNN
+ 10 1000 5100
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
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+F 2 "" H 1000 5300 60 0000 C CNN
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+$EndComp
+$Comp
+L PORT U1
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+F 3 "" H 800 3150 60 0000 C CNN
+ 1 800 3150
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+$EndComp
+$Comp
+L PORT U1
+U 2 1 5C9A8F9C
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+ 2 800 3400
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+L PORT U1
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+F 3 "" H 800 3600 60 0000 C CNN
+ 3 800 3600
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 9550 2050 9850 2050
+Wire Wire Line
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+Wire Wire Line
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+$Comp
+L PORT U1
+U 12 1 5C9A9B26
+P 10100 2050
+F 0 "U1" H 10150 2150 30 0000 C CNN
+F 1 "PORT" H 10100 2050 30 0000 C CNN
+F 2 "" H 10100 2050 60 0000 C CNN
+F 3 "" H 10100 2050 60 0000 C CNN
+ 12 10100 2050
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
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+F 0 "U1" H 10150 4050 30 0000 C CNN
+F 1 "PORT" H 10100 3950 30 0000 C CNN
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+F 3 "" H 10100 3950 60 0000 C CNN
+ 13 10100 3950
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
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+F 3 "" H 10150 5450 60 0000 C CNN
+ 14 10150 5450
+ -1 0 0 1
+$EndComp
+Text Notes 9650 2000 0 60 ~ 12
+A>B
+Text Notes 9600 3900 0 60 ~ 12
+A=B\n
+Text Notes 9600 5400 0 60 ~ 12
+A<B\n
+Text Notes 1250 5100 0 60 ~ 12
+A0
+Text Notes 1200 5400 0 60 ~ 12
+B0
+Text Notes 1300 3900 2 60 ~ 12
+A1
+Text Notes 1300 4200 2 60 ~ 12
+B1
+Text Notes 1250 3250 2 60 ~ 12
+A<B
+Text Notes 1250 3400 2 60 ~ 12
+A=B
+Text Notes 1250 3550 2 60 ~ 12
+A>B
+Text Notes 1350 2750 2 60 ~ 12
+A2
+Text Notes 1350 2950 2 60 ~ 12
+B2
+Text Notes 1300 1350 2 60 ~ 12
+A3
+Text Notes 1300 1550 2 60 ~ 12
+B3
+Wire Wire Line
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+Wire Wire Line
+ 7450 5600 7450 6050
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Notes Line
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+Wire Notes Line
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+Wire Notes Line
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+Cascading Inputs
+Wire Notes Line
+ 9500 1550 9500 6050
+Wire Notes Line
+ 9500 6050 10550 6050
+Wire Notes Line
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+Wire Notes Line
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+Outputs
+Wire Wire Line
+ 2600 3400 2050 3400
+$EndSCHEMATC