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author | Rahul P | 2020-03-04 17:01:11 +0530 |
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committer | GitHub | 2020-03-04 17:01:11 +0530 |
commit | 8ffe81b36caa259151978de0434e4e0c5c32d217 (patch) | |
tree | 32202454d13dfabbf6556e98987f2a9632619ea9 /library/SubcircuitLibrary/4to16_demux/5_nand.cir.out | |
parent | e40317e709c220176fc5b7edf23d4434504335b0 (diff) | |
parent | 13f3bcfda9416624cebbf5705de398e8efcad344 (diff) | |
download | eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.gz eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.bz2 eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.zip |
Merge pull request #132 from rahulp13/master
major changes
Diffstat (limited to 'library/SubcircuitLibrary/4to16_demux/5_nand.cir.out')
-rw-r--r-- | library/SubcircuitLibrary/4to16_demux/5_nand.cir.out | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out b/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out new file mode 100644 index 00000000..164de911 --- /dev/null +++ b/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out @@ -0,0 +1,18 @@ +* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir + +.include 5_and.sub +x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and +* u2 net-_u2-pad1_ net-_u1-pad6_ d_inverter +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port +a1 net-_u2-pad1_ net-_u1-pad6_ u2 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |