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author | rahulp13 | 2020-03-03 05:31:58 +0530 |
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committer | rahulp13 | 2020-03-03 05:31:58 +0530 |
commit | dfc268e0863c913a1b8726cd54eea3b40caf7c67 (patch) | |
tree | 1cd82634684da5ae86b558d44756189e080545d4 /Windows/spice/examples/tclspice/tcl-testbench1 | |
parent | fd62c52150c7d1f81da8060b2f5db6b94d174ccf (diff) | |
download | eSim-dfc268e0863c913a1b8726cd54eea3b40caf7c67.tar.gz eSim-dfc268e0863c913a1b8726cd54eea3b40caf7c67.tar.bz2 eSim-dfc268e0863c913a1b8726cd54eea3b40caf7c67.zip |
upgrade ngspice to v31
Diffstat (limited to 'Windows/spice/examples/tclspice/tcl-testbench1')
4 files changed, 108 insertions, 0 deletions
diff --git a/Windows/spice/examples/tclspice/tcl-testbench1/PN2222.mod b/Windows/spice/examples/tclspice/tcl-testbench1/PN2222.mod new file mode 100644 index 00000000..d683d374 --- /dev/null +++ b/Windows/spice/examples/tclspice/tcl-testbench1/PN2222.mod @@ -0,0 +1,7 @@ +.model PN2222 NPN(Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=255.9 Ne=1.307 ++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 ++ Cjc=7.306p Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 ++ Tr=46.91n Tf=411.1p Itf=.6 Vtf=1.7 Xtf=3 Rb=10) + +* Fairchild pid=19 case=TO92 +* 88-09-07 bam creation diff --git a/Windows/spice/examples/tclspice/tcl-testbench1/capa.cir b/Windows/spice/examples/tclspice/tcl-testbench1/capa.cir new file mode 100644 index 00000000..35478a72 --- /dev/null +++ b/Windows/spice/examples/tclspice/tcl-testbench1/capa.cir @@ -0,0 +1,30 @@ +* Capa variable sur la base de la thèse de Marc KODRNJA + +.SUBCKT capa 4 6 5 7 8 0 +Vref1 26 0 DC 3 +Vref2 16 0 DC 3 +Vdp 7 0 DC 7 +I0 3 0 DC 0.07 +Ia1 15 0 DC 0.01 +Ia2 25 0 DC 0.01 +Ib1 14 0 DC 0.01 +Ib2 24 0 DC 0.01 + +.INCLUDE PN2222.mod +Qv1 4 16 14 PN2222 +Qv2 4 26 24 PN2222 +Q1 11 14 3 PN2222 +Q2 21 24 3 PN2222 +Qp1 5 8 11 PN2222 +Qm1 6 7 11 PN2222 +Qp2 6 8 21 PN2222 +Qm2 5 7 21 PN2222 +Qc1 4 5 15 PN2222 +Qc2 4 6 25 PN2222 + +R1 4 5 100 +R2 4 6 100 +C1 15 14 10n +C2 25 24 10n +.ENDS + diff --git a/Windows/spice/examples/tclspice/tcl-testbench1/tcl-testbench1.sh b/Windows/spice/examples/tclspice/tcl-testbench1/tcl-testbench1.sh new file mode 100644 index 00000000..6c74f5e6 --- /dev/null +++ b/Windows/spice/examples/tclspice/tcl-testbench1/tcl-testbench1.sh @@ -0,0 +1,62 @@ +#!/bin/sh +# -*- mode: tcl -*- \ + exec wish -f "$0" ${1+"$@"} + +# old name: analyse-20070504-0.tcl +package require BLT +load ../../../src/.libs/libspice.so + +# Test of virtual capacitore circuit +# Vary the control voltage and log the resulting capacitance +spice::source "testCapa.cir" + +set n 30 +set dv 0.2 +set vmax [expr $dv/2] +set vmin [expr -1 * $dv/2] +set pas [expr $dv/ $n] + +blt::vector create Ctmp +blt::vector create Cim +blt::vector create check + +blt::vector create Vcmd +blt::graph .cimvd -title "Cim = f(Vd)" +blt::graph .checkvd -title "Rim = f(Vd)" + +blt::vector create Iex +blt::vector create freq +blt::graph .freqanal -title "Analyse frequentielle" + +set v [expr {$vmin + $n * $pas / 4}] +spice::alter vd = $v +spice::op +spice::ac dec 10 100 100k +spice::vectoblt {Vex#branch} Iex +spice::vectoblt {frequency} freq +pack .freqanal +.freqanal element create line1 -xdata freq -ydata Iex + +for {set i 0} {[expr $n - $i]} {incr i } { +set v [expr {$vmin + $i * $pas}] +spice::alter vd = $v +spice::op +spice::ac dec 10 100 100k + + +spice::let Cim = real(mean(Vex#branch/(2*Pi*i*frequency*(V(5)-V(6))))) +spice::vectoblt Cim Ctmp +Cim append $Ctmp(0:end) +spice::let err = real(mean(sqrt((Vex#branch-(2*Pi*i*frequency*Cim*V(5)-V(6)))^2))) +spice::vectoblt err Ctmp +check append $Ctmp(0:end) +Vcmd append $v + +} + +pack .cimvd +.cimvd element create line1 -xdata Vcmd -ydata Cim +pack .checkvd +.checkvd element create line1 -xdata Vcmd -ydata check + + diff --git a/Windows/spice/examples/tclspice/tcl-testbench1/testCapa.cir b/Windows/spice/examples/tclspice/tcl-testbench1/testCapa.cir new file mode 100644 index 00000000..c74cb531 --- /dev/null +++ b/Windows/spice/examples/tclspice/tcl-testbench1/testCapa.cir @@ -0,0 +1,9 @@ +Banc de test pour la Capa variable sur la base de la thèse de Marc KODRNJA + +.INCLUDE capa.cir + +Valim 4 0 DC 12 +Vex 6 5 DC 0 AC 0.01 0 +Vd 7 8 DC 0.0 +xcapa 4 6 5 7 8 0 capa +.END |