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authorrahulp132020-02-28 11:38:58 +0530
committerrahulp132020-02-28 11:38:58 +0530
commit246319682f60293b132fca1ce6e24689c6682617 (patch)
tree6871b758a17869efecfd617f5513e31f9a933f4a /Windows/spice/examples/measure
parentd9ab84106cac311d953f344386fef1c1e2bca1cf (diff)
downloadeSim-246319682f60293b132fca1ce6e24689c6682617.tar.gz
eSim-246319682f60293b132fca1ce6e24689c6682617.tar.bz2
eSim-246319682f60293b132fca1ce6e24689c6682617.zip
initial commit
Diffstat (limited to 'Windows/spice/examples/measure')
-rw-r--r--Windows/spice/examples/measure/func_cap.sp15
-rw-r--r--Windows/spice/examples/measure/inv-meas-tran-auto.sp103
-rw-r--r--Windows/spice/examples/measure/inv-meas-tran-control.sp113
-rw-r--r--Windows/spice/examples/measure/inv-meas-tran.sp104
-rw-r--r--Windows/spice/examples/measure/inv-meas-tran_oc.sp98
-rw-r--r--Windows/spice/examples/measure/mos-meas-dc-control.sp49
-rw-r--r--Windows/spice/examples/measure/mos-meas-dc.sp37
-rw-r--r--Windows/spice/examples/measure/rc-meas-ac-control.sp64
-rw-r--r--Windows/spice/examples/measure/rc-meas-ac.sp54
-rw-r--r--Windows/spice/examples/measure/simple-meas-tran.sp57
10 files changed, 694 insertions, 0 deletions
diff --git a/Windows/spice/examples/measure/func_cap.sp b/Windows/spice/examples/measure/func_cap.sp
new file mode 100644
index 00000000..eca14a86
--- /dev/null
+++ b/Windows/spice/examples/measure/func_cap.sp
@@ -0,0 +1,15 @@
+* func_cap.sp
+
+
+.func icap_calc(A,B,C,D) '2*A*sqrt(B*C*D)'
+
+.param cap_val = 'max(icap_calc(1,2,3,4))'
+VDD 1 0 DC 1
+C1 1 0 'cap_val'
+
+.measure tran capacitance param='cap_val'
+.measure tran capac2 param='max(icap_calc(1,2,3,4))'
+
+.tran 1ps 100ps
+
+.end
diff --git a/Windows/spice/examples/measure/inv-meas-tran-auto.sp b/Windows/spice/examples/measure/inv-meas-tran-auto.sp
new file mode 100644
index 00000000..927d9a44
--- /dev/null
+++ b/Windows/spice/examples/measure/inv-meas-tran-auto.sp
@@ -0,0 +1,103 @@
+Inverter example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+* autostop (.tran defines simulation end as 4ns but simulation stops at
+* 142.5ps when .measure statements are evaluated)
+* scale (all device units are in microns)
+* model binning (look in device.values file for which bin chosen)
+*
+* m.x1.mn:
+* model = nch.2
+*
+* m.x1.mp:
+* model = pch.2
+*
+* parameters
+* parameterized subckt
+* vsrc with repeat
+* .measure statements for delay and an example ternary operator
+* device listing and parameter listing
+* You can run the example circuit with this command:
+*
+* ngspice inverter3.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+* scale -- define scale factor for mosfet device parameters (l,w,area,perimeter)
+.option autostop
+.option scale = 1e-6
+
+* model binning
+.model nch.1 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model nch.2 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+.model pch.1 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model pch.2 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+
+* parameters
+.param vp = 1.0v
+.param lmin = 0.10
+.param wmin = 0.12
+.param plmin = 'lmin'
+.param nlmin = 'lmin'
+.param wpmin = 'wmin'
+.param wnmin = 'wmin'
+.param drise = 400ps
+.param dfall = 100ps
+.param trise = 100ps
+.param tfall = 100ps
+.param period = 1ns
+.param skew_meas = 'vp/2'
+
+* parameterized subckt
+.subckt inv in out pw='wpmin' pl='plmin' nw='wnmin' nl='nlmin'
+mp out in vdd vdd pch w='pw' l='pl'
+mn out in gnd gnd nch w='nw' l='nl'
+.ends
+
+v0 vdd gnd 'vp'
+
+* vsrc with repeat
+v1 in gnd pwl
++ 0ns 'vp'
++ 'dfall-0.8*tfall' 'vp'
++ 'dfall-0.4*tfall' '0.9*vp'
++ 'dfall+0.4*tfall' '0.1*vp'
++ 'dfall+0.8*tfall' 0v
++ 'drise-0.8*trise' 0v
++ 'drise-0.4*trise' '0.1*vp'
++ 'drise+0.4*trise' '0.9*vp'
++ 'drise+0.8*trise' 'vp'
++ 'period+dfall-0.8*tfall' 'vp'
++ r='dfall-0.8*tfall'
+
+x1 in out inv pw=60 nw=20
+c1 out gnd 220fF
+
+.tran 1ps 4ns
+
+.meas tran inv_delay trig v(in) val='vp/2' fall=1 targ v(out) val='vp/2' rise=1
+.meas tran inv_delay2 trig v(in) val='vp/2' td=1n fall=1 targ v(out) val='vp/2' rise=1
+.meas tran test_data1 trig AT = 1n targ v(out) val='vp/2' rise=3
+.meas tran out_slew trig v(out) val='0.2*vp' rise=2 targ v(out) val='0.8*vp' rise=2
+.meas tran delay_chk param='(inv_delay < 100ps) ? 1 : 0'
+.meas tran skew when v(out)=0.6
+.meas tran skew2 when v(out)=skew_meas
+.meas tran skew3 when v(out)=skew_meas fall=2
+.meas tran skew4 when v(out)=skew_meas fall=LAST
+.meas tran skew5 FIND v(out) AT=2n
+*.measure tran v0_min min i(v0) from='dfall' to='dfall+period'
+*.measure tran v0_avg avg i(v0) from='dfall' to='dfall+period'
+*.measure tran v0_integ integ i(v0) from='dfall' to='dfall+period'
+*.measure tran v0_rms rms i(v0) from='dfall' to='dfall+period'
+
+.control
+run
+rusage all
+plot v(in) v(out)
+.endc
+
+.end
+
diff --git a/Windows/spice/examples/measure/inv-meas-tran-control.sp b/Windows/spice/examples/measure/inv-meas-tran-control.sp
new file mode 100644
index 00000000..48f7d09a
--- /dev/null
+++ b/Windows/spice/examples/measure/inv-meas-tran-control.sp
@@ -0,0 +1,113 @@
+Inverter example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+* autostop (.tran defines simulation end as 4ns but simulation stops at
+* 142.5ps when .measure statements are evaluated)
+* scale (all device units are in microns)
+* model binning (look in device.values file for which bin chosen)
+*
+* m.x1.mn:
+* model = nch.2
+*
+* m.x1.mp:
+* model = pch.2
+*
+* parameters
+* parameterized subckt
+* vsrc with repeat
+* .measure statements for delay and an example ternary operator
+* device listing and parameter listing
+* You can run the example circuit with this command:
+*
+* ngspice inverter3.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+* scale -- define scale factor for mosfet device parameters (l,w,area,perimeter)
+*.option autostop
+.option scale = 1e-6
+
+* model binning
+.model nch.1 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model nch.2 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+.model pch.1 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model pch.2 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+
+* parameters
+.param vp = 1.0v
+.param lmin = 0.10
+.param wmin = 0.12
+.param plmin = 'lmin'
+.param nlmin = 'lmin'
+.param wpmin = 'wmin'
+.param wnmin = 'wmin'
+.param drise = 400ps
+.param dfall = 100ps
+.param trise = 100ps
+.param tfall = 100ps
+.param period = 1ns
+.param skew_meas = 'vp/2'
+
+* parameterized subckt
+.subckt inv in out pw='wpmin' pl='plmin' nw='wnmin' nl='nlmin'
+mp out in vdd vdd pch w='pw' l='pl'
+mn out in gnd gnd nch w='nw' l='nl'
+.ends
+
+v0 vdd gnd 'vp'
+
+* vsrc with repeat
+v1 in gnd pwl
++ 0ns 'vp'
++ 'dfall-0.8*tfall' 'vp'
++ 'dfall-0.4*tfall' '0.9*vp'
++ 'dfall+0.4*tfall' '0.1*vp'
++ 'dfall+0.8*tfall' 0v
++ 'drise-0.8*trise' 0v
++ 'drise-0.4*trise' '0.1*vp'
++ 'drise+0.4*trise' '0.9*vp'
++ 'drise+0.8*trise' 'vp'
++ 'period+dfall-0.8*tfall' 'vp'
++ r='dfall-0.8*tfall'
+
+x1 in out inv pw=60 nw=20
+c1 out gnd 220fF
+
+.control
+tran 1ps 4ns
+meas tran inv_delay trig v(in) val=0.5 fall=1 targ v(out) val=0.5 rise=1
+meas tran inv_delay2 trig v(in) val=0.5 td=1n fall=1 targ v(out) val=0.5 rise=1
+meas tran test_data1 trig AT = 1n targ v(out) val=0.5 rise=3
+meas tran out_slew trig v(out) val=0.2 rise=2 targ v(out) val=0.8 rise=2
+
+*.meas tran delay_chk param='(inv_delay < 100ps) ? 1 : 0'
+if ( inv_delay < 100ps )
+ let delay_chk = 1
+else
+ let delay_chk = 0
+end
+echo delay_chk = "$&delay_chk"
+
+meas tran skew when v(out)=0.6
+let skew_meas = 0.5
+meas tran skew2 when v(out)=skew_meas
+meas tran skew3 when v(out)=skew_meas fall=2
+meas tran skew4 when v(out)=skew_meas fall=LAST
+meas tran skew5 FIND v(out) AT=2n
+let dfall = 100p
+let period = 1n
+let delta = dfall+period
+meas tran v0_min min i(v0) from=dfall to=delta
+meas tran i_v0_min min_at i(v0) from=dfall to=delta
+meas tran v0_avg avg i(v0) from = dfall to = delta
+meas tran v0_integ integ i(v0) from=dfall to=delta
+meas tran v0_rms rms i(v0) from=dfall to=delta
+rusage all
+plot v(in) v(out)
+.endc
+
+.end
+
diff --git a/Windows/spice/examples/measure/inv-meas-tran.sp b/Windows/spice/examples/measure/inv-meas-tran.sp
new file mode 100644
index 00000000..0a4077ea
--- /dev/null
+++ b/Windows/spice/examples/measure/inv-meas-tran.sp
@@ -0,0 +1,104 @@
+Inverter example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+* autostop (.tran defines simulation end as 4ns but simulation stops at
+* 142.5ps when .measure statements are evaluated)
+* scale (all device units are in microns)
+* model binning (look in device.values file for which bin chosen)
+*
+* m.x1.mn:
+* model = nch.2
+*
+* m.x1.mp:
+* model = pch.2
+*
+* parameters
+* parameterized subckt
+* vsrc with repeat
+* .measure statements for delay and an example ternary operator
+* device listing and parameter listing
+* You can run the example circuit with this command:
+*
+* ngspice inverter3.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+* scale -- define scale factor for mosfet device parameters (l,w,area,perimeter)
+*.option autostop
+.option scale = 1e-6
+
+* model binning
+.model nch.1 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model nch.2 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+.model pch.1 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model pch.2 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+
+* parameters
+.param vp = 1.0v
+.param lmin = 0.10
+.param wmin = 0.12
+.param plmin = 'lmin'
+.param nlmin = 'lmin'
+.param wpmin = 'wmin'
+.param wnmin = 'wmin'
+.param drise = 400ps
+.param dfall = 100ps
+.param trise = 100ps
+.param tfall = 100ps
+.param period = 1ns
+.param skew_meas = 'vp/2'
+
+* parameterized subckt
+.subckt inv in out pw='wpmin' pl='plmin' nw='wnmin' nl='nlmin'
+mp out in vdd vdd pch w='pw' l='pl'
+mn out in gnd gnd nch w='nw' l='nl'
+.ends
+
+v0 vdd gnd 'vp'
+
+* vsrc with repeat
+v1 in gnd pwl
++ 0ns 'vp'
++ 'dfall-0.8*tfall' 'vp'
++ 'dfall-0.4*tfall' '0.9*vp'
++ 'dfall+0.4*tfall' '0.1*vp'
++ 'dfall+0.8*tfall' 0v
++ 'drise-0.8*trise' 0v
++ 'drise-0.4*trise' '0.1*vp'
++ 'drise+0.4*trise' '0.9*vp'
++ 'drise+0.8*trise' 'vp'
++ 'period+dfall-0.8*tfall' 'vp'
++ r='dfall-0.8*tfall'
+
+x1 in out inv pw=60 nw=20
+c1 out gnd 220fF
+
+.tran 1ps 4ns
+
+.meas tran inv_delay trig v(in) val='vp/2' fall=1 targ v(out) val='vp/2' rise=1
+.meas tran inv_delay2 trig v(in) val='vp/2' td=1n fall=1 targ v(out) val='vp/2' rise=1
+.meas tran test_data1 trig AT = 1n targ v(out) val='vp/2' rise=3
+.meas tran out_slew trig v(out) val='0.2*vp' rise=2 targ v(out) val='0.8*vp' rise=2
+.meas tran delay_chk param='(inv_delay < 100ps) ? 1 : 0'
+.meas tran skew when v(out)=0.6
+.meas tran skew2 when v(out)=skew_meas
+.meas tran skew3 when v(out)=skew_meas fall=2
+.meas tran skew4 when v(out)=skew_meas fall=LAST
+.meas tran skew5 FIND v(out) AT=2n
+.meas tran v0_min min i(v0) from='dfall' to='dfall+period'
+.meas tran i_v0_min min_at i(v0) from='dfall' to='dfall+period'
+.meas tran v0_avg avg i(v0) from='dfall' to='dfall+period'
+.meas tran v0_integ integ i(v0) from='dfall' to='dfall+period'
+.meas tran v0_rms rms i(v0) from='dfall' to='dfall+period'
+
+.control
+run
+rusage all
+plot v(in) v(out)
+.endc
+
+.end
+
diff --git a/Windows/spice/examples/measure/inv-meas-tran_oc.sp b/Windows/spice/examples/measure/inv-meas-tran_oc.sp
new file mode 100644
index 00000000..98077b80
--- /dev/null
+++ b/Windows/spice/examples/measure/inv-meas-tran_oc.sp
@@ -0,0 +1,98 @@
+Inverter example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+* autostop (.tran defines simulation end as 4ns but simulation stops at
+* 142.5ps when .measure statements are evaluated)
+* scale (all device units are in microns)
+* model binning (look in device.values file for which bin chosen)
+*
+* m.x1.mn:
+* model = nch.2
+*
+* m.x1.mp:
+* model = pch.2
+*
+* parameters
+* parameterized subckt
+* vsrc with repeat
+* .measure statements for delay and an example ternary operator
+* device listing and parameter listing
+* You can run the example circuit with this command:
+*
+* ngspice inverter3.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+* scale -- define scale factor for mosfet device parameters (l,w,area,perimeter)
+*.option autostop
+.option scale = 1e-6
+
+* model binning
+.model nch.1 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model nch.2 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+.model pch.1 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model pch.2 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+
+* parameters
+.param vp = 1.0v
+.param lmin = 0.10
+.param wmin = 0.12
+.param plmin = 'lmin'
+.param nlmin = 'lmin'
+.param wpmin = 'wmin'
+.param wnmin = 'wmin'
+.param drise = 400ps
+.param dfall = 100ps
+.param trise = 100ps
+.param tfall = 100ps
+.param period = 1ns
+.param skew_meas = 'vp/2'
+
+* parameterized subckt
+.subckt inv in out pw='wpmin' pl='plmin' nw='wnmin' nl='nlmin'
+mp out in vdd vdd pch w='pw' l='pl'
+mn out in gnd gnd nch w='nw' l='nl'
+.ends
+
+v0 vdd gnd 'vp'
+
+* vsrc with repeat
+v1 in gnd pwl
++ 0ns 'vp'
++ 'dfall-0.8*tfall' 'vp'
++ 'dfall-0.4*tfall' '0.9*vp'
++ 'dfall+0.4*tfall' '0.1*vp'
++ 'dfall+0.8*tfall' 0v
++ 'drise-0.8*trise' 0v
++ 'drise-0.4*trise' '0.1*vp'
++ 'drise+0.4*trise' '0.9*vp'
++ 'drise+0.8*trise' 'vp'
++ 'period+dfall-0.8*tfall' 'vp'
++ r='dfall-0.8*tfall'
+
+x1 in out inv pw=60 nw=20
+c1 out gnd 220fF
+
+.tran 1ps 4ns
+
+.meas tran inv_delay trig v(in) val='vp/2' fall=1 targ v(out) val='vp/2' rise=1
+.meas tran inv_delay2 trig v(in) val='vp/2' td=1n fall=1 targ v(out) val='vp/2' rise=1
+.meas tran test_data1 trig AT = 1n targ v(out) val='vp/2' rise=3
+.meas tran out_slew trig v(out) val='0.2*vp' rise=2 targ v(out) val='0.8*vp' rise=2
+.meas tran delay_chk param='(inv_delay < 100ps) ? 1 : 0'
+.meas tran skew when v(out)=0.6
+.meas tran skew2 when v(out)=skew_meas
+.meas tran skew3 when v(out)=skew_meas fall=2
+.meas tran skew4 when v(out)=skew_meas fall=LAST
+.meas tran skew5 FIND v(out) AT=2n
+.meas tran v0_min min i(v0) from='dfall' to='dfall+period'
+.meas tran i_v0_min min_at i(v0) from='dfall' to='dfall+period'
+.meas tran v0_avg avg i(v0) from='dfall' to='dfall+period'
+.meas tran v0_integ integ i(v0) from='dfall' to='dfall+period'
+.meas tran v0_rms rms i(v0) from='dfall' to='dfall+period'
+
+.end
+
diff --git a/Windows/spice/examples/measure/mos-meas-dc-control.sp b/Windows/spice/examples/measure/mos-meas-dc-control.sp
new file mode 100644
index 00000000..9869cf60
--- /dev/null
+++ b/Windows/spice/examples/measure/mos-meas-dc-control.sp
@@ -0,0 +1,49 @@
+***** Single NMOS Transistor .measure (Id-Vd) ***
+* Altering device witdth leads to select new model due to binning limits.
+* New model has artificially thick gate oxide (changed from default 3n to 4n)
+* to demonstrate the effect.
+m1 d g s b nch L=0.6u W=9.99u ; W is slightly below binning limit
+
+vgs g 0 3.5
+vds d 0 3.5
+vs s 0 dc 0
+vb b 0 dc 0
+
+* model binning
+* uses default parameters, except toxe
+.model nch.1 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u toxe=3n )
+.model nch.2 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u toxe=4n)
+
+.control
+dc vds 0 3.5 0.05 vgs 3.5 0.5 -0.5
+meas dc is_at FIND i(vs) AT=1
+meas dc is_max max i(vs)
+meas dc vds_at2 when i(vs)=10m
+* starting with branches in descending order of vgs
+* trig ist the first branch which crosses 5mA
+* Targ is the first branch crossing 10mA
+meas dc vd_diff1 trig i(vs) val=0.005 rise=1 targ i(vs) val=0.01 rise=1
+* trig ist the first branch which crosses 5mA
+* Targ is the second branch crossing 10mA
+meas dc vd_diff2 trig i(vs) val=0.005 rise=2 targ i(vs) val=0.01 rise=2
+alter @m1[w]=10.01u ; W is slightly above binning limit
+dc vds 0 3.5 0.05 vgs 3.5 0.5 -0.5
+meas dc is_at FIND i(vs) AT=1
+meas dc is_max max i(vs)
+meas dc vds_at2 when i(vs)=10m
+meas dc vd_diff1 trig i(vs) val=0.005 rise=1 targ i(vs) val=0.01 rise=1
+* there is only one branch crossing 10mA, so this second meas fails with targ out of interval
+echo
+echo The next one will fail (no two branches crossing 10 mA):
+meas dc vd_diff2 trig i(vs) val=0.005 rise=2 targ i(vs) val=0.01 rise=2
+*rusage all
+plot dc1.i(vs) i(vs)
+.endc
+
+
+.end
+
+
+
+
+
diff --git a/Windows/spice/examples/measure/mos-meas-dc.sp b/Windows/spice/examples/measure/mos-meas-dc.sp
new file mode 100644
index 00000000..eb3892db
--- /dev/null
+++ b/Windows/spice/examples/measure/mos-meas-dc.sp
@@ -0,0 +1,37 @@
+***** Single NMOS Transistor .measure (Id-Vd) ***
+m1 d g s b nch L=0.6u W=10.0u
+
+vgs g 0 3.5
+vds d 0 3.5
+vs s 0 dc 0
+vb b 0 dc 0
+
+.dc vds 0 3.5 0.05 vgs 0.5 3.5 0.5
+
+.print dc v(1) i(vs)
+
+* model binning
+.model nch.1 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model nch.2 nmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+.model pch.1 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u )
+.model pch.2 pmos ( version=4.4 level=54 lmin=0.1u lmax=20u wmin=10u wmax=100u )
+
+.meas dc is_at FIND i(vs) AT=1
+.meas dc is_max max i(vs) from=0 to=3.5
+.meas dc vds_at2 when i(vs)=10m
+.meas dc vd_diff1 trig i(vs) val=0.005 rise=1 targ i(vs) val=0.01 rise=1
+.meas dc vd_diff2 trig i(vs) val=0.005 rise=1 targ i(vs) val=0.01 rise=2
+
+.control
+run
+*rusage all
+plot i(vs)
+.endc
+
+
+.end
+
+
+
+
+
diff --git a/Windows/spice/examples/measure/rc-meas-ac-control.sp b/Windows/spice/examples/measure/rc-meas-ac-control.sp
new file mode 100644
index 00000000..9b57929d
--- /dev/null
+++ b/Windows/spice/examples/measure/rc-meas-ac-control.sp
@@ -0,0 +1,64 @@
+RC band pass example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+
+* .measure statements for delay and an example ternary operator
+
+* You can run the example circuit with this command:
+*
+* ngspice rc-meas-ac.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+*.option autostop
+
+vin in gnd dc 0 ac 1
+
+R1 in mid1 1k
+c1 mid1 gnd 1n
+C2 mid1 out 500p
+R2 out gnd 1k
+
+
+.control
+ac DEC 10 1k 10MEG
+meas ac vout_at FIND v(out) AT=1MEG
+meas ac vout_atr FIND vr(out) AT=1MEG
+meas ac vout_ati FIND vi(out) AT=1MEG
+meas ac vout_atm FIND vm(out) AT=1MEG
+meas ac vout_atp FIND vp(out) AT=1MEG
+meas ac vout_atd FIND vdb(out) AT=1MEG
+meas ac vout_max max v(out) from=1k to=10MEG
+meas ac freq_at when v(out)=0.1
+meas ac vout_diff trig v(out) val=0.1 rise=1 targ v(out) val=0.1 fall=1
+meas ac fixed_diff trig AT = 10k targ v(out) val=0.1 rise=1
+meas ac vout_avg avg v(out) from=10k to=1MEG
+meas ac vout_integ integ v(out) from=20k to=500k
+meas ac freq_at2 when v(out)=0.1 fall=LAST
+*meas ac bw_chk param='(vout_diff < 100k) ? 1 : 0'
+if (vout_diff < 100k)
+ let bw_chk = 1
+else
+ let bw_chk = 0
+end
+echo bw_chk = "$&bw_chk"
+*meas ac bw_chk2 param='(vout_diff > 500k) ? 1 : 0'
+if (vout_diff > 500k)
+ let bw_chk2 = 1
+else
+ let bw_chk2 = 0
+end
+echo bw_chk2 = "$&bw_chk2"
+meas ac vout_rms rms v(out) from=10 to=1G
+*rusage all
+plot v(out)
+plot ph(v(out))
+plot mag(v(out))
+plot db(v(out))
+.endc
+
+.end
+
diff --git a/Windows/spice/examples/measure/rc-meas-ac.sp b/Windows/spice/examples/measure/rc-meas-ac.sp
new file mode 100644
index 00000000..2d464ba5
--- /dev/null
+++ b/Windows/spice/examples/measure/rc-meas-ac.sp
@@ -0,0 +1,54 @@
+RC band pass example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+
+* .measure statements for delay and an example ternary operator
+
+* You can run the example circuit with this command:
+*
+* ngspice rc-meas-ac.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+*.option autostop
+
+vin in gnd dc 0 ac 1
+
+R1 in mid1 1k
+c1 mid1 gnd 1n
+C2 mid1 out 500p
+R2 out gnd 1k
+
+.ac DEC 10 1k 10MEG
+
+.meas ac vout_at FIND v(out) AT=1MEG
+.meas ac vout_atr FIND vr(out) AT=1MEG
+.meas ac vout_ati FIND vi(out) AT=1MEG
+.meas ac vout_atm FIND vm(out) AT=1MEG
+.meas ac vout_atp FIND vp(out) AT=1MEG
+.meas ac vout_atd FIND vdb(out) AT=1MEG
+.meas ac vout_max max v(out) from=1k to=10MEG
+.meas ac freq_at when v(out)=0.1
+.meas ac vout_diff trig v(out) val=0.1 rise=1 targ v(out) val=0.1 fall=1
+.meas ac fixed_diff trig AT = 10k targ v(out) val=0.1 rise=1
+.meas ac vout_avg avg v(out) from=10k to=1MEG
+.meas ac vout_integ integ v(out) from=20k to=500k
+.meas ac freq_at2 when v(out)=0.1 fall=LAST
+.meas ac bw_chk param='(vout_diff < 100k) ? 1 : 0'
+.meas ac bw_chk2 param='(vout_diff > 500k) ? 1 : 0'
+.meas ac vout_rms rms v(out) from=10 to=1G
+
+.control
+run
+*rusage all
+plot v(out)
+plot ph(v(out))
+plot mag(v(out))
+plot db(v(out))
+.endc
+
+.end
+
diff --git a/Windows/spice/examples/measure/simple-meas-tran.sp b/Windows/spice/examples/measure/simple-meas-tran.sp
new file mode 100644
index 00000000..0279c73f
--- /dev/null
+++ b/Windows/spice/examples/measure/simple-meas-tran.sp
@@ -0,0 +1,57 @@
+File: simple-meas-tran.sp
+* Simple .measurement examples
+* transient simulation of two sine signals with different frequencies
+vac1 1 0 DC 0 sin(0 1 1k 0 0)
+R1 1 0 100k
+vac2 2 0 DC 0 sin(0 1.2 0.9k 0 0)
+.tran 10u 5m
+*
+.measure tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=2
+.measure tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=3
+.measure tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 FALL=1
+.measure tran tdiff TRIG v(1) VAL=0 FALL=3 TARG v(2) VAL=0 FALL=3
+.measure tran tdiff TRIG v(1) VAL=-0.6 CROSS=1 TARG v(2) VAL=-0.8 CROSS=1
+.measure tran tdiff TRIG AT=1m TARG v(2) VAL=-0.8 CROSS=3
+.measure tran teval WHEN v(2)=0.7 CROSS=LAST
+.measure tran teval WHEN v(2)=v(1) FALL=LAST
+.measure tran teval WHEN v(1)=v(2) CROSS=LAST
+.measure tran yeval FIND v(2) WHEN v(1)=0.2 FALL=2
+.measure tran yeval FIND v(2) AT=2m
+.measure tran ymax MAX v(2) from=2m to=3m
+.measure tran tymax MAX_AT v(2) from=2m to=3m
+.measure tran ypp PP v(1) from=2m to=4m
+.measure tran yrms RMS v(1) from=2m to=3.5m
+.measure tran yavg AVG v(1) from=2m to=4m
+.measure tran yint INTEG v(2) from=2m to=3m
+.param fval=5
+.measure tran yadd param='fval + 7'
+.param vout_diff=50k
+.meas tran bw_chk param='(vout_diff < 100k) ? 1 : 0'
+.measure tran vtest find par('v(2)*v(1)') AT=2.3m
+*
+.control
+run
+plot v(1) v(2)
+gnuplot ttt i(vac1)
+meas tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=2
+meas tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=3
+meas tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 FALL=1
+meas tran tdiff TRIG v(1) VAL=0 FALL=3 TARG v(2) VAL=0 FALL=3
+meas tran tdiff TRIG v(1) VAL=-0.6 CROSS=1 TARG v(2) VAL=-0.8 CROSS=1
+meas tran tdiff TRIG AT=1m TARG v(2) VAL=-0.8 CROSS=3
+meas tran teval WHEN v(2)=0.7 CROSS=LAST
+meas tran teval WHEN v(2)=v(1) FALL=LAST
+meas tran teval WHEN v(1)=v(2) CROSS=LAST
+meas tran yeval FIND v(2) WHEN v(1)=0.2 FALL=2
+meas tran yeval FIND v(2) AT=2m
+meas tran ymax MAX v(2) from=2m to=3m
+meas tran tymax MAX_AT v(2) from=2m to=3m
+meas tran ypp PP v(1) from=2m to=4m
+meas tran yrms RMS v(1) from=2m to=3.5m
+meas tran yavg AVG v(1) from=2m to=4m
+meas tran yint INTEG v(2) from=2m to=3m
+meas tran ymax MAX v(2) from=2m to=3m
+meas tran tmax WHEN v(2)=YMAX from=1m to=2m $ from..to.. not recognized!
+
+.endc
+.end