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authorrahulp132021-01-07 18:22:29 +0530
committerrahulp132021-01-07 18:22:29 +0530
commitd4fd47ecf77597595d3f4fa72fd5334a5fe7417b (patch)
tree28095229ec3035d15c569fbedac83cf5876aa196 /Windows/spice/examples/cider/mos
parent376e748df438933088721286402462dffd6367c0 (diff)
parent63e3156454f39732a3101c29d42b473a89ca68d2 (diff)
downloadeSim-d4fd47ecf77597595d3f4fa72fd5334a5fe7417b.tar.gz
eSim-d4fd47ecf77597595d3f4fa72fd5334a5fe7417b.tar.bz2
eSim-d4fd47ecf77597595d3f4fa72fd5334a5fe7417b.zip
Merge windows installer updates with linux installer
Diffstat (limited to 'Windows/spice/examples/cider/mos')
-rw-r--r--Windows/spice/examples/cider/mos/bootinv.cir59
-rw-r--r--Windows/spice/examples/cider/mos/charge.cir57
-rw-r--r--Windows/spice/examples/cider/mos/cmosinv.cir115
-rw-r--r--Windows/spice/examples/cider/mos/nmosinv.cir55
-rw-r--r--Windows/spice/examples/cider/mos/pass.cir59
-rw-r--r--Windows/spice/examples/cider/mos/ringosc.cir122
6 files changed, 0 insertions, 467 deletions
diff --git a/Windows/spice/examples/cider/mos/bootinv.cir b/Windows/spice/examples/cider/mos/bootinv.cir
deleted file mode 100644
index 4c2ea40d..00000000
--- a/Windows/spice/examples/cider/mos/bootinv.cir
+++ /dev/null
@@ -1,59 +0,0 @@
-NMOS Enhancement-Load Bootstrap Inverter
-
-Vdd 1 0 5.0v
-Vss 2 0 0.0v
-
-Vin 5 0 0.0v PWL (0.0ns 5.0v) (1ns 0.0v) (10ns 0.0v) (11ns 5.0v)
-+ (20ns 5.0v) (21ns 0.0v) (30ns 0.0v) (31ns 5.0v)
-M1 1 1 3 2 M_NMOS w=5u
-M2 1 3 4 4 M_NMOS w=5u
-M3 4 5 2 2 M_NMOS w=5u
-CL 4 0 0.1pf
-CB 3 4 0.1pf
-
-.model M_NMOS numos
-+ x.mesh l=0.0 n=1
-+ x.mesh l=0.6 n=4
-+ x.mesh l=0.7 n=5
-+ x.mesh l=1.0 n=7
-+ x.mesh l=1.2 n=11
-+ x.mesh l=3.2 n=21
-+ x.mesh l=3.4 n=25
-+ x.mesh l=3.7 n=27
-+ x.mesh l=3.8 n=28
-+ x.mesh l=4.4 n=31
-+
-+ y.mesh l=-.05 n=1
-+ y.mesh l=0.0 n=5
-+ y.mesh l=.05 n=9
-+ y.mesh l=0.3 n=14
-+ y.mesh l=2.0 n=19
-+
-+ region num=1 material=1 y.l=0.0
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 init elec major
-+ mobility material=1 init elec minor
-+ mobility material=1 init hole major
-+ mobility material=1 init hole minor
-+
-+ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
-+ material num=2 oxide
-+
-+ elec num=1 x.l=3.8 x.h=4.4 y.l=0.0 y.h=0.0
-+ elec num=2 x.l=0.7 x.h=3.7 iy.l=1 iy.h=1
-+ elec num=3 x.l=0.0 x.h=0.6 y.l=0.0 y.h=0.0
-+ elec num=4 x.l=0.0 x.h=4.4 y.l=2.0 y.h=2.0
-+
-+ doping unif p.type conc=2.5e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=2.0
-+ doping unif p.type conc=1e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=0.05
-+ doping unif n.type conc=1e20 x.l=0.0 x.h=1.1 y.l=0.0 y.h=0.2
-+ doping unif n.type conc=1e20 x.l=3.3 x.h=4.4 y.l=0.0 y.h=0.2
-+
-+ models concmob fieldmob
-+ method ac=direct onec
-
-.tran 0.2ns 40ns
-.print v(4)
-.options acct bypass=1 method=gear
-.end
diff --git a/Windows/spice/examples/cider/mos/charge.cir b/Windows/spice/examples/cider/mos/charge.cir
deleted file mode 100644
index 845a14a8..00000000
--- a/Windows/spice/examples/cider/mos/charge.cir
+++ /dev/null
@@ -1,57 +0,0 @@
-MOS charge pump
-
-vin 4 0 dc 0v pulse 0 5 15ns 5ns 5ns 50ns 100ns
-vdd 5 6 dc 0v pulse 0 5 25ns 5ns 5ns 50ns 100ns
-vbb 0 7 dc 0v pulse 0 5 0ns 5ns 5ns 50ns 100ns
-rd 6 2 10k
-m1 5 4 3 7 mmod w=100um
-vs 3 2 0
-vc 2 1 0
-c2 1 0 10pf
-
-.ic v(3)=1.0
-.tran 2ns 200ns
-.options acct bypass=1
-.print tran v(1) v(2)
-
-.model mmod numos
-+ x.mesh n=1 l=0
-+ x.mesh n=3 l=0.4
-+ x.mesh n=7 l=0.6
-+ x.mesh n=15 l=1.4
-+ x.mesh n=19 l=1.6
-+ x.mesh n=21 l=2.0
-+
-+ y.mesh n=1 l=0
-+ y.mesh n=4 l=0.015
-+ y.mesh n=8 l=0.05
-+ y.mesh n=12 l=0.25
-+ y.mesh n=14 l=0.35
-+ y.mesh n=17 l=0.5
-+ y.mesh n=21 l=1.0
-+
-+ region num=1 material=1 y.l=0.015
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 elec major
-+ mobility material=1 elec minor
-+ mobility material=1 hole major
-+ mobility material=1 hole minor
-+
-+ region num=2 material=2 y.h=0.015 x.l=0.5 x.h=1.5
-+ material num=2 oxide
-+
-+ elec num=1 ix.l=18 ix.h=21 iy.l=4 iy.h=4
-+ elec num=2 ix.l=5 ix.h=17 iy.l=1 iy.h=1
-+ elec num=3 ix.l=1 ix.h=4 iy.l=4 iy.h=4
-+ elec num=4 ix.l=1 ix.h=21 iy.l=21 iy.h=21
-+
-+ doping unif n.type conc=1e18 x.l=0.0 x.h=0.5 y.l=0.015 y.h=0.25
-+ doping unif n.type conc=1e18 x.l=1.5 x.h=2.0 y.l=0.015 y.h=0.25
-+ doping unif p.type conc=1e15 x.l=0.0 x.h=2.0 y.l=0.015 y.h=1.0
-+ doping unif p.type conc=1.3e17 x.l=0.5 x.h=1.5 y.l=0.015 y.h=0.05
-+
-+ models concmob fieldmob
-+ method onec
-
-.end
diff --git a/Windows/spice/examples/cider/mos/cmosinv.cir b/Windows/spice/examples/cider/mos/cmosinv.cir
deleted file mode 100644
index 8f153cc7..00000000
--- a/Windows/spice/examples/cider/mos/cmosinv.cir
+++ /dev/null
@@ -1,115 +0,0 @@
-CMOS Inverter
-
-Vdd 1 0 5.0v
-Vss 2 0 0.0v
-
-X1 1 2 3 4 INV
-
-Vin 3 0 2.5v
-
-.SUBCKT INV 1 2 3 4
-* Vdd Vss Vin Vout
-M1 14 13 15 16 M_PMOS w=6.0u
-M2 24 23 25 26 M_NMOS w=3.0u
-
-Vgp 3 13 0.0v
-Vdp 4 14 0.0v
-Vsp 1 15 0.0v
-Vbp 1 16 0.0v
-
-Vgn 3 23 0.0v
-Vdn 4 24 0.0v
-Vsn 2 25 0.0v
-Vbn 2 26 0.0v
-.ENDS INV
-
-.model M_NMOS numos
-+ x.mesh l=0.0 n=1
-+ x.mesh l=0.6 n=4
-+ x.mesh l=0.7 n=5
-+ x.mesh l=1.0 n=7
-+ x.mesh l=1.2 n=11
-+ x.mesh l=3.2 n=21
-+ x.mesh l=3.4 n=25
-+ x.mesh l=3.7 n=27
-+ x.mesh l=3.8 n=28
-+ x.mesh l=4.4 n=31
-+
-+ y.mesh l=-.05 n=1
-+ y.mesh l=0.0 n=5
-+ y.mesh l=.05 n=9
-+ y.mesh l=0.3 n=14
-+ y.mesh l=2.0 n=19
-+
-+ region num=1 material=1 y.l=0.0
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 elec major
-+ mobility material=1 elec minor
-+ mobility material=1 hole major
-+ mobility material=1 hole minor
-+
-+ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
-+ material num=2 oxide
-+
-+ elec num=1 x.l=3.8 x.h=4.4 y.l=0.0 y.h=0.0
-+ elec num=2 x.l=0.7 x.h=3.7 iy.l=1 iy.h=1
-+ elec num=3 x.l=0.0 x.h=0.6 y.l=0.0 y.h=0.0
-+ elec num=4 x.l=0.0 x.h=4.4 y.l=2.0 y.h=2.0
-+
-+ doping unif p.type conc=2.5e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=2.0
-+ doping unif p.type conc=1e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=0.05
-+ doping unif n.type conc=1e20 x.l=0.0 x.h=1.1 y.l=0.0 y.h=0.2
-+ doping unif n.type conc=1e20 x.l=3.3 x.h=4.4 y.l=0.0 y.h=0.2
-+
-+ models concmob fieldmob bgn srh conctau
-+ method ac=direct onec
-
-.model M_PMOS numos
-+ x.mesh l=0.0 n=1
-+ x.mesh l=0.6 n=4
-+ x.mesh l=0.7 n=5
-+ x.mesh l=1.0 n=7
-+ x.mesh l=1.2 n=11
-+ x.mesh l=3.2 n=21
-+ x.mesh l=3.4 n=25
-+ x.mesh l=3.7 n=27
-+ x.mesh l=3.8 n=28
-+ x.mesh l=4.4 n=31
-+
-+ y.mesh l=-.05 n=1
-+ y.mesh l=0.0 n=5
-+ y.mesh l=.05 n=9
-+ y.mesh l=0.3 n=14
-+ y.mesh l=2.0 n=19
-+
-+ region num=1 material=1 y.l=0.0
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 elec major
-+ mobility material=1 elec minor
-+ mobility material=1 hole major
-+ mobility material=1 hole minor
-+
-+ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
-+ material num=2 oxide
-+
-+ elec num=1 x.l=3.8 x.h=4.4 y.l=0.0 y.h=0.0
-+ elec num=2 x.l=0.7 x.h=3.7 iy.l=1 iy.h=1
-+ elec num=3 x.l=0.0 x.h=0.6 y.l=0.0 y.h=0.0
-+ elec num=4 x.l=0.0 x.h=4.4 y.l=2.0 y.h=2.0
-+
-+ doping unif n.type conc=1e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=2.0
-+ doping unif p.type conc=3e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=0.05
-+ doping unif p.type conc=1e20 x.l=0.0 x.h=1.1 y.l=0.0 y.h=0.2
-+ doping unif p.type conc=1e20 x.l=3.3 x.h=4.4 y.l=0.0 y.h=0.2
-+
-+ models concmob fieldmob bgn srh conctau
-+ method ac=direct onec
-
-*.tran 0.1ns 5ns
-*.op
-.dc Vin 0.0v 5.001v 0.05v
-.print v(4)
-.options acct bypass=1 method=gear
-.end
diff --git a/Windows/spice/examples/cider/mos/nmosinv.cir b/Windows/spice/examples/cider/mos/nmosinv.cir
deleted file mode 100644
index ac49c754..00000000
--- a/Windows/spice/examples/cider/mos/nmosinv.cir
+++ /dev/null
@@ -1,55 +0,0 @@
-Resistive load NMOS inverter
-vin 1 0 pwl 0 0.0 2ns 5
-vdd 3 0 dc 5.0
-rd 3 2 2.5k
-m1 2 1 4 5 mmod w=10um
-cl 2 0 2pf
-vb 5 0 0
-vs 4 0 0
-
-.model mmod numos
-+ x.mesh l=0.0 n=1
-+ x.mesh l=0.6 n=4
-+ x.mesh l=0.7 n=5
-+ x.mesh l=1.0 n=7
-+ x.mesh l=1.2 n=11
-+ x.mesh l=3.2 n=21
-+ x.mesh l=3.4 n=25
-+ x.mesh l=3.7 n=27
-+ x.mesh l=3.8 n=28
-+ x.mesh l=4.4 n=31
-+
-+ y.mesh l=-.05 n=1
-+ y.mesh l=0.0 n=5
-+ y.mesh l=.05 n=9
-+ y.mesh l=0.3 n=14
-+ y.mesh l=2.0 n=19
-+
-+ region num=1 material=1 y.l=0.0
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 elec major
-+ mobility material=1 elec minor
-+ mobility material=1 hole major
-+ mobility material=1 hole minor
-+
-+ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
-+ material num=2 oxide
-+
-+ elec num=1 x.l=3.8 x.h=4.4 y.l=0.0 y.h=0.0
-+ elec num=2 x.l=0.7 x.h=3.7 iy.l=1 iy.h=1
-+ elec num=3 x.l=0.0 x.h=0.6 y.l=0.0 y.h=0.0
-+ elec num=4 x.l=0.0 x.h=4.4 y.l=2.0 y.h=2.0
-+
-+ doping unif p.type conc=2.5e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=2.0
-+ doping unif p.type conc=1e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=0.05
-+ doping unif n.type conc=1e20 x.l=0.0 x.h=1.1 y.l=0.0 y.h=0.2
-+ doping unif n.type conc=1e20 x.l=3.3 x.h=4.4 y.l=0.0 y.h=0.2
-+
-+ models concmob fieldmob
-+ method ac=direct onec
-
-.tran 0.2ns 30ns
-.options acct bypass=1
-.print tran v(1) v(2)
-.end
diff --git a/Windows/spice/examples/cider/mos/pass.cir b/Windows/spice/examples/cider/mos/pass.cir
deleted file mode 100644
index a58c8a5f..00000000
--- a/Windows/spice/examples/cider/mos/pass.cir
+++ /dev/null
@@ -1,59 +0,0 @@
-Turnoff transient of pass transistor
-
-M1 11 2 3 4 mmod w=20um
-Cs 1 0 6.0pF
-Cl 3 0 6.0pF
-R1 3 6 200k
-Vin 6 0 dc 0
-Vdrn 1 11 dc 0
-Vg 2 0 dc 5 pwl 0 5 0.1n 0 1 0
-Vb 4 0 dc 0.0
-
-.tran 0.05ns 0.2ns 0.0ns 0.05ns
-.print tran v(1) i(Vdrn)
-.ic v(1)=0 v(3)=0
-.option acct bypass=1
-
-.model mmod numos
-+ x.mesh l=0.0 n=1
-+ x.mesh l=0.6 n=4
-+ x.mesh l=0.7 n=5
-+ x.mesh l=1.0 n=7
-+ x.mesh l=1.2 n=11
-+ x.mesh l=3.2 n=21
-+ x.mesh l=3.4 n=25
-+ x.mesh l=3.7 n=27
-+ x.mesh l=3.8 n=28
-+ x.mesh l=4.4 n=31
-+
-+ y.mesh l=-.05 n=1
-+ y.mesh l=0.0 n=5
-+ y.mesh l=.05 n=9
-+ y.mesh l=0.3 n=14
-+ y.mesh l=2.0 n=19
-+
-+ region num=1 material=1 y.l=0.0
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 elec major
-+ mobility material=1 elec minor
-+ mobility material=1 hole major
-+ mobility material=1 hole minor
-+
-+ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
-+ material num=2 oxide
-+
-+ elec num=1 x.l=3.8 x.h=4.4 y.l=0.0 y.h=0.0
-+ elec num=2 x.l=0.7 x.h=3.7 iy.l=1 iy.h=1
-+ elec num=3 x.l=0.0 x.h=0.6 y.l=0.0 y.h=0.0
-+ elec num=4 x.l=0.0 x.h=4.4 y.l=2.0 y.h=2.0
-+
-+ doping unif p.type conc=2.5e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=2.0
-+ doping unif p.type conc=1e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=0.05
-+ doping unif n.type conc=1e20 x.l=0.0 x.h=1.1 y.l=0.0 y.h=0.2
-+ doping unif n.type conc=1e20 x.l=3.3 x.h=4.4 y.l=0.0 y.h=0.2
-+
-+ models concmob fieldmob
-+ method ac=direct onec
-
-.end
diff --git a/Windows/spice/examples/cider/mos/ringosc.cir b/Windows/spice/examples/cider/mos/ringosc.cir
deleted file mode 100644
index 0f313320..00000000
--- a/Windows/spice/examples/cider/mos/ringosc.cir
+++ /dev/null
@@ -1,122 +0,0 @@
-CMOS Ring Oscillator
-
-Vdd 1 0 5.0v
-Vss 2 0 0.0v
-
-X1 1 2 3 4 INV
-X2 1 2 4 5 INV
-X3 1 2 5 3 INV
-*X4 1 2 6 7 INV
-*X5 1 2 7 8 INV
-*X6 1 2 8 9 INV
-*X7 1 2 9 3 INV
-
-.IC V(3)=0.0v V(4)=2.5v V(5)=5.0v
-* V(6)=0.0v V(7)=5.0v V(8)=0.0v V(9)=5.0v
-
-Vin 3 0 2.5v
-
-.SUBCKT INV 1 2 3 4
-* Vdd Vss Vin Vout
-M1 14 13 15 16 M_PMOS w=6.0u
-M2 24 23 25 26 M_NMOS w=3.0u
-
-Vgp 3 13 0.0v
-Vdp 4 14 0.0v
-Vsp 1 15 0.0v
-Vbp 1 16 0.0v
-
-Vgn 3 23 0.0v
-Vdn 4 24 0.0v
-Vsn 2 25 0.0v
-Vbn 2 26 0.0v
-.ENDS INV
-
-.model M_NMOS numos
-+ x.mesh l=0.0 n=1
-+ x.mesh l=0.6 n=4
-+ x.mesh l=0.7 n=5
-+ x.mesh l=1.0 n=7
-+ x.mesh l=1.2 n=11
-+ x.mesh l=3.2 n=21
-+ x.mesh l=3.4 n=25
-+ x.mesh l=3.7 n=27
-+ x.mesh l=3.8 n=28
-+ x.mesh l=4.4 n=31
-+
-+ y.mesh l=-.05 n=1
-+ y.mesh l=0.0 n=5
-+ y.mesh l=.05 n=9
-+ y.mesh l=0.3 n=14
-+ y.mesh l=2.0 n=19
-+
-+ region num=1 material=1 y.l=0.0
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 elec major
-+ mobility material=1 elec minor
-+ mobility material=1 hole major
-+ mobility material=1 hole minor
-+
-+ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
-+ material num=2 oxide
-+
-+ elec num=1 x.l=3.8 x.h=4.4 y.l=0.0 y.h=0.0
-+ elec num=2 x.l=0.7 x.h=3.7 iy.l=1 iy.h=1
-+ elec num=3 x.l=0.0 x.h=0.6 y.l=0.0 y.h=0.0
-+ elec num=4 x.l=0.0 x.h=4.4 y.l=2.0 y.h=2.0
-+
-+ doping unif p.type conc=2.5e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=2.0
-+ doping unif p.type conc=1e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=0.05
-+ doping unif n.type conc=1e20 x.l=0.0 x.h=1.1 y.l=0.0 y.h=0.2
-+ doping unif n.type conc=1e20 x.l=3.3 x.h=4.4 y.l=0.0 y.h=0.2
-+
-+ models concmob fieldmob bgn srh conctau
-+ method ac=direct onec
-
-.model M_PMOS numos
-+ x.mesh l=0.0 n=1
-+ x.mesh l=0.6 n=4
-+ x.mesh l=0.7 n=5
-+ x.mesh l=1.0 n=7
-+ x.mesh l=1.2 n=11
-+ x.mesh l=3.2 n=21
-+ x.mesh l=3.4 n=25
-+ x.mesh l=3.7 n=27
-+ x.mesh l=3.8 n=28
-+ x.mesh l=4.4 n=31
-+
-+ y.mesh l=-.05 n=1
-+ y.mesh l=0.0 n=5
-+ y.mesh l=.05 n=9
-+ y.mesh l=0.3 n=14
-+ y.mesh l=2.0 n=19
-+
-+ region num=1 material=1 y.l=0.0
-+ material num=1 silicon
-+ mobility material=1 concmod=sg fieldmod=sg
-+ mobility material=1 elec major
-+ mobility material=1 elec minor
-+ mobility material=1 hole major
-+ mobility material=1 hole minor
-+
-+ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
-+ material num=2 oxide
-+
-+ elec num=1 x.l=3.8 x.h=4.4 y.l=0.0 y.h=0.0
-+ elec num=2 x.l=0.7 x.h=3.7 iy.l=1 iy.h=1
-+ elec num=3 x.l=0.0 x.h=0.6 y.l=0.0 y.h=0.0
-+ elec num=4 x.l=0.0 x.h=4.4 y.l=2.0 y.h=2.0
-+
-+ doping unif n.type conc=1e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=2.0
-+ doping unif p.type conc=3e16 x.l=0.0 x.h=4.4 y.l=0.0 y.h=0.05
-+ doping unif p.type conc=1e20 x.l=0.0 x.h=1.1 y.l=0.0 y.h=0.2
-+ doping unif p.type conc=1e20 x.l=3.3 x.h=4.4 y.l=0.0 y.h=0.2
-+
-+ models concmob fieldmob bgn srh conctau
-+ method ac=direct onec
-
-.tran 0.1ns 5ns
-.print v(4)
-.options acct bypass=1 method=gear
-.end