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author | Fahim | 2015-12-30 12:20:39 +0530 |
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committer | Fahim | 2015-12-30 12:20:39 +0530 |
commit | 5c21ac87792c7eee763afcd6df80fc0bb8524b6c (patch) | |
tree | 385a811388f218bc5ebd798a7b9bbbdfda537d1a /Examples/hwr6/scr.cir.ckt | |
parent | e4b74bcbaa07bfe96f808db4d9fe6e05c6cde87d (diff) | |
download | eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.gz eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.bz2 eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.zip |
Added :
1. Power Examples
2. eSim_Power.lib
3. Subcircuit for diac, scr, triac
4. Device model for Power Diode
Diffstat (limited to 'Examples/hwr6/scr.cir.ckt')
-rw-r--r-- | Examples/hwr6/scr.cir.ckt | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/Examples/hwr6/scr.cir.ckt b/Examples/hwr6/scr.cir.ckt new file mode 100644 index 00000000..b0e218fd --- /dev/null +++ b/Examples/hwr6/scr.cir.ckt @@ -0,0 +1,19 @@ +* eeschema netlist version 1.1 (spice format) creation date: 08/21/14 11:07:22
+.include diode.lib
+
+u2 5 8 1 port
+* f2
+* Analog Switch analogswitch
+d1 4 2 diode
+v2 3 4 dc 0
+c1 5 6 10u
+r2 5 6 1
+* f1
+v1 9 7 dc 0
+r1 8 9 50
+Vf2 2 5 0
+f2 5 6 Vf2 100
+Vf1 7 5 0
+f1 5 6 Vf1 10
+a1 6 (1 3) u1
+.model u1 aswitch(cntl_on=0.25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
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