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| author | Fahim | 2015-12-30 12:20:39 +0530 |
|---|---|---|
| committer | Fahim | 2015-12-30 12:20:39 +0530 |
| commit | 5c21ac87792c7eee763afcd6df80fc0bb8524b6c (patch) | |
| tree | 385a811388f218bc5ebd798a7b9bbbdfda537d1a /Examples/fullwaverec/fullwaverec.cir | |
| parent | e4b74bcbaa07bfe96f808db4d9fe6e05c6cde87d (diff) | |
| download | eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.gz eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.bz2 eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.zip | |
Added :
1. Power Examples
2. eSim_Power.lib
3. Subcircuit for diac, scr, triac
4. Device model for Power Diode
Diffstat (limited to 'Examples/fullwaverec/fullwaverec.cir')
| -rw-r--r-- | Examples/fullwaverec/fullwaverec.cir | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Examples/fullwaverec/fullwaverec.cir b/Examples/fullwaverec/fullwaverec.cir new file mode 100644 index 00000000..bd6dbde6 --- /dev/null +++ b/Examples/fullwaverec/fullwaverec.cir @@ -0,0 +1,18 @@ +* /home/fossee/Downloads/powercktexamples/fullwaverec/fullwaverec.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Dec 4 15:43:40 2015 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +x1 GND pulse out2 SCR +v1 in1 in2 sine +v2 pulse GND pulse +D1 in1 out1 D +D3 in2 out1 D +D2 GND in1 D +D4 GND in2 D +R1 out1 out2 100 + +.end |