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| author | Fahim | 2015-12-30 12:20:39 +0530 |
|---|---|---|
| committer | Fahim | 2015-12-30 12:20:39 +0530 |
| commit | 5c21ac87792c7eee763afcd6df80fc0bb8524b6c (patch) | |
| tree | 385a811388f218bc5ebd798a7b9bbbdfda537d1a /Examples/fullwaverec/fullwaverec.cir.out | |
| parent | e4b74bcbaa07bfe96f808db4d9fe6e05c6cde87d (diff) | |
| download | eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.gz eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.bz2 eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.zip | |
Added :
1. Power Examples
2. eSim_Power.lib
3. Subcircuit for diac, scr, triac
4. Device model for Power Diode
Diffstat (limited to 'Examples/fullwaverec/fullwaverec.cir.out')
| -rw-r--r-- | Examples/fullwaverec/fullwaverec.cir.out | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/Examples/fullwaverec/fullwaverec.cir.out b/Examples/fullwaverec/fullwaverec.cir.out new file mode 100644 index 00000000..d7200d7a --- /dev/null +++ b/Examples/fullwaverec/fullwaverec.cir.out @@ -0,0 +1,21 @@ +* /home/fossee/downloads/powercktexamples/fullwaverec/fullwaverec.cir + +.include scr.sub +.include PowerDiode.lib +x1 gnd pulse out2 scr +v1 in1 in2 sine(0 200 100 0 0) +v2 pulse gnd pulse(0 5 2m 0 0 1m 5m) +d1 in1 out1 PowerDiode +d3 in2 out1 PowerDiode +d2 gnd in1 PowerDiode +d4 gnd in2 PowerDiode +r1 out1 out2 100 +.tran 20e-06 20e-03 0e-03 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |