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author | Fahim | 2016-03-03 23:00:00 +0530 |
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committer | Fahim | 2016-03-03 23:00:00 +0530 |
commit | 7e4774656997c34eae3ab09b37c8f82b5b046d48 (patch) | |
tree | fe72483af0c1feba7f97d5b9290f647f50840fc1 /Examples/acvoltcnt1/diac.sub | |
parent | 823d892cbafccc47287ffebd01316754e7efad56 (diff) | |
download | eSim-7e4774656997c34eae3ab09b37c8f82b5b046d48.tar.gz eSim-7e4774656997c34eae3ab09b37c8f82b5b046d48.tar.bz2 eSim-7e4774656997c34eae3ab09b37c8f82b5b046d48.zip |
Remove unwanted example
Diffstat (limited to 'Examples/acvoltcnt1/diac.sub')
-rw-r--r-- | Examples/acvoltcnt1/diac.sub | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/Examples/acvoltcnt1/diac.sub b/Examples/acvoltcnt1/diac.sub deleted file mode 100644 index 7f28ecc2..00000000 --- a/Examples/acvoltcnt1/diac.sub +++ /dev/null @@ -1,15 +0,0 @@ -* Subcircuit diac -.subckt diac 1 2 -* /opt/esim/src/subcircuitlibrary/diac/diac.cir -* u1 1 1 2 aswitch -* u2 1 1 2 aswitch -a1 1 (1 2) u1 -a2 1 (1 2) u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) - -* Control Statements - -.ends diac |