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author | Fahim | 2015-12-30 12:20:39 +0530 |
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committer | Fahim | 2015-12-30 12:20:39 +0530 |
commit | 5c21ac87792c7eee763afcd6df80fc0bb8524b6c (patch) | |
tree | 385a811388f218bc5ebd798a7b9bbbdfda537d1a /Examples/acvoltcnt1/diac.cir.ckt | |
parent | e4b74bcbaa07bfe96f808db4d9fe6e05c6cde87d (diff) | |
download | eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.gz eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.bz2 eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.zip |
Added :
1. Power Examples
2. eSim_Power.lib
3. Subcircuit for diac, scr, triac
4. Device model for Power Diode
Diffstat (limited to 'Examples/acvoltcnt1/diac.cir.ckt')
-rw-r--r-- | Examples/acvoltcnt1/diac.cir.ckt | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Examples/acvoltcnt1/diac.cir.ckt b/Examples/acvoltcnt1/diac.cir.ckt new file mode 100644 index 00000000..e89f9cfb --- /dev/null +++ b/Examples/acvoltcnt1/diac.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: 09/22/14 16:36:23
+
+u3 1 2 port
+* Analog Switch analogswitch
+* Analog Switch analogswitch
+a1 1 (1 2) u2
+.model u2 aswitch(cntl_on=-25 cntl_off=-0.1 r_on=0.0125 r_off=1000000)
+a2 1 (1 2) u1
+.model u1 aswitch(cntl_on=25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
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