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| author | Fahim | 2015-12-30 12:20:39 +0530 |
|---|---|---|
| committer | Fahim | 2015-12-30 12:20:39 +0530 |
| commit | 5c21ac87792c7eee763afcd6df80fc0bb8524b6c (patch) | |
| tree | 385a811388f218bc5ebd798a7b9bbbdfda537d1a /Examples/acvoltcnt1/acvoltcnt1.cir.ckt | |
| parent | e4b74bcbaa07bfe96f808db4d9fe6e05c6cde87d (diff) | |
| download | eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.gz eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.tar.bz2 eSim-5c21ac87792c7eee763afcd6df80fc0bb8524b6c.zip | |
Added :
1. Power Examples
2. eSim_Power.lib
3. Subcircuit for diac, scr, triac
4. Device model for Power Diode
Diffstat (limited to 'Examples/acvoltcnt1/acvoltcnt1.cir.ckt')
| -rw-r--r-- | Examples/acvoltcnt1/acvoltcnt1.cir.ckt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Examples/acvoltcnt1/acvoltcnt1.cir.ckt b/Examples/acvoltcnt1/acvoltcnt1.cir.ckt new file mode 100644 index 00000000..5e609ba9 --- /dev/null +++ b/Examples/acvoltcnt1/acvoltcnt1.cir.ckt @@ -0,0 +1,20 @@ +* eeschema netlist version 1.1 (spice format) creation date: 09/23/14 12:53:04
+.include triac.sub
+.include diac.sub
+
+r3 1 2 250
+c2 2 0 0.1u
+* Plotting option vplot1
+* Plotting option vplot1
+x2 0 4 5 triac
+x1 2 5 diac
+c1 1 0 0.1u
+r2 1 3 10k
+v1 3 0 sine(0 100 50 0 0)
+r1 4 3 100
+
+.tran 10e-06 20e-03 0e-00
+.plot v(2)
+.plot v(3)
+.plot v(3)-v(4)
+.end
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