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authorsaurabhb172020-03-17 20:42:57 +0530
committerGitHub2020-03-17 20:42:57 +0530
commitc967b3b3b27dc4e76ee2bb7a1820a97c5306b8d2 (patch)
tree2c80091a39cceebca01eb5cf3de102de8cdae3df /Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub
parent2ea4bdb9b08b2a5da5a0b6ad0a5fe6a82510b9ec (diff)
parent0771d3b179c16dc4bd486f71a7d7576cbcc59bec (diff)
downloadeSim-c967b3b3b27dc4e76ee2bb7a1820a97c5306b8d2.tar.gz
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Merge pull request #137 from saurabhb17/master
fp-lib-table modifications
Diffstat (limited to 'Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub')
-rw-r--r--Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub12
1 files changed, 12 insertions, 0 deletions
diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub
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+* Subcircuit ua741
+.subckt ua741 6 7 3
+* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
+rout1 3 2 75
+eout1 2 0 1 0 1
+cbw1 1 0 31.85e-9
+rbw1 1 4 0.5e6
+ein1 4 0 7 6 100e3
+rin1 7 6 2e6
+* Control Statements
+
+.ends ua741 \ No newline at end of file