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authorsaurabhb172020-03-18 19:38:02 +0530
committersaurabhb172020-03-18 19:38:02 +0530
commitb260d6a447a63925c5fe12f477270b5e55049d7b (patch)
tree4974da92b6b1f7a7f22df178dcc7f5ab2fc4b23e /Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir
parent378188841e998a2f287c0d9f671aaef35b29c5b8 (diff)
downloadeSim-b260d6a447a63925c5fe12f477270b5e55049d7b.tar.gz
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.pro fixes in NGHDL examples
Diffstat (limited to 'Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir')
-rw-r--r--Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir15
1 files changed, 0 insertions, 15 deletions
diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir
deleted file mode 100644
index de797429..00000000
--- a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir
+++ /dev/null
@@ -1,15 +0,0 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-*Sheet Name:/
-U1 6 7 3 PORT
-Rout1 3 2 75
-Eout1 2 0 1 0 1
-Cbw1 1 0 31.85e-9
-Rbw1 1 4 0.5e6
-Ein1 4 0 7 6 100e3
-Rin1 7 6 2e6
-
-.end