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| author | saurabhb17 | 2020-03-17 20:26:43 +0530 |
|---|---|---|
| committer | saurabhb17 | 2020-03-17 20:26:43 +0530 |
| commit | 0771d3b179c16dc4bd486f71a7d7576cbcc59bec (patch) | |
| tree | 2c80091a39cceebca01eb5cf3de102de8cdae3df /Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir | |
| parent | 58b9db2a4eb8090c532d4bb465966b380a8eca8b (diff) | |
| download | eSim-0771d3b179c16dc4bd486f71a7d7576cbcc59bec.tar.gz eSim-0771d3b179c16dc4bd486f71a7d7576cbcc59bec.tar.bz2 eSim-0771d3b179c16dc4bd486f71a7d7576cbcc59bec.zip | |
error while loading footprints rectified
Diffstat (limited to 'Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir')
| -rw-r--r-- | Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir new file mode 100644 index 00000000..de797429 --- /dev/null +++ b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end |