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author | saurabhb17 | 2020-03-17 20:26:43 +0530 |
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committer | saurabhb17 | 2020-03-17 20:26:43 +0530 |
commit | 0771d3b179c16dc4bd486f71a7d7576cbcc59bec (patch) | |
tree | 2c80091a39cceebca01eb5cf3de102de8cdae3df /Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out | |
parent | 58b9db2a4eb8090c532d4bb465966b380a8eca8b (diff) | |
download | eSim-0771d3b179c16dc4bd486f71a7d7576cbcc59bec.tar.gz eSim-0771d3b179c16dc4bd486f71a7d7576cbcc59bec.tar.bz2 eSim-0771d3b179c16dc4bd486f71a7d7576cbcc59bec.zip |
error while loading footprints rectified
Diffstat (limited to 'Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out')
-rw-r--r-- | Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out new file mode 100644 index 00000000..72e68514 --- /dev/null +++ b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +* u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 +.ac lin 0 0Hz 0Hz + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |