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author | saurabhb17 | 2020-03-11 16:43:11 +0530 |
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committer | saurabhb17 | 2020-03-11 16:43:11 +0530 |
commit | 22d388df274b2a9f3f00207f64ce9f284d1efba4 (patch) | |
tree | c433424da61f0dcf60ee8b8a5116e3a02e0a8a17 /Examples/Integrator | |
parent | ec5a9a008b8b974f8191837c72f9edfcfc9e49bf (diff) | |
download | eSim-22d388df274b2a9f3f00207f64ce9f284d1efba4.tar.gz eSim-22d388df274b2a9f3f00207f64ce9f284d1efba4.tar.bz2 eSim-22d388df274b2a9f3f00207f64ce9f284d1efba4.zip |
part2/3 - .pro cleanup
Diffstat (limited to 'Examples/Integrator')
-rw-r--r-- | Examples/Integrator/Integrator-cache.lib | 105 | ||||
-rw-r--r-- | Examples/Integrator/Integrator.cir | 14 | ||||
-rw-r--r-- | Examples/Integrator/Integrator.cir.out | 14 | ||||
-rw-r--r-- | Examples/Integrator/Integrator.sch | 135 | ||||
-rw-r--r-- | Examples/Integrator/Integrator_Previous_Values.xml | 1 | ||||
-rw-r--r-- | Examples/Integrator/analysis | 2 |
6 files changed, 192 insertions, 79 deletions
diff --git a/Examples/Integrator/Integrator-cache.lib b/Examples/Integrator/Integrator-cache.lib new file mode 100644 index 00000000..259458aa --- /dev/null +++ b/Examples/Integrator/Integrator-cache.lib @@ -0,0 +1,105 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# UA741 +# +DEF UA741 X 0 40 Y Y 1 F N +F0 "X" 150 0 60 H V C CNN +F1 "UA741" 250 -150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 0 150 0 -150 350 0 0 150 N +X + 1 -200 100 200 R 50 50 1 1 I +X - 2 -200 -100 200 R 50 50 1 1 I +X ~ 3 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# plot_v1 +# +DEF plot_v1 U 0 40 Y Y 1 F N +F0 "U" 0 500 60 H V C CNN +F1 "plot_v1" 200 350 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 500 100 0 1 0 N +X ~ ~ 0 200 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# pwl +# +DEF pwl v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pwl" -250 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 +A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 +A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 +A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 +A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/Examples/Integrator/Integrator.cir b/Examples/Integrator/Integrator.cir index 50c30529..b7b0164b 100644 --- a/Examples/Integrator/Integrator.cir +++ b/Examples/Integrator/Integrator.cir @@ -1,19 +1,19 @@ -* /home/fossee/eSim-Workspace/Integrator/Integrator.cir +* /home/saurabh/Desktop/eSim/Examples/Integrator/Integrator.cir -* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Feb 29 20:31:04 2016 +* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Mar 11 16:27:08 2020 * To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N * To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 * Sheet Name: / X1 Net-_R2-Pad1_ Net-_C1-Pad2_ out UA741 -R1 in Net-_C1-Pad2_ 10k -R2 Net-_R2-Pad1_ GND 1k -R3 out GND 1k -C1 out Net-_C1-Pad2_ 100n -R4 Net-_C1-Pad2_ out 100k v1 in GND pwl U1 in plot_v1 U2 out plot_v1 +R1 in Net-_C1-Pad2_ 10k +R2 Net-_R2-Pad1_ GND 1k +R3 out Net-_C1-Pad2_ 100k +C1 out Net-_C1-Pad2_ 100n +R4 GND out 1k .end diff --git a/Examples/Integrator/Integrator.cir.out b/Examples/Integrator/Integrator.cir.out index 926b2749..9db03242 100644 --- a/Examples/Integrator/Integrator.cir.out +++ b/Examples/Integrator/Integrator.cir.out @@ -1,16 +1,16 @@ -* /home/fossee/esim-workspace/integrator/integrator.cir +* /home/saurabh/desktop/esim/examples/integrator/integrator.cir .include ua741.sub x1 net-_r2-pad1_ net-_c1-pad2_ out ua741 -r1 in net-_c1-pad2_ 10k -r2 net-_r2-pad1_ gnd 1k -r3 out gnd 1k -c1 out net-_c1-pad2_ 100n -r4 net-_c1-pad2_ out 100k v1 in gnd pwl(0m 0 0.5m 5 25m 5 25.5m -5 50m -5 50.5m 5 75m 5 75.5m -5 100m -5) * u1 in plot_v1 * u2 out plot_v1 -.tran 10e-03 100e-03 0e-00 +r1 in net-_c1-pad2_ 10k +r2 net-_r2-pad1_ gnd 1k +r3 out net-_c1-pad2_ 100k +c1 out net-_c1-pad2_ 100n +r4 gnd out 1k +.tran 1e-03 100e-03 0e-00 * Control Statements .control diff --git a/Examples/Integrator/Integrator.sch b/Examples/Integrator/Integrator.sch index 843d52f8..d73bd6be 100644 --- a/Examples/Integrator/Integrator.sch +++ b/Examples/Integrator/Integrator.sch @@ -1,5 +1,4 @@ EESchema Schematic File Version 2 -LIBS:Integrator-rescue LIBS:eSim_Analog LIBS:eSim_Devices LIBS:eSim_Digital @@ -31,10 +30,8 @@ LIBS:opto LIBS:atmel LIBS:contrib LIBS:power -LIBS:device LIBS:transistors LIBS:conn -LIBS:linear LIBS:regul LIBS:74xx LIBS:cmos4000 @@ -63,39 +60,6 @@ F 3 "" H 5950 3200 60 0000 C CNN 1 5950 3200 1 0 0 1 $EndComp -$Comp -L R-RESCUE-Integrator R1 -U 1 1 56A9B635 -P 5100 3150 -F 0 "R1" H 5150 3280 50 0000 C CNN -F 1 "10k" H 5150 3200 50 0000 C CNN -F 2 "" H 5150 3130 30 0000 C CNN -F 3 "" V 5150 3200 30 0000 C CNN - 1 5100 3150 - 1 0 0 -1 -$EndComp -$Comp -L R-RESCUE-Integrator R2 -U 1 1 56A9B674 -P 5400 3400 -F 0 "R2" H 5450 3530 50 0000 C CNN -F 1 "1k" H 5450 3450 50 0000 C CNN -F 2 "" H 5450 3380 30 0000 C CNN -F 3 "" V 5450 3450 30 0000 C CNN - 1 5400 3400 - 0 1 1 0 -$EndComp -$Comp -L R-RESCUE-Integrator R3 -U 1 1 56A9B6AE -P 6850 3300 -F 0 "R3" H 6900 3430 50 0000 C CNN -F 1 "1k" H 6900 3350 50 0000 C CNN -F 2 "" H 6900 3280 30 0000 C CNN -F 3 "" V 6900 3350 30 0000 C CNN - 1 6850 3300 - 0 1 1 0 -$EndComp Wire Wire Line 5300 3100 5750 3100 Wire Wire Line @@ -103,21 +67,10 @@ Wire Wire Line Wire Wire Line 6500 3200 6900 3200 $Comp -L C C1 -U 1 1 56A9B72C -P 6100 2700 -F 0 "C1" H 6125 2800 50 0000 L CNN -F 1 "100n" H 6125 2600 50 0000 L CNN -F 2 "" H 6138 2550 30 0000 C CNN -F 3 "" H 6100 2700 60 0000 C CNN - 1 6100 2700 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 +L GND #PWR2 U 1 1 56A9B75D P 5450 3600 -F 0 "#PWR01" H 5450 3350 50 0001 C CNN +F 0 "#PWR2" H 5450 3350 50 0001 C CNN F 1 "GND" H 5450 3450 50 0000 C CNN F 2 "" H 5450 3600 50 0000 C CNN F 3 "" H 5450 3600 50 0000 C CNN @@ -125,10 +78,10 @@ F 3 "" H 5450 3600 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GND #PWR02 +L GND #PWR1 U 1 1 56A9B7DC P 4800 4000 -F 0 "#PWR02" H 4800 3750 50 0001 C CNN +F 0 "#PWR1" H 4800 3750 50 0001 C CNN F 1 "GND" H 4800 3850 50 0000 C CNN F 2 "" H 4800 4000 50 0000 C CNN F 3 "" H 4800 4000 50 0000 C CNN @@ -136,10 +89,10 @@ F 3 "" H 4800 4000 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GND #PWR03 +L GND #PWR3 U 1 1 56A9B7F9 P 6900 3500 -F 0 "#PWR03" H 6900 3250 50 0001 C CNN +F 0 "#PWR3" H 6900 3250 50 0001 C CNN F 1 "GND" H 6900 3350 50 0000 C CNN F 2 "" H 6900 3500 50 0000 C CNN F 3 "" H 6900 3500 50 0000 C CNN @@ -172,17 +125,6 @@ Wire Wire Line 5600 2350 5600 3100 Wire Wire Line 6650 2350 6650 3200 -$Comp -L R-RESCUE-Integrator R4 -U 1 1 56B2EBCB -P 6050 2400 -F 0 "R4" H 6100 2530 50 0000 C CNN -F 1 "100k" H 6100 2450 50 0000 C CNN -F 2 "" H 6100 2380 30 0000 C CNN -F 3 "" V 6100 2450 30 0000 C CNN - 1 6050 2400 - 1 0 0 -1 -$EndComp Wire Wire Line 5950 2350 5600 2350 Connection ~ 5600 2700 @@ -224,4 +166,69 @@ F 3 "" H 6800 3200 60 0000 C CNN $EndComp Connection ~ 4850 2950 Connection ~ 6800 3050 +Text Notes 5050 2900 0 60 ~ 0 +10k +Text Notes 5250 3700 0 60 ~ 0 +1k\n +Text Notes 6300 2600 0 60 ~ 0 +100n +Text Notes 5950 2150 0 60 ~ 0 +100k\n +Text Notes 7100 3350 0 60 ~ 0 +1k +$Comp +L resistor R1 +U 1 1 5E68C500 +P 5100 3150 +F 0 "R1" H 5150 3280 50 0000 C CNN +F 1 "10k" H 5150 3100 50 0000 C CNN +F 2 "" H 5150 3130 30 0000 C CNN +F 3 "" V 5150 3200 30 0000 C CNN + 1 5100 3150 + 1 0 0 -1 +$EndComp +$Comp +L resistor R2 +U 1 1 5E68C560 +P 5400 3400 +F 0 "R2" H 5450 3530 50 0000 C CNN +F 1 "1k" H 5450 3350 50 0000 C CNN +F 2 "" H 5450 3380 30 0000 C CNN +F 3 "" V 5450 3450 30 0000 C CNN + 1 5400 3400 + 0 1 1 0 +$EndComp +$Comp +L resistor R3 +U 1 1 5E68C5B3 +P 6150 2300 +F 0 "R3" H 6200 2430 50 0000 C CNN +F 1 "100k" H 6200 2250 50 0000 C CNN +F 2 "" H 6200 2280 30 0000 C CNN +F 3 "" V 6200 2350 30 0000 C CNN + 1 6150 2300 + -1 0 0 1 +$EndComp +$Comp +L capacitor C1 +U 1 1 5E68C612 +P 6100 2700 +F 0 "C1" H 6125 2800 50 0000 L CNN +F 1 "100n" H 6125 2600 50 0000 L CNN +F 2 "" H 6138 2550 30 0000 C CNN +F 3 "" H 6100 2700 60 0000 C CNN + 1 6100 2700 + 0 1 1 0 +$EndComp +$Comp +L resistor R4 +U 1 1 5E68C664 +P 6950 3400 +F 0 "R4" H 7000 3530 50 0000 C CNN +F 1 "1k" H 7000 3350 50 0000 C CNN +F 2 "" H 7000 3380 30 0000 C CNN +F 3 "" V 7000 3450 30 0000 C CNN + 1 6950 3400 + 0 -1 -1 0 +$EndComp $EndSCHEMATC diff --git a/Examples/Integrator/Integrator_Previous_Values.xml b/Examples/Integrator/Integrator_Previous_Values.xml new file mode 100644 index 00000000..2079752b --- /dev/null +++ b/Examples/Integrator/Integrator_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><v1 name="Source type">pwl<field1 name="Enter in pwl format">0m 0 0.5m 5 25m 5 25.5m -5 50m -5 50.5m 5 75m 5 75.5m -5 100m -5</field1></v1></source><model /><devicemodel /><subcircuit><x1><field>/home/saurabh/Desktop/eSim-2.0/library/SubcircuitLibrary/ua741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">1</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/Integrator/analysis b/Examples/Integrator/analysis index d5e13546..f496aec4 100644 --- a/Examples/Integrator/analysis +++ b/Examples/Integrator/analysis @@ -1 +1 @@ -.tran 10e-03 100e-03 0e-00
\ No newline at end of file +.tran 1e-03 100e-03 0e-00
\ No newline at end of file |