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author | saurabhb17 | 2020-03-11 16:43:11 +0530 |
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committer | saurabhb17 | 2020-03-11 16:43:11 +0530 |
commit | 22d388df274b2a9f3f00207f64ce9f284d1efba4 (patch) | |
tree | c433424da61f0dcf60ee8b8a5116e3a02e0a8a17 /Examples/Integrator/Integrator-cache.lib | |
parent | ec5a9a008b8b974f8191837c72f9edfcfc9e49bf (diff) | |
download | eSim-22d388df274b2a9f3f00207f64ce9f284d1efba4.tar.gz eSim-22d388df274b2a9f3f00207f64ce9f284d1efba4.tar.bz2 eSim-22d388df274b2a9f3f00207f64ce9f284d1efba4.zip |
part2/3 - .pro cleanup
Diffstat (limited to 'Examples/Integrator/Integrator-cache.lib')
-rw-r--r-- | Examples/Integrator/Integrator-cache.lib | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/Examples/Integrator/Integrator-cache.lib b/Examples/Integrator/Integrator-cache.lib new file mode 100644 index 00000000..259458aa --- /dev/null +++ b/Examples/Integrator/Integrator-cache.lib @@ -0,0 +1,105 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# UA741 +# +DEF UA741 X 0 40 Y Y 1 F N +F0 "X" 150 0 60 H V C CNN +F1 "UA741" 250 -150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 0 150 0 -150 350 0 0 150 N +X + 1 -200 100 200 R 50 50 1 1 I +X - 2 -200 -100 200 R 50 50 1 1 I +X ~ 3 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# plot_v1 +# +DEF plot_v1 U 0 40 Y Y 1 F N +F0 "U" 0 500 60 H V C CNN +F1 "plot_v1" 200 350 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 500 100 0 1 0 N +X ~ ~ 0 200 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# pwl +# +DEF pwl v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pwl" -250 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 +A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 +A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 +A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 +A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +#End Library |