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| author | fahim | 2015-08-05 13:52:57 +0530 |
|---|---|---|
| committer | fahim | 2015-08-05 13:52:57 +0530 |
| commit | df569f79a7ee495291324e07d99af990104e3db2 (patch) | |
| tree | a005c682aa78b58b7dd5bb693c415eff9c04d04b /Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir.out | |
| parent | c4971ed867af4a970a3cd1c23825adee5073372e (diff) | |
| download | eSim-df569f79a7ee495291324e07d99af990104e3db2.tar.gz eSim-df569f79a7ee495291324e07d99af990104e3db2.tar.bz2 eSim-df569f79a7ee495291324e07d99af990104e3db2.zip | |
Subject: Added eSim Examples
Description: Added eSim Examples
Diffstat (limited to 'Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir.out')
| -rw-r--r-- | Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir.out | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir.out b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir.out new file mode 100644 index 00000000..5207e889 --- /dev/null +++ b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir.out @@ -0,0 +1,15 @@ +* eeschema netlist version 1.1 (spice format) creation date: wed jul 1 11:15:52 2015 + +.include D.lib +d1 in out D1N750 +r1 out gnd 1k +v1 in gnd sine(0 2 50 0 0) +.tran 10e-03 100e-03 0e-03 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |