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| author | Fahim | 2015-08-19 15:49:33 +0530 |
|---|---|---|
| committer | Fahim | 2015-08-19 15:49:33 +0530 |
| commit | 5e81c99de1606d01c5d07fbe35005ad5a4298c7f (patch) | |
| tree | f380242a8f6f4133a2eca5fc5efbf4a49be811ed /Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak | |
| parent | 0a10771024b1b82b69b23aa770a664b8653f985e (diff) | |
| download | eSim-5e81c99de1606d01c5d07fbe35005ad5a4298c7f.tar.gz eSim-5e81c99de1606d01c5d07fbe35005ad5a4298c7f.tar.bz2 eSim-5e81c99de1606d01c5d07fbe35005ad5a4298c7f.zip | |
Modified Example
Diffstat (limited to 'Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak')
| -rw-r--r-- | Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak | 103 |
1 files changed, 95 insertions, 8 deletions
diff --git a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak index 6008a5e9..da840534 100644 --- a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak +++ b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak @@ -1,4 +1,12 @@ EESchema Schematic File Version 2 +LIBS:eSim_Subckt +LIBS:eSim_Sources +LIBS:eSim_Hybrid +LIBS:eSim_Digital +LIBS:eSim_Devices +LIBS:eSim_Analog +LIBS:eSim_Miscellaneous +LIBS:eSim_User LIBS:power LIBS:device LIBS:transistors @@ -28,14 +36,7 @@ LIBS:opto LIBS:atmel LIBS:contrib LIBS:valves -LIBS:eSim_Subckt -LIBS:eSim_Sources -LIBS:eSim_Hybrid -LIBS:eSim_Digital -LIBS:eSim_Devices -LIBS:eSim_Analog -LIBS:eSim_Miscellaneous -LIBS:eSim_User +LIBS:Halfwave_Rectifier-cache EELAYER 25 0 EELAYER END $Descr A4 11693 8268 @@ -50,4 +51,90 @@ Comment2 "" Comment3 "" Comment4 "" $EndDescr +$Comp +L D D1 +U 1 1 5593CBB8 +P 5700 2900 +F 0 "D1" H 5700 3000 50 0000 C CNN +F 1 "D" H 5700 2800 50 0000 C CNN +F 2 "" H 5700 2900 60 0000 C CNN +F 3 "" H 5700 2900 60 0000 C CNN + 1 5700 2900 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 5593CC2C +P 6300 3350 +F 0 "R1" V 6380 3350 50 0000 C CNN +F 1 "1k" V 6300 3350 50 0000 C CNN +F 2 "" V 6230 3350 30 0000 C CNN +F 3 "" H 6300 3350 30 0000 C CNN + 1 6300 3350 + 1 0 0 -1 +$EndComp +$Comp +L sine v1 +U 1 1 5593CC81 +P 5050 3400 +F 0 "v1" H 4850 3500 60 0000 C CNN +F 1 "sine" H 4850 3350 60 0000 C CNN +F 2 "R1" H 4750 3400 60 0000 C CNN +F 3 "" H 5050 3400 60 0000 C CNN + 1 5050 3400 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 5593CCF2 +P 5700 4050 +F 0 "#PWR01" H 5700 3800 50 0001 C CNN +F 1 "GND" H 5700 3900 50 0000 C CNN +F 2 "" H 5700 4050 60 0000 C CNN +F 3 "" H 5700 4050 60 0000 C CNN + 1 5700 4050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5050 2950 5050 2900 +Wire Wire Line + 5050 2900 5550 2900 +Wire Wire Line + 5850 2900 6300 2900 +Wire Wire Line + 6300 2900 6300 3200 +Wire Wire Line + 6300 3500 6300 3900 +Wire Wire Line + 6300 3900 5050 3900 +Wire Wire Line + 5050 3900 5050 3850 +Wire Wire Line + 5700 3800 5700 4050 +Connection ~ 5700 3900 +$Comp +L PWR_FLAG #FLG02 +U 1 1 5593CD49 +P 5700 3800 +F 0 "#FLG02" H 5700 3895 50 0001 C CNN +F 1 "PWR_FLAG" H 5700 3980 50 0000 C CNN +F 2 "" H 5700 3800 60 0000 C CNN +F 3 "" H 5700 3800 60 0000 C CNN + 1 5700 3800 + 1 0 0 -1 +$EndComp +Text GLabel 5200 2750 0 60 Input ~ 0 +IN +Text GLabel 6200 2800 2 60 Input ~ 0 +OUT +Wire Wire Line + 5200 2750 5250 2750 +Wire Wire Line + 5250 2750 5250 2900 +Connection ~ 5250 2900 +Wire Wire Line + 6200 2800 6100 2800 +Wire Wire Line + 6100 2800 6100 2900 +Connection ~ 6100 2900 $EndSCHEMATC |