summaryrefslogtreecommitdiff
path: root/Examples/HalfwaveRectifier_SCR/PowerDiode.lib
diff options
context:
space:
mode:
authorrahulp132020-02-14 15:16:35 +0530
committerrahulp132020-02-14 15:16:35 +0530
commitcb55e59de7ee4383c04edfae7c39ad9ae9552b36 (patch)
treede1b292a10e8196689bf1a208fe6fe32f4618846 /Examples/HalfwaveRectifier_SCR/PowerDiode.lib
parent08d4a0336550a0e610709970a0c5d366e109fe82 (diff)
downloadeSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.gz
eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.bz2
eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.zip
common code for Win and Linux, merged py2 changes
Diffstat (limited to 'Examples/HalfwaveRectifier_SCR/PowerDiode.lib')
-rw-r--r--Examples/HalfwaveRectifier_SCR/PowerDiode.lib21
1 files changed, 20 insertions, 1 deletions
diff --git a/Examples/HalfwaveRectifier_SCR/PowerDiode.lib b/Examples/HalfwaveRectifier_SCR/PowerDiode.lib
index d6fb6469..a2f61dce 100644
--- a/Examples/HalfwaveRectifier_SCR/PowerDiode.lib
+++ b/Examples/HalfwaveRectifier_SCR/PowerDiode.lib
@@ -1 +1,20 @@
-.MODEL PowerDiode D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u bv=1800 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m Is=2.2E-15 Xti=3 Ibvl=1.9556m )
+.MODEL PowerDiode D(
++ Vj=.75
++ Nbvl=14.976
++ Cjo=175p
++ Rs=.25
++ Isr=1.859n
++ Eg=1.11
++ M=.5516
++ Nbv=1.6989
++ N=1
++ Tbv1=-21.277u
++ bv=1800
++ Fc=.5
++ Ikf=0
++ Nr=2
++ Ibv=20.245m
++ Is=2.2E-15
++ Xti=3
++ Ibvl=1.9556m
+) \ No newline at end of file