diff options
| author | rahulp13 | 2020-02-14 15:16:35 +0530 |
|---|---|---|
| committer | rahulp13 | 2020-02-14 15:16:35 +0530 |
| commit | cb55e59de7ee4383c04edfae7c39ad9ae9552b36 (patch) | |
| tree | de1b292a10e8196689bf1a208fe6fe32f4618846 /Examples/Half_Adder/Half_Adder.cir | |
| parent | 08d4a0336550a0e610709970a0c5d366e109fe82 (diff) | |
| download | eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.gz eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.bz2 eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.zip | |
common code for Win and Linux, merged py2 changes
Diffstat (limited to 'Examples/Half_Adder/Half_Adder.cir')
| -rw-r--r-- | Examples/Half_Adder/Half_Adder.cir | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/Examples/Half_Adder/Half_Adder.cir b/Examples/Half_Adder/Half_Adder.cir new file mode 100644 index 00000000..4658c5cb --- /dev/null +++ b/Examples/Half_Adder/Half_Adder.cir @@ -0,0 +1,21 @@ +* /home/fossee/UpdatedExamples/Half_Adder/Half_Adder.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar 3 21:35:33 2016 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U2-Pad1_ Net-_U2-Pad2_ half_adder +U1 IN1 IN2 Net-_U1-Pad3_ Net-_U1-Pad4_ adc_bridge_2 +U2 Net-_U2-Pad1_ Net-_U2-Pad2_ sum cout dac_bridge_2 +v1 IN1 GND DC +v2 IN2 GND DC +R1 sum GND 1k +R2 cout GND 1k +U3 IN1 plot_v1 +U4 IN2 plot_v1 +U5 sum plot_v1 +U6 cout plot_v1 + +.end |