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| author | Sunil Shetye | 2019-07-01 18:12:34 +0530 |
|---|---|---|
| committer | GitHub | 2019-07-01 18:12:34 +0530 |
| commit | 29dc2de214a60216e62d80dfa3e5cbd998c2d6ee (patch) | |
| tree | 6d3b2a1ba2c92ba6bfb898f534576a2331cf9f9d /Examples/HalfAdder/half_adder.cir | |
| parent | 6b410587b3101af7c6378c8e816e7d357beb1929 (diff) | |
| parent | aec27ddec95f30c155ad356da24eb7e3ce2247cd (diff) | |
| download | eSim-29dc2de214a60216e62d80dfa3e5cbd998c2d6ee.tar.gz eSim-29dc2de214a60216e62d80dfa3e5cbd998c2d6ee.tar.bz2 eSim-29dc2de214a60216e62d80dfa3e5cbd998c2d6ee.zip | |
Merge pull request #114 from sunilshetye/masterfixes
Master fixes
Diffstat (limited to 'Examples/HalfAdder/half_adder.cir')
| -rw-r--r-- | Examples/HalfAdder/half_adder.cir | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/Examples/HalfAdder/half_adder.cir b/Examples/HalfAdder/half_adder.cir new file mode 100644 index 00000000..8b2e7e06 --- /dev/null +++ b/Examples/HalfAdder/half_adder.cir @@ -0,0 +1,11 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Jun 24 11:31:48 2015 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U2 1 4 3 d_xor +U3 1 4 2 d_and +U1 1 4 3 2 PORT + +.end |