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author | Sunil Shetye | 2019-03-12 12:30:33 +0530 |
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committer | Sunil Shetye | 2019-07-01 18:04:00 +0530 |
commit | 7b559bc99379a475866479137f3ee2ed4dfbab86 (patch) | |
tree | b397dbdf6d63632ee48741010e9019b0dc77669c /Examples/Fullwavebridgerectifier/D.lib | |
parent | d2b775bde7bde4396c251ddac6685d503d0577d8 (diff) | |
download | eSim-7b559bc99379a475866479137f3ee2ed4dfbab86.tar.gz eSim-7b559bc99379a475866479137f3ee2ed4dfbab86.tar.bz2 eSim-7b559bc99379a475866479137f3ee2ed4dfbab86.zip |
remove extra + at the start
Diffstat (limited to 'Examples/Fullwavebridgerectifier/D.lib')
-rw-r--r-- | Examples/Fullwavebridgerectifier/D.lib | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/Examples/Fullwavebridgerectifier/D.lib b/Examples/Fullwavebridgerectifier/D.lib index 8a7fb4da..974dd402 100644 --- a/Examples/Fullwavebridgerectifier/D.lib +++ b/Examples/Fullwavebridgerectifier/D.lib @@ -1,2 +1 @@ -.model 1n4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) - +.model 1n4148 D( is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04 ) |