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| author | Rahul P | 2020-03-04 17:01:11 +0530 |
|---|---|---|
| committer | GitHub | 2020-03-04 17:01:11 +0530 |
| commit | 8ffe81b36caa259151978de0434e4e0c5c32d217 (patch) | |
| tree | 32202454d13dfabbf6556e98987f2a9632619ea9 /Examples/CMOS_Inverter/CMOS_Inverter.cir | |
| parent | e40317e709c220176fc5b7edf23d4434504335b0 (diff) | |
| parent | 13f3bcfda9416624cebbf5705de398e8efcad344 (diff) | |
| download | eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.gz eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.bz2 eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.zip | |
Merge pull request #132 from rahulp13/master
major changes
Diffstat (limited to 'Examples/CMOS_Inverter/CMOS_Inverter.cir')
| -rw-r--r-- | Examples/CMOS_Inverter/CMOS_Inverter.cir | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.cir b/Examples/CMOS_Inverter/CMOS_Inverter.cir deleted file mode 100644 index 8623d798..00000000 --- a/Examples/CMOS_Inverter/CMOS_Inverter.cir +++ /dev/null @@ -1,17 +0,0 @@ -* /home/fossee/UpdatedExamples/CMOS_Inverter/CMOS_Inverter.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar 3 20:45:21 2016 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -v2 vcc GND 5 -M1 out in GND GND MOS_N -M2 out in vcc vcc MOS_P -U1 in plot_v1 -U2 out plot_v1 -C1 out GND 1u -v1 in GND pwl - -.end |