summaryrefslogtreecommitdiff
path: root/Examples/CMOS_Inverter/CMOS_Inverter.cir
diff options
context:
space:
mode:
authorFahim2015-08-19 15:49:33 +0530
committerFahim2015-08-19 15:49:33 +0530
commit5e81c99de1606d01c5d07fbe35005ad5a4298c7f (patch)
treef380242a8f6f4133a2eca5fc5efbf4a49be811ed /Examples/CMOS_Inverter/CMOS_Inverter.cir
parent0a10771024b1b82b69b23aa770a664b8653f985e (diff)
downloadeSim-5e81c99de1606d01c5d07fbe35005ad5a4298c7f.tar.gz
eSim-5e81c99de1606d01c5d07fbe35005ad5a4298c7f.tar.bz2
eSim-5e81c99de1606d01c5d07fbe35005ad5a4298c7f.zip
Modified Example
Diffstat (limited to 'Examples/CMOS_Inverter/CMOS_Inverter.cir')
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter.cir16
1 files changed, 9 insertions, 7 deletions
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.cir b/Examples/CMOS_Inverter/CMOS_Inverter.cir
index b435cd1c..3774c1ef 100644
--- a/Examples/CMOS_Inverter/CMOS_Inverter.cir
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.cir
@@ -1,13 +1,15 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Jun 12 12:25:06 2015
+* /home/fossee/Downloads/eSim-master/Examples/CMOS_Inverter/CMOS_Inverter.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Aug 19 14:20:52 2015
* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-*Sheet Name:/
-C1 3 4 1u
-v1 1 4 dc
-v2 2 4 5
-M1 3 1 4 4 MOS_N
-M2 3 1 2 2 MOS_P
+* Sheet Name: /
+C1 out 0 1u
+v1 in 0 dc
+v2 vcc 0 5
+M1 out in 0 0 MOS_N
+M2 out in vcc vcc MOS_P
.end