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| author | Rahul P | 2020-03-04 17:01:11 +0530 |
|---|---|---|
| committer | GitHub | 2020-03-04 17:01:11 +0530 |
| commit | 8ffe81b36caa259151978de0434e4e0c5c32d217 (patch) | |
| tree | 32202454d13dfabbf6556e98987f2a9632619ea9 /Examples/BJT_Biascircuit/BJT_Biascircuit.cir | |
| parent | e40317e709c220176fc5b7edf23d4434504335b0 (diff) | |
| parent | 13f3bcfda9416624cebbf5705de398e8efcad344 (diff) | |
| download | eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.gz eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.tar.bz2 eSim-8ffe81b36caa259151978de0434e4e0c5c32d217.zip | |
Merge pull request #132 from rahulp13/master
major changes
Diffstat (limited to 'Examples/BJT_Biascircuit/BJT_Biascircuit.cir')
| -rw-r--r-- | Examples/BJT_Biascircuit/BJT_Biascircuit.cir | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/Examples/BJT_Biascircuit/BJT_Biascircuit.cir b/Examples/BJT_Biascircuit/BJT_Biascircuit.cir index 1d19ccd8..3fc9f2f5 100644 --- a/Examples/BJT_Biascircuit/BJT_Biascircuit.cir +++ b/Examples/BJT_Biascircuit/BJT_Biascircuit.cir @@ -1,16 +1,16 @@ -* /home/fossee/eSim-Workspace/BJT_Biascircuit/BJT_Biascircuit.cir +* /home/saurabh/Installer_Main_Workshop/eSim-1.1.2/Examples/BJT_Biascircuit/BJT_Biascircuit.cir -* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Feb 29 18:30:20 2016 +* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Aug 21 12:28:54 2019 * To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N * To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 * Sheet Name: / -Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ GND NPN v1 vce GND DC R1 Net-_R1-Pad1_ Net-_Q1-Pad1_ 1k R2 Net-_Q1-Pad2_ ib 1k U1 vce Net-_R1-Pad1_ plot_i2 I1 ib GND dc +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ GND eSim_NPN .end |