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author | Saurabh Bansode | 2020-04-05 13:23:40 +0530 |
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committer | GitHub | 2020-04-05 13:23:40 +0530 |
commit | 71d2ee1a0984569bd4069c953422144c3ce8f29b (patch) | |
tree | 531ccbf994f72c9c52a1bd63f2700a99464a5c80 /Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04.cir.out | |
parent | 44f799514b0820d5a3e88db8c149ea3ae1c5db10 (diff) | |
parent | 44ca57b4d6ea99aac3bfe0310fd958dd9919e4e2 (diff) | |
download | eSim-71d2ee1a0984569bd4069c953422144c3ce8f29b.tar.gz eSim-71d2ee1a0984569bd4069c953422144c3ce8f29b.tar.bz2 eSim-71d2ee1a0984569bd4069c953422144c3ce8f29b.zip |
Merge pull request #148 from saurabhb17/master
Schottky Diode spice model and 7404 Subcircuit addition
Diffstat (limited to 'Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04.cir.out')
-rw-r--r-- | Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04.cir.out | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04.cir.out b/Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04.cir.out new file mode 100644 index 00000000..c222c723 --- /dev/null +++ b/Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04.cir.out @@ -0,0 +1,25 @@ +* /home/ash98/downloads/esim-1.1.3/src/subcircuitlibrary/74ls04/74ls04.cir + +.include Ideal_npn1.lib +q5 net-_q5-pad1_ net-_q5-pad2_ net-_q1-pad3_ Ideal_npn2 +r5 net-_r1-pad1_ net-_q5-pad1_ 100 +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Ideal_npn2 +r1 net-_r1-pad1_ net-_q1-pad1_ 100 +q3 net-_q3-pad1_ net-_q3-pad2_ net-_q1-pad3_ Ideal_npn2 +r3 net-_r1-pad1_ net-_q3-pad1_ 100 +q6 net-_q6-pad1_ net-_q6-pad2_ net-_q1-pad3_ Ideal_npn2 +r6 net-_r1-pad1_ net-_q6-pad1_ 100 +q2 net-_q2-pad1_ net-_q2-pad2_ net-_q1-pad3_ Ideal_npn2 +r2 net-_r1-pad1_ net-_q2-pad1_ 100 +q4 net-_q4-pad1_ net-_q4-pad2_ net-_q1-pad3_ Ideal_npn2 +r4 net-_r1-pad1_ net-_q4-pad1_ 100 +* u1 net-_q1-pad2_ net-_q1-pad1_ net-_q3-pad2_ net-_q3-pad1_ net-_q5-pad2_ net-_q5-pad1_ net-_q1-pad3_ net-_q2-pad1_ net-_q2-pad2_ net-_q4-pad1_ net-_q4-pad2_ net-_q6-pad1_ net-_q6-pad2_ net-_r1-pad1_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |