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| author | saurabhb17 | 2020-04-05 11:14:24 +0530 |
|---|---|---|
| committer | saurabhb17 | 2020-04-05 11:14:24 +0530 |
| commit | 44ca57b4d6ea99aac3bfe0310fd958dd9919e4e2 (patch) | |
| tree | 531ccbf994f72c9c52a1bd63f2700a99464a5c80 /Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04-test.cir | |
| parent | dd228b2e15650a9887780618ed7ecedcce5d174a (diff) | |
| download | eSim-44ca57b4d6ea99aac3bfe0310fd958dd9919e4e2.tar.gz eSim-44ca57b4d6ea99aac3bfe0310fd958dd9919e4e2.tar.bz2 eSim-44ca57b4d6ea99aac3bfe0310fd958dd9919e4e2.zip | |
7404 subcircuit added
Diffstat (limited to 'Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04-test.cir')
| -rw-r--r-- | Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04-test.cir | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04-test.cir b/Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04-test.cir new file mode 100644 index 00000000..60d54ea3 --- /dev/null +++ b/Examples/Analysis_Of_Digital_IC/74LS04-test/74LS04-test.cir @@ -0,0 +1,17 @@ +* /home/ash98/eSim-Workspace/74LS04-test/74LS04-test.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Jan 14 13:18:34 2020 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +v2 Net-_X1-Pad14_ GND DC +v1 in1 GND pulse +R2 in1 Net-_R2-Pad2_ 1k +U2 out1 plot_v1 +U1 in1 plot_v1 +R1 out1 GND 2k +X1 Net-_R2-Pad2_ out1 ? ? ? ? GND ? ? ? ? ? ? Net-_X1-Pad14_ eSim_74LS04 + +.end |