Remove unwanted example

10 files changed, 332 insertions, 199 deletions

diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff-cache.lib b/Examples/4_bit_JK_ff/4_bit_JK_ff-cache.lib
index 8ba129ec..832c2859 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff-cache.lib
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff-cache.lib
@@ -140,11 +140,11 @@ X OUT4 8 550 -100 200 L 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
-# dc
+# dc-RESCUE-4_bit_JK_ff
 #
-DEF dc v 0 40 Y Y 1 F N
+DEF dc-RESCUE-4_bit_JK_ff v 0 40 Y Y 1 F N
 F0 "v" -200 100 60 H V C CNN
-F1 "dc" -200 -50 60 H V C CNN
+F1 "dc-RESCUE-4_bit_JK_ff" -200 -50 60 H V C CNN
 F2 "R1" -300 0 60 H V C CNN
 F3 "" 0 0 60 H V C CNN
 $FPLIST
@@ -157,6 +157,19 @@ X - 2 0 -450 300 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# plot_v1
+#
+DEF plot_v1 U 0 40 Y Y 1 F N
+F0 "U" 0 500 60 H V C CNN
+F1 "plot_v1" 200 350 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 500 100 0 1 0 N
+X ~ ~ 0 200 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # pulse
 #
 DEF pulse v 0 40 Y Y 1 F N
diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff-rescue.lib b/Examples/4_bit_JK_ff/4_bit_JK_ff-rescue.lib
index dd0cd114..f55e7562 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff-rescue.lib
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff-rescue.lib
@@ -1,16 +1,20 @@
 EESchema-LIBRARY Version 2.3
 #encoding utf-8
 #
-# GND-RESCUE-4_bit_JK_ff
+# dc-RESCUE-4_bit_JK_ff
 #
-DEF ~GND-RESCUE-4_bit_JK_ff #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND-RESCUE-4_bit_JK_ff" 0 -70 30 H I C CNN
-F2 "" 0 0 60 H V C CNN
+DEF dc-RESCUE-4_bit_JK_ff v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "dc-RESCUE-4_bit_JK_ff" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
 F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
 DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 P
+X - 2 0 -450 300 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff.bak b/Examples/4_bit_JK_ff/4_bit_JK_ff.bak
index 77bb0be2..36be9ab8 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff.bak
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff.bak
@@ -1,13 +1,15 @@
 EESchema Schematic File Version 2
+LIBS:4_bit_JK_ff-rescue
 LIBS:eSim_Analog
 LIBS:eSim_Devices
 LIBS:eSim_Digital
 LIBS:eSim_Hybrid
 LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
 LIBS:eSim_Sources
 LIBS:eSim_Subckt
 LIBS:eSim_User
-LIBS:4_bit_JK_ff-rescue
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -64,7 +66,7 @@ F 3 "" H 2750 3650 60  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L dc v1
+L dc-RESCUE-4_bit_JK_ff v1
 U 1 1 5548DFB1
 P 1100 5600
 F 0 "v1" H 900 5700 60  0000 C CNN
@@ -75,7 +77,7 @@ F 3 "" H 1100 5600 60  0000 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L dc v3
+L dc-RESCUE-4_bit_JK_ff v3
 U 1 1 5548E056
 P 1100 6800
 F 0 "v3" H 900 6900 60  0000 C CNN
@@ -97,7 +99,7 @@ F 3 "" H 650 7300 60  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L dc v4
+L dc-RESCUE-4_bit_JK_ff v4
 U 1 1 554A0BE0
 P 3550 5950
 F 0 "v4" H 3350 6050 60  0000 C CNN
@@ -185,7 +187,7 @@ F 3 "" H 4900 6150 60  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L dc v10
+L dc-RESCUE-4_bit_JK_ff v10
 U 1 1 554B724D
 P 3500 6400
 F 0 "v10" H 3300 6500 60  0000 C CNN
@@ -196,7 +198,7 @@ F 3 "" H 3500 6400 60  0000 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L dc v11
+L dc-RESCUE-4_bit_JK_ff v11
 U 1 1 554B72DB
 P 3500 6700
 F 0 "v11" H 3300 6800 60  0000 C CNN
@@ -207,7 +209,7 @@ F 3 "" H 3500 6700 60  0000 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L dc v9
+L dc-RESCUE-4_bit_JK_ff v9
 U 1 1 554B7321
 P 3500 5450
 F 0 "v9" H 3300 5550 60  0000 C CNN
@@ -218,7 +220,7 @@ F 3 "" H 3500 5450 60  0000 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L dc v8
+L dc-RESCUE-4_bit_JK_ff v8
 U 1 1 554B79B1
 P 2200 1200
 F 0 "v8" H 2000 1300 60  0000 C CNN
@@ -240,7 +242,7 @@ F 3 "" H 3550 1400 60  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L dc v6
+L dc-RESCUE-4_bit_JK_ff v6
 U 1 1 554B79BD
 P 2150 1650
 F 0 "v6" H 1950 1750 60  0000 C CNN
@@ -251,7 +253,7 @@ F 3 "" H 2150 1650 60  0000 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L dc v7
+L dc-RESCUE-4_bit_JK_ff v7
 U 1 1 554B79C3
 P 2150 1950
 F 0 "v7" H 1950 2050 60  0000 C CNN
@@ -262,7 +264,7 @@ F 3 "" H 2150 1950 60  0000 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L dc v5
+L dc-RESCUE-4_bit_JK_ff v5
 U 1 1 554B79C9
 P 2150 700
 F 0 "v5" H 1950 800 60  0000 C CNN
@@ -295,21 +297,21 @@ F 3 "" H 8550 2150 60  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND-RESCUE-4_bit_JK_ff #PWR03
+L GND-RESCUE-4_bit_JK_ff #PWR02
 U 1 1 554B90FC
-P 10450 2400
-F 0 "#PWR03" H 10450 2150 50  0001 C CNN
-F 1 "GND" H 10450 2250 50  0000 C CNN
-F 2 "" H 10450 2400 60  0000 C CNN
-F 3 "" H 10450 2400 60  0000 C CNN
-	1    10450 2400
+P 10850 2400
+F 0 "#PWR02" H 10850 2150 50  0001 C CNN
+F 1 "GND" H 10850 2250 50  0000 C CNN
+F 2 "" H 10850 2400 60  0000 C CNN
+F 3 "" H 10850 2400 60  0000 C CNN
+	1    10850 2400
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND-RESCUE-4_bit_JK_ff #PWR04
+L GND-RESCUE-4_bit_JK_ff #PWR03
 U 1 1 554B95B8
 P 2800 7050
-F 0 "#PWR04" H 2800 6800 50  0001 C CNN
+F 0 "#PWR03" H 2800 6800 50  0001 C CNN
 F 1 "GND" H 2800 6900 50  0000 C CNN
 F 2 "" H 2800 7050 60  0000 C CNN
 F 3 "" H 2800 7050 60  0000 C CNN
@@ -317,10 +319,10 @@ F 3 "" H 2800 7050 60  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND-RESCUE-4_bit_JK_ff #PWR05
+L GND-RESCUE-4_bit_JK_ff #PWR04
 U 1 1 554B9C35
 P 1400 2200
-F 0 "#PWR05" H 1400 1950 50  0001 C CNN
+F 0 "#PWR04" H 1400 1950 50  0001 C CNN
 F 1 "GND" H 1400 2050 50  0000 C CNN
 F 2 "" H 1400 2200 60  0000 C CNN
 F 3 "" H 1400 2200 60  0000 C CNN
@@ -328,10 +330,10 @@ F 3 "" H 1400 2200 60  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND-RESCUE-4_bit_JK_ff #PWR06
+L GND-RESCUE-4_bit_JK_ff #PWR05
 U 1 1 554BA1F1
 P 10650 5500
-F 0 "#PWR06" H 10650 5250 50  0001 C CNN
+F 0 "#PWR05" H 10650 5250 50  0001 C CNN
 F 1 "GND" H 10650 5350 50  0000 C CNN
 F 2 "" H 10650 5500 60  0000 C CNN
 F 3 "" H 10650 5500 60  0000 C CNN
@@ -574,34 +576,34 @@ Wire Wire Line
 Wire Wire Line
 	9300 1950 9300 1800
 Wire Wire Line
-	9300 1800 9800 1800
+	9300 1800 10200 1800
 Wire Wire Line
 	9100 2050 9500 2050
 Wire Wire Line
 	9500 2050 9500 1950
 Wire Wire Line
-	9500 1950 9800 1950
+	9500 1950 10200 1950
 Wire Wire Line
 	9100 2150 9700 2150
 Wire Wire Line
 	9700 2150 9700 2100
 Wire Wire Line
-	9700 2100 9800 2100
+	9700 2100 10200 2100
 Wire Wire Line
-	9100 2250 9800 2250
+	9100 2250 10200 2250
 Wire Wire Line
-	10100 1800 10450 1800
+	10500 1800 10850 1800
 Wire Wire Line
-	10450 1800 10450 2400
+	10850 1800 10850 2400
 Wire Wire Line
-	10100 1950 10450 1950
-Connection ~ 10450 1950
+	10500 1950 10850 1950
+Connection ~ 10850 1950
 Wire Wire Line
-	10100 2100 10450 2100
-Connection ~ 10450 2100
+	10500 2100 10850 2100
+Connection ~ 10850 2100
 Wire Wire Line
-	10100 2250 10450 2250
-Connection ~ 10450 2250
+	10500 2250 10850 2250
+Connection ~ 10850 2250
 Wire Wire Line
 	3050 5450 2800 5450
 Wire Wire Line
@@ -658,52 +660,52 @@ Connection ~ 9400 2250
 $Comp
 L R R1
 U 1 1 55D466F5
-P 9900 1850
-F 0 "R1" H 9950 1980 50  0000 C CNN
-F 1 "1k" H 9950 1900 50  0000 C CNN
-F 2 "" H 9950 1830 30  0000 C CNN
-F 3 "" V 9950 1900 30  0000 C CNN
-	1    9900 1850
+P 10300 1850
+F 0 "R1" H 10350 1980 50  0000 C CNN
+F 1 "1k" H 10350 1900 50  0000 C CNN
+F 2 "" H 10350 1830 30  0000 C CNN
+F 3 "" V 10350 1900 30  0000 C CNN
+	1    10300 1850
 	1    0    0    -1  
 $EndComp
 $Comp
 L R R2
 U 1 1 55D46764
-P 9900 2000
-F 0 "R2" H 9950 2130 50  0000 C CNN
-F 1 "1k" H 9950 2050 50  0000 C CNN
-F 2 "" H 9950 1980 30  0000 C CNN
-F 3 "" V 9950 2050 30  0000 C CNN
-	1    9900 2000
+P 10300 2000
+F 0 "R2" H 10350 2130 50  0000 C CNN
+F 1 "1k" H 10350 2050 50  0000 C CNN
+F 2 "" H 10350 1980 30  0000 C CNN
+F 3 "" V 10350 2050 30  0000 C CNN
+	1    10300 2000
 	1    0    0    -1  
 $EndComp
 $Comp
 L R R3
 U 1 1 55D467C3
-P 9900 2150
-F 0 "R3" H 9950 2280 50  0000 C CNN
-F 1 "1k" H 9950 2200 50  0000 C CNN
-F 2 "" H 9950 2130 30  0000 C CNN
-F 3 "" V 9950 2200 30  0000 C CNN
-	1    9900 2150
+P 10300 2150
+F 0 "R3" H 10350 2280 50  0000 C CNN
+F 1 "1k" H 10350 2200 50  0000 C CNN
+F 2 "" H 10350 2130 30  0000 C CNN
+F 3 "" V 10350 2200 30  0000 C CNN
+	1    10300 2150
 	1    0    0    -1  
 $EndComp
 $Comp
 L R R4
 U 1 1 55D4681D
-P 9900 2300
-F 0 "R4" H 9950 2430 50  0000 C CNN
-F 1 "1k" H 9950 2350 50  0000 C CNN
-F 2 "" H 9950 2280 30  0000 C CNN
-F 3 "" V 9950 2350 30  0000 C CNN
-	1    9900 2300
+P 10300 2300
+F 0 "R4" H 10350 2430 50  0000 C CNN
+F 1 "1k" H 10350 2350 50  0000 C CNN
+F 2 "" H 10350 2280 30  0000 C CNN
+F 3 "" V 10350 2350 30  0000 C CNN
+	1    10300 2300
 	1    0    0    -1  
 $EndComp
 $Comp
-L dac_bridge_1 U?
+L dac_bridge_1 U11
 U 1 1 55D45D81
 P 10600 4800
-F 0 "U?" H 10600 4800 60  0000 C CNN
+F 0 "U11" H 10600 4800 60  0000 C CNN
 F 1 "dac_bridge_1" H 10600 4950 60  0000 C CNN
 F 2 "" H 10600 4800 60  0000 C CNN
 F 3 "" H 10600 4800 60  0000 C CNN
@@ -712,4 +714,54 @@ F 3 "" H 10600 4800 60  0000 C CNN
 $EndComp
 Wire Wire Line
 	10650 5350 10650 5500
+$Comp
+L plot_v1 U12
+U 1 1 56D836F6
+P 9400 1900
+F 0 "U12" H 9400 2400 60  0000 C CNN
+F 1 "plot_v1" H 9600 2250 60  0000 C CNN
+F 2 "" H 9400 1900 60  0000 C CNN
+F 3 "" H 9400 1900 60  0000 C CNN
+	1    9400 1900
+	1    0    0    -1  
+$EndComp
+$Comp
+L plot_v1 U14
+U 1 1 56D837A6
+P 9950 2050
+F 0 "U14" H 9950 2550 60  0000 C CNN
+F 1 "plot_v1" H 10150 2400 60  0000 C CNN
+F 2 "" H 9950 2050 60  0000 C CNN
+F 3 "" H 9950 2050 60  0000 C CNN
+	1    9950 2050
+	1    0    0    1   
+$EndComp
+$Comp
+L plot_v1 U15
+U 1 1 56D84035
+P 10000 2300
+F 0 "U15" H 10000 2800 60  0000 C CNN
+F 1 "plot_v1" H 10200 2650 60  0000 C CNN
+F 2 "" H 10000 2300 60  0000 C CNN
+F 3 "" H 10000 2300 60  0000 C CNN
+	1    10000 2300
+	1    0    0    -1  
+$EndComp
+$Comp
+L plot_v1 U13
+U 1 1 56D840C8
+P 9700 2150
+F 0 "U13" H 9700 2650 60  0000 C CNN
+F 1 "plot_v1" H 9900 2500 60  0000 C CNN
+F 2 "" H 9700 2150 60  0000 C CNN
+F 3 "" H 9700 2150 60  0000 C CNN
+	1    9700 2150
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9400 1700 9400 1800
+Connection ~ 9400 1800
+Connection ~ 9700 1950
+Connection ~ 10000 2100
+Connection ~ 9950 2250
 $EndSCHEMATC
diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff.cir b/Examples/4_bit_JK_ff/4_bit_JK_ff.cir
index ed3ffcfb..609d5842 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff.cir
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff.cir
@@ -1,14 +1,14 @@
-* /home/fossee/Downloads/eSim-master/Examples/4_bit_JK_ff/4_bit_JK_ff.cir
+* /home/fossee/UpdatedExamples/4_bit_JK_ff/4_bit_JK_ff.cir
 
-* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Aug 19 15:36:59 2015
+* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar  3 18:13:51 2016
 
 * To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
 * To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
 
 * Sheet Name: /
 U3  Net-_U1-Pad4_ Net-_U1-Pad6_ Net-_U1-Pad5_ Net-_U2-Pad8_ Net-_U3-Pad5_ Net-_U3-Pad6_ Net-_U3-Pad7_ d_jkff		
-v1  Net-_U1-Pad1_ GND dc		
-v3  Net-_U1-Pad3_ GND dc		
+v1  Net-_U1-Pad1_ GND DC		
+v3  Net-_U1-Pad3_ GND DC		
 v4  Net-_U4-Pad2_ GND 0		
 v2  IN GND pulse		
 U5  Net-_U3-Pad7_ Net-_U3-Pad7_ Net-_U1-Pad5_ Net-_U2-Pad7_ Net-_U4-Pad6_ Net-_U5-Pad6_ Net-_U5-Pad7_ d_jkff		
@@ -32,5 +32,9 @@ R2  D2 GND 1k
 R3  D3 GND 1k		
 R4  D4 GND 1k		
 U11  Net-_U10-Pad7_ GND dac_bridge_1		
+U12  D1 plot_v1		
+U14  D4 plot_v1		
+U15  D3 plot_v1		
+U13  D2 plot_v1		
 
 .end
diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff.cir.out b/Examples/4_bit_JK_ff/4_bit_JK_ff.cir.out
index ec54b764..26307de1 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff.cir.out
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff.cir.out
@@ -1,4 +1,4 @@
-* /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
+* /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
 
 * u3  net-_u1-pad4_ net-_u1-pad6_ net-_u1-pad5_ net-_u2-pad8_ net-_u3-pad5_ net-_u3-pad6_ net-_u3-pad7_ d_jkff
 v1 net-_u1-pad1_ gnd  dc 5
@@ -26,6 +26,10 @@ r2  d2 gnd 1k
 r3  d3 gnd 1k
 r4  d4 gnd 1k
 * u11  net-_u10-pad7_ gnd dac_bridge_1
+* u12  d1 plot_v1
+* u14  d4 plot_v1
+* u15  d3 plot_v1
+* u13  d2 plot_v1
 a1 net-_u1-pad4_ net-_u1-pad6_ net-_u1-pad5_ net-_u2-pad8_ net-_u3-pad5_ net-_u3-pad6_ net-_u3-pad7_ u3
 a2 net-_u3-pad7_ net-_u3-pad7_ net-_u1-pad5_ net-_u2-pad7_ net-_u4-pad6_ net-_u5-pad6_ net-_u5-pad7_ u5
 a3 net-_u6-pad3_ net-_u6-pad3_ net-_u1-pad5_ net-_u2-pad6_ net-_u4-pad7_ net-_u7-pad6_ net-_u7-pad7_ u7
@@ -57,8 +61,6 @@ a11 [net-_u10-pad7_ ] [gnd ] u11
 .model u1 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 ) 
 * Schematic Name: dac_bridge_4, NgSpice Name: dac_bridge
 .model u9 dac_bridge(out_undef=0.5 out_low=0.0 out_high=5.0 t_rise=1.0e-9 t_fall=1.0e-9 input_load=1.0e-12 ) 
-* Schematic Name: d_jkff, NgSpice Name: d_jkff
-.model u10 d_jkff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 rise_delay=1.0e-9 jk_load=1.0e-12 fall_delay=1.0e-9 ) 
 * Schematic Name: dac_bridge_1, NgSpice Name: dac_bridge
 .model u11 dac_bridge(out_undef=0.5 out_low=0.0 out_high=5.0 t_rise=1.0e-9 t_fall=1.0e-9 input_load=1.0e-12 ) 
 .tran 10e-03 100e-03 0e-03
@@ -68,5 +70,9 @@ a11 [net-_u10-pad7_ ] [gnd ] u11
 run
 print allv > plot_data_v.txt
 print alli > plot_data_i.txt
+plot v(d1)
+plot v(d4)
+plot v(d3)
+plot v(d2)
 .endc
 .end
diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff.pro b/Examples/4_bit_JK_ff/4_bit_JK_ff.pro
index d5f635b2..261bda7c 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff.pro
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff.pro
@@ -1,4 +1,4 @@
-update=Wed Aug 19 15:27:53 2015
+update=Thu Mar  3 18:07:25 2016
 version=1
 last_client=eeschema
 [general]
@@ -31,42 +31,44 @@ NetIExt=net
 version=1
 LibDir=
 [eeschema/libraries]
-LibName1=eSim_Analog
-LibName2=eSim_Devices
-LibName3=eSim_Digital
-LibName4=eSim_Hybrid
-LibName5=eSim_Miscellaneous
-LibName6=eSim_Sources
-LibName7=eSim_Subckt
-LibName8=eSim_User
-LibName9=4_bit_JK_ff-rescue
-LibName10=power
-LibName11=device
-LibName12=transistors
-LibName13=conn
-LibName14=linear
-LibName15=regul
-LibName16=74xx
-LibName17=cmos4000
-LibName18=adc-dac
-LibName19=memory
-LibName20=xilinx
-LibName21=special
-LibName22=microcontrollers
-LibName23=dsp
-LibName24=microchip
-LibName25=analog_switches
-LibName26=motorola
-LibName27=texas
-LibName28=intel
-LibName29=audio
-LibName30=interface
-LibName31=digital-audio
-LibName32=philips
-LibName33=display
-LibName34=cypress
-LibName35=siliconi
-LibName36=opto
-LibName37=atmel
-LibName38=contrib
-LibName39=valves
+LibName1=4_bit_JK_ff-rescue
+LibName2=eSim_Analog
+LibName3=eSim_Devices
+LibName4=eSim_Digital
+LibName5=eSim_Hybrid
+LibName6=eSim_Miscellaneous
+LibName7=eSim_Plot
+LibName8=eSim_Power
+LibName9=eSim_Sources
+LibName10=eSim_Subckt
+LibName11=eSim_User
+LibName12=power
+LibName13=device
+LibName14=transistors
+LibName15=conn
+LibName16=linear
+LibName17=regul
+LibName18=74xx
+LibName19=cmos4000
+LibName20=adc-dac
+LibName21=memory
+LibName22=xilinx
+LibName23=special
+LibName24=microcontrollers
+LibName25=dsp
+LibName26=microchip
+LibName27=analog_switches
+LibName28=motorola
+LibName29=texas
+LibName30=intel
+LibName31=audio
+LibName32=interface
+LibName33=digital-audio
+LibName34=philips
+LibName35=display
+LibName36=cypress
+LibName37=siliconi
+LibName38=opto
+LibName39=atmel
+LibName40=contrib
+LibName41=valves
diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff.sch b/Examples/4_bit_JK_ff/4_bit_JK_ff.sch
index abc6aa7a..91da284b 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff.sch
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff.sch
@@ -1,13 +1,15 @@
 EESchema Schematic File Version 2
+LIBS:4_bit_JK_ff-rescue
 LIBS:eSim_Analog
 LIBS:eSim_Devices
 LIBS:eSim_Digital
 LIBS:eSim_Hybrid
 LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
 LIBS:eSim_Sources
 LIBS:eSim_Subckt
 LIBS:eSim_User
-LIBS:4_bit_JK_ff-rescue
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -64,22 +66,22 @@ F 3 "" H 2750 3650 60  0000 C CNN
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 $EndComp
 $Comp
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+L dc-RESCUE-4_bit_JK_ff v1
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 P 1100 5600
 F 0 "v1" H 900 5700 60  0000 C CNN
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+F 1 "DC" H 900 5550 60  0000 C CNN
 F 2 "R1" H 800 5600 60  0000 C CNN
 F 3 "" H 1100 5600 60  0000 C CNN
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 F 2 "R1" H 800 6800 60  0000 C CNN
 F 3 "" H 1100 6800 60  0000 C CNN
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 $EndComp
 $Comp
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+L dc-RESCUE-4_bit_JK_ff v4
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 F 0 "v4" H 3350 6050 60  0000 C CNN
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 $EndComp
 $Comp
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 F 0 "v10" H 3300 6500 60  0000 C CNN
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 $Comp
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 F 0 "v11" H 3300 6800 60  0000 C CNN
@@ -207,7 +209,7 @@ F 3 "" H 3500 6700 60  0000 C CNN
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 $Comp
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 F 0 "v9" H 3300 5550 60  0000 C CNN
@@ -218,7 +220,7 @@ F 3 "" H 3500 5450 60  0000 C CNN
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 $EndComp
 $Comp
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 L GND-RESCUE-4_bit_JK_ff #PWR02
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 Wire Wire Line
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 L R R1
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 L R R2
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 $Comp
 L R R3
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-F 3 "" V 9950 2200 30  0000 C CNN
-	1    9900 2150
+P 10300 2150
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 $EndComp
 $Comp
 L R R4
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 $EndComp
 $Comp
@@ -712,4 +714,54 @@ F 3 "" H 10600 4800 60  0000 C CNN
 $EndComp
 Wire Wire Line
 	10650 5350 10650 5500
+$Comp
+L plot_v1 U12
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+	1    9400 1900
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+$EndComp
+$Comp
+L plot_v1 U14
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+	1    9950 2050
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+$EndComp
+$Comp
+L plot_v1 U15
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+	1    10000 2300
+	1    0    0    -1  
+$EndComp
+$Comp
+L plot_v1 U13
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+	1    9700 2150
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+$EndComp
+Wire Wire Line
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 $EndSCHEMATC
diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff_Previous_Values.xml b/Examples/4_bit_JK_ff/4_bit_JK_ff_Previous_Values.xml
index a04ea513..c0b30097 100644
--- a/Examples/4_bit_JK_ff/4_bit_JK_ff_Previous_Values.xml
+++ b/Examples/4_bit_JK_ff/4_bit_JK_ff_Previous_Values.xml
@@ -1 +1 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis><source><v1 name="Source type">dc<field1 name="Value">5</field1></v1><v3 name="Source type">dc<field1 name="Value">5</field1></v3><v4 name="Source type">0</v4><v2 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0.1m</field3><field4 name="Rise Time">0.1m</field4><field5 name="Fall Time">0.1m</field5><field5 name="Pulse width">20m</field5><field5 name="Period">40m</field5></v2><v10 name="Source type">0</v10><v11 name="Source type">0</v11><v9 name="Source type">0</v9><v8 name="Source type">0</v8><v6 name="Source type">0</v6><v7 name="Source type">0</v7><v5 name="Source type">0</v5></source><model><u3 name="type">d_jkff<field1 name="Enter IC (default=0)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Set Delay (default=1.0e-9)" /><field4 name="Enter value for Set Load (default=1.0e-12)" /><field5 name="Enter Clk Delay (default=1.0e-9)" /><field6 name="Enter value for Clk Load (default=1.0e-12)" /><field7 name="Enter Reset Delay (default=1.0)" /><field8 name="Enter Rise Delay (default=1.0e-9)" /><field9 name="Enter value for JK Load (default=1.0e-12)" /><field10 name="Enter value for Reset Load (default=1.0e-12)" /></u3><u5 name="type">d_jkff<field11 name="Enter IC (default=0)" /><field12 name="Enter Fall Delay (default=1.0e-9)" /><field13 name="Enter Set Delay (default=1.0e-9)" /><field14 name="Enter value for Set Load (default=1.0e-12)" /><field15 name="Enter Clk Delay (default=1.0e-9)" /><field16 name="Enter value for Clk Load (default=1.0e-12)" /><field17 name="Enter Reset Delay (default=1.0)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /><field19 name="Enter value for JK Load (default=1.0e-12)" /><field20 name="Enter value for Reset Load (default=1.0e-12)" /></u5><u7 name="type">d_jkff<field21 name="Enter IC (default=0)" /><field22 name="Enter Fall Delay (default=1.0e-9)" /><field23 name="Enter Set Delay (default=1.0e-9)" /><field24 name="Enter value for Set Load (default=1.0e-12)" /><field25 name="Enter Clk Delay (default=1.0e-9)" /><field26 name="Enter value for Clk Load (default=1.0e-12)" /><field27 name="Enter Reset Delay (default=1.0)" /><field28 name="Enter Rise Delay (default=1.0e-9)" /><field29 name="Enter value for JK Load (default=1.0e-12)" /><field30 name="Enter value for Reset Load (default=1.0e-12)" /></u7><u10 name="type">d_jkff<field31 name="Enter IC (default=0)" /><field32 name="Enter Fall Delay (default=1.0e-9)" /><field33 name="Enter Set Delay (default=1.0e-9)" /><field34 name="Enter value for Set Load (default=1.0e-12)" /><field35 name="Enter Clk Delay (default=1.0e-9)" /><field36 name="Enter value for Clk Load (default=1.0e-12)" /><field37 name="Enter Reset Delay (default=1.0)" /><field38 name="Enter Rise Delay (default=1.0e-9)" /><field39 name="Enter value for JK Load (default=1.0e-12)" /><field40 name="Enter value for Reset Load (default=1.0e-12)" /></u10><u6 name="type">d_and<field41 name="Enter Fall Delay (default=1.0e-9)" /><field42 name="Enter Input Load (default=1.0e-12)" /><field43 name="Enter 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\ No newline at end of file
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Load (default=1.0e-12)" /><field40 name="Enter value for Reset Load (default=1.0e-12)" /></u10><u6 name="type">d_and<field41 name="Enter Fall Delay (default=1.0e-9)" /><field42 name="Enter Input Load (default=1.0e-12)" /><field43 name="Enter Rise Delay (default=1.0e-9)" /></u6><u8 name="type">d_and<field44 name="Enter Fall Delay (default=1.0e-9)" /><field45 name="Enter Input Load (default=1.0e-12)" /><field46 name="Enter Rise Delay (default=1.0e-9)" /></u8><u4 name="type">adc_bridge<field47 name="Enter Fall Delay (default=1.0e-9)" /><field48 name="Enter value for in_high (default=2.0)" /><field49 name="Enter Rise Delay (default=1.0e-9)" /><field50 name="Enter value for in_low (default=1.0)" /></u4><u2 name="type">adc_bridge<field51 name="Enter Fall Delay (default=1.0e-9)" /><field52 name="Enter value for in_high (default=2.0)" /><field53 name="Enter Rise Delay (default=1.0e-9)" /><field54 name="Enter value for in_low (default=1.0)" /></u2><u1 name="type">adc_bridge<field55 name="Enter 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/></KicadtoNgspice>
\ No newline at end of file
diff --git a/Examples/4_bit_JK_ff/plot_data_i.txt b/Examples/4_bit_JK_ff/plot_data_i.txt
index 803d4e22..9bf36b87 100644
--- a/Examples/4_bit_JK_ff/plot_data_i.txt
+++ b/Examples/4_bit_JK_ff/plot_data_i.txt
@@ -1,5 +1,5 @@
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            a10#branch_1_0  a10#branch_1_1  a10#branch_1_2  
 --------------------------------------------------------------------------------
@@ -202,8 +202,8 @@ Index   time            a10#branch_1_0  a10#branch_1_1  a10#branch_1_2
 187	9.834539e-02	-5.00000e-03	0.000000e+00	-5.00000e-03	
 188	1.000000e-01	-5.00000e-03	0.000000e+00	-5.00000e-03	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            a10#branch_1_3  a11#branch_1_0  v1#branch       
 --------------------------------------------------------------------------------
@@ -406,8 +406,8 @@ Index   time            a10#branch_1_3  a11#branch_1_0  v1#branch
 187	9.834539e-02	-5.00000e-03	0.000000e+00	0.000000e+00	
 188	1.000000e-01	-5.00000e-03	0.000000e+00	0.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            v2#branch       v3#branch       v4#branch       
 --------------------------------------------------------------------------------
@@ -610,8 +610,8 @@ Index   time            v2#branch       v3#branch       v4#branch
 187	9.834539e-02	0.000000e+00	0.000000e+00	0.000000e+00	
 188	1.000000e-01	0.000000e+00	0.000000e+00	0.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            v5#branch       v6#branch       v7#branch       
 --------------------------------------------------------------------------------
@@ -814,8 +814,8 @@ Index   time            v5#branch       v6#branch       v7#branch
 187	9.834539e-02	0.000000e+00	0.000000e+00	0.000000e+00	
 188	1.000000e-01	0.000000e+00	0.000000e+00	0.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            v8#branch       v9#branch       v10#branch      
 --------------------------------------------------------------------------------
@@ -1018,8 +1018,8 @@ Index   time            v8#branch       v9#branch       v10#branch
 187	9.834539e-02	0.000000e+00	0.000000e+00	0.000000e+00	
 188	1.000000e-01	0.000000e+00	0.000000e+00	0.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            v11#branch      
 --------------------------------------------------------------------------------
diff --git a/Examples/4_bit_JK_ff/plot_data_v.txt b/Examples/4_bit_JK_ff/plot_data_v.txt
index da32eaa7..0ee6ee1c 100644
--- a/Examples/4_bit_JK_ff/plot_data_v.txt
+++ b/Examples/4_bit_JK_ff/plot_data_v.txt
@@ -1,5 +1,5 @@
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            d1              d2              d3              
 --------------------------------------------------------------------------------
@@ -202,8 +202,8 @@ Index   time            d1              d2              d3
 187	9.834539e-02	5.000000e+00	0.000000e+00	5.000000e+00	
 188	1.000000e-01	5.000000e+00	0.000000e+00	5.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            d4              gnd             in              
 --------------------------------------------------------------------------------
@@ -406,8 +406,8 @@ Index   time            d4              gnd             in
 187	9.834539e-02	5.000000e+00	0.000000e+00	5.000000e+00	
 188	1.000000e-01	5.000000e+00	0.000000e+00	5.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            net-_u1-pad1_   net-_u1-pad3_   net-_u2-pad1_   
 --------------------------------------------------------------------------------
@@ -610,8 +610,8 @@ Index   time            net-_u1-pad1_   net-_u1-pad3_   net-_u2-pad1_
 187	9.834539e-02	5.000000e+00	5.000000e+00	0.000000e+00	
 188	1.000000e-01	5.000000e+00	5.000000e+00	0.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            net-_u2-pad2_   net-_u2-pad3_   net-_u2-pad4_   
 --------------------------------------------------------------------------------
@@ -814,8 +814,8 @@ Index   time            net-_u2-pad2_   net-_u2-pad3_   net-_u2-pad4_
 187	9.834539e-02	0.000000e+00	0.000000e+00	0.000000e+00	
 188	1.000000e-01	0.000000e+00	0.000000e+00	0.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            net-_u4-pad1_   net-_u4-pad2_   net-_u4-pad3_   
 --------------------------------------------------------------------------------
@@ -1018,8 +1018,8 @@ Index   time            net-_u4-pad1_   net-_u4-pad2_   net-_u4-pad3_
 187	9.834539e-02	0.000000e+00	0.000000e+00	0.000000e+00	
 188	1.000000e-01	0.000000e+00	0.000000e+00	0.000000e+00	
 
-   * /home/fossee/downloads/esim-master/examples/4_bit_jk_ff/4_bit_jk_ff.cir
-   Transient Analysis  Wed Aug 19 15:41:11  2015
+           * /home/fossee/updatedexamples/4_bit_jk_ff/4_bit_jk_ff.cir
+           Transient Analysis  Thu Mar  3 18:14:13  2016
 --------------------------------------------------------------------------------
 Index   time            net-_u4-pad4_   
 --------------------------------------------------------------------------------