diff options
| author | saurabhb17 | 2020-03-27 17:53:28 +0530 |
|---|---|---|
| committer | saurabhb17 | 2020-03-27 17:53:28 +0530 |
| commit | c79d3bd5808c8b2f07c1d5a0c421d560209dd6f8 (patch) | |
| tree | dad30e3ced4724b99692feb65934f5e5a5d0bbee | |
| parent | 7c6743e5ec8a299ca40dceca5de3fc99a3aed025 (diff) | |
| download | eSim-c79d3bd5808c8b2f07c1d5a0c421d560209dd6f8.tar.gz eSim-c79d3bd5808c8b2f07c1d5a0c421d560209dd6f8.tar.bz2 eSim-c79d3bd5808c8b2f07c1d5a0c421d560209dd6f8.zip | |
UA741 removed subcktlibrary
48 files changed, 1268 insertions, 1598 deletions
diff --git a/Examples/Integrator/D.lib b/Examples/Integrator/D.lib deleted file mode 100644 index ef18bb50..00000000 --- a/Examples/Integrator/D.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL D1N750 D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ Bv=8.1 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=880.5E-18 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/Integrator/Integrator-cache.lib b/Examples/Integrator/Integrator-cache.lib deleted file mode 100644 index 259458aa..00000000 --- a/Examples/Integrator/Integrator-cache.lib +++ /dev/null @@ -1,105 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# UA741 -# -DEF UA741 X 0 40 Y Y 1 F N -F0 "X" 150 0 60 H V C CNN -F1 "UA741" 250 -150 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -P 4 0 1 0 0 150 0 -150 350 0 0 150 N -X + 1 -200 100 200 R 50 50 1 1 I -X - 2 -200 -100 200 R 50 50 1 1 I -X ~ 3 550 0 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# eSim_C -# -DEF eSim_C C 0 10 N Y 1 F N -F0 "C" 25 100 50 H V L CNN -F1 "eSim_C" 25 -100 50 H V L CNN -F2 "" 38 -150 30 H V C CNN -F3 "" 0 0 60 H V C CNN -ALIAS capacitor -$FPLIST - C_* -$ENDFPLIST -DRAW -P 2 0 1 20 -80 -30 80 -30 N -P 2 0 1 20 -80 30 80 30 N -X ~ 1 0 150 110 D 40 40 1 1 P -X ~ 2 0 -150 110 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# eSim_R -# -DEF eSim_R R 0 0 N Y 1 F N -F0 "R" 50 130 50 H V C CNN -F1 "eSim_R" 50 -50 50 H V C CNN -F2 "" 50 -20 30 H V C CNN -F3 "" 50 50 30 V V C CNN -ALIAS resistor -$FPLIST - R_* - Resistor_* -$ENDFPLIST -DRAW -S 150 10 -50 90 0 1 10 N -X ~ 1 -100 50 50 R 60 60 1 1 P -X ~ 2 200 50 50 L 60 60 1 1 P -ENDDRAW -ENDDEF -# -# plot_v1 -# -DEF plot_v1 U 0 40 Y Y 1 F N -F0 "U" 0 500 60 H V C CNN -F1 "plot_v1" 200 350 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -C 0 500 100 0 1 0 N -X ~ ~ 0 200 200 U 50 50 1 1 I -ENDDRAW -ENDDEF -# -# pwl -# -DEF pwl v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pwl" -250 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 -A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 -A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 -A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 -A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/Integrator/Integrator.cir b/Examples/Integrator/Integrator.cir deleted file mode 100644 index b7b0164b..00000000 --- a/Examples/Integrator/Integrator.cir +++ /dev/null @@ -1,19 +0,0 @@ -* /home/saurabh/Desktop/eSim/Examples/Integrator/Integrator.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Mar 11 16:27:08 2020 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -X1 Net-_R2-Pad1_ Net-_C1-Pad2_ out UA741 -v1 in GND pwl -U1 in plot_v1 -U2 out plot_v1 -R1 in Net-_C1-Pad2_ 10k -R2 Net-_R2-Pad1_ GND 1k -R3 out Net-_C1-Pad2_ 100k -C1 out Net-_C1-Pad2_ 100n -R4 GND out 1k - -.end diff --git a/Examples/Integrator/Integrator.cir.out b/Examples/Integrator/Integrator.cir.out deleted file mode 100644 index 9db03242..00000000 --- a/Examples/Integrator/Integrator.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* /home/saurabh/desktop/esim/examples/integrator/integrator.cir - -.include ua741.sub -x1 net-_r2-pad1_ net-_c1-pad2_ out ua741 -v1 in gnd pwl(0m 0 0.5m 5 25m 5 25.5m -5 50m -5 50.5m 5 75m 5 75.5m -5 100m -5) -* u1 in plot_v1 -* u2 out plot_v1 -r1 in net-_c1-pad2_ 10k -r2 net-_r2-pad1_ gnd 1k -r3 out net-_c1-pad2_ 100k -c1 out net-_c1-pad2_ 100n -r4 gnd out 1k -.tran 1e-03 100e-03 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -plot v(in) -plot v(out) -.endc -.end diff --git a/Examples/Integrator/Integrator.pro b/Examples/Integrator/Integrator.pro deleted file mode 100644 index 0922f7b5..00000000 --- a/Examples/Integrator/Integrator.pro +++ /dev/null @@ -1,69 +0,0 @@ -update=Wed Mar 18 18:52:14 2020 -version=1 -last_client=eeschema -[general] -version=1 -RootSch= -BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[eeschema] -version=1 -LibDir= -[eeschema/libraries] -LibName1=eSim_Analog -LibName2=eSim_Devices -LibName3=eSim_Digital -LibName4=eSim_Hybrid -LibName5=eSim_Miscellaneous -LibName6=eSim_Plot -LibName7=eSim_Power -LibName8=eSim_Sources -LibName9=eSim_Subckt -LibName10=eSim_User -LibName11=adc-dac -LibName12=memory -LibName13=xilinx -LibName14=microcontrollers -LibName15=dsp -LibName16=microchip -LibName17=analog_switches -LibName18=motorola -LibName19=texas -LibName20=intel -LibName21=audio -LibName22=interface -LibName23=digital-audio -LibName24=philips -LibName25=display -LibName26=cypress -LibName27=siliconi -LibName28=opto -LibName29=atmel -LibName30=contrib -LibName31=power -LibName32=transistors -LibName33=conn -LibName34=regul -LibName35=74xx -LibName36=cmos4000 diff --git a/Examples/Integrator/Integrator.proj b/Examples/Integrator/Integrator.proj deleted file mode 100644 index 731ea735..00000000 --- a/Examples/Integrator/Integrator.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile Integrator.sch diff --git a/Examples/Integrator/Integrator.sch b/Examples/Integrator/Integrator.sch deleted file mode 100644 index d73bd6be..00000000 --- a/Examples/Integrator/Integrator.sch +++ /dev/null @@ -1,234 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L UA741 X1 -U 1 1 56A9B5FD -P 5950 3200 -F 0 "X1" H 6100 3200 60 0000 C CNN -F 1 "UA741" H 6200 3050 60 0000 C CNN -F 2 "" H 5950 3200 60 0000 C CNN -F 3 "" H 5950 3200 60 0000 C CNN - 1 5950 3200 - 1 0 0 1 -$EndComp -Wire Wire Line - 5300 3100 5750 3100 -Wire Wire Line - 5750 3300 5450 3300 -Wire Wire Line - 6500 3200 6900 3200 -$Comp -L GND #PWR2 -U 1 1 56A9B75D -P 5450 3600 -F 0 "#PWR2" H 5450 3350 50 0001 C CNN -F 1 "GND" H 5450 3450 50 0000 C CNN -F 2 "" H 5450 3600 50 0000 C CNN -F 3 "" H 5450 3600 50 0000 C CNN - 1 5450 3600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 56A9B7DC -P 4800 4000 -F 0 "#PWR1" H 4800 3750 50 0001 C CNN -F 1 "GND" H 4800 3850 50 0000 C CNN -F 2 "" H 4800 4000 50 0000 C CNN -F 3 "" H 4800 4000 50 0000 C CNN - 1 4800 4000 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR3 -U 1 1 56A9B7F9 -P 6900 3500 -F 0 "#PWR3" H 6900 3250 50 0001 C CNN -F 1 "GND" H 6900 3350 50 0000 C CNN -F 2 "" H 6900 3500 50 0000 C CNN -F 3 "" H 6900 3500 50 0000 C CNN - 1 6900 3500 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5000 3100 4800 3100 -Wire Wire Line - 5950 2700 5600 2700 -Connection ~ 5600 3100 -Wire Wire Line - 6250 2700 6650 2700 -Connection ~ 6650 3200 -Text GLabel 4800 2950 0 60 Input ~ 0 -in -Text GLabel 6850 3050 2 60 Input ~ 0 -out -Wire Wire Line - 4800 2950 4850 2950 -Wire Wire Line - 4850 2850 4850 3100 -Connection ~ 4850 3100 -Wire Wire Line - 6850 3050 6800 3050 -Wire Wire Line - 6800 3000 6800 3200 -Connection ~ 6800 3200 -Wire Wire Line - 5600 2350 5600 3100 -Wire Wire Line - 6650 2350 6650 3200 -Wire Wire Line - 5950 2350 5600 2350 -Connection ~ 5600 2700 -Wire Wire Line - 6250 2350 6650 2350 -Connection ~ 6650 2700 -$Comp -L pwl v1 -U 1 1 56B835AC -P 4800 3550 -F 0 "v1" H 4600 3650 60 0000 C CNN -F 1 "pwl" H 4550 3500 60 0000 C CNN -F 2 "R1" H 4500 3550 60 0000 C CNN -F 3 "" H 4800 3550 60 0000 C CNN - 1 4800 3550 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U1 -U 1 1 56D45D76 -P 4850 3050 -F 0 "U1" H 4850 3550 60 0000 C CNN -F 1 "plot_v1" H 5050 3400 60 0000 C CNN -F 2 "" H 4850 3050 60 0000 C CNN -F 3 "" H 4850 3050 60 0000 C CNN - 1 4850 3050 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U2 -U 1 1 56D45DCF -P 6800 3200 -F 0 "U2" H 6800 3700 60 0000 C CNN -F 1 "plot_v1" H 7000 3550 60 0000 C CNN -F 2 "" H 6800 3200 60 0000 C CNN -F 3 "" H 6800 3200 60 0000 C CNN - 1 6800 3200 - 1 0 0 -1 -$EndComp -Connection ~ 4850 2950 -Connection ~ 6800 3050 -Text Notes 5050 2900 0 60 ~ 0 -10k -Text Notes 5250 3700 0 60 ~ 0 -1k\n -Text Notes 6300 2600 0 60 ~ 0 -100n -Text Notes 5950 2150 0 60 ~ 0 -100k\n -Text Notes 7100 3350 0 60 ~ 0 -1k -$Comp -L resistor R1 -U 1 1 5E68C500 -P 5100 3150 -F 0 "R1" H 5150 3280 50 0000 C CNN -F 1 "10k" H 5150 3100 50 0000 C CNN -F 2 "" H 5150 3130 30 0000 C CNN -F 3 "" V 5150 3200 30 0000 C CNN - 1 5100 3150 - 1 0 0 -1 -$EndComp -$Comp -L resistor R2 -U 1 1 5E68C560 -P 5400 3400 -F 0 "R2" H 5450 3530 50 0000 C CNN -F 1 "1k" H 5450 3350 50 0000 C CNN -F 2 "" H 5450 3380 30 0000 C CNN -F 3 "" V 5450 3450 30 0000 C CNN - 1 5400 3400 - 0 1 1 0 -$EndComp -$Comp -L resistor R3 -U 1 1 5E68C5B3 -P 6150 2300 -F 0 "R3" H 6200 2430 50 0000 C CNN -F 1 "100k" H 6200 2250 50 0000 C CNN -F 2 "" H 6200 2280 30 0000 C CNN -F 3 "" V 6200 2350 30 0000 C CNN - 1 6150 2300 - -1 0 0 1 -$EndComp -$Comp -L capacitor C1 -U 1 1 5E68C612 -P 6100 2700 -F 0 "C1" H 6125 2800 50 0000 L CNN -F 1 "100n" H 6125 2600 50 0000 L CNN -F 2 "" H 6138 2550 30 0000 C CNN -F 3 "" H 6100 2700 60 0000 C CNN - 1 6100 2700 - 0 1 1 0 -$EndComp -$Comp -L resistor R4 -U 1 1 5E68C664 -P 6950 3400 -F 0 "R4" H 7000 3530 50 0000 C CNN -F 1 "1k" H 7000 3350 50 0000 C CNN -F 2 "" H 7000 3380 30 0000 C CNN -F 3 "" V 7000 3450 30 0000 C CNN - 1 6950 3400 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/Examples/Integrator/Integrator_Previous_Values.xml b/Examples/Integrator/Integrator_Previous_Values.xml deleted file mode 100644 index 2079752b..00000000 --- a/Examples/Integrator/Integrator_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -<KicadtoNgspice><source><v1 name="Source type">pwl<field1 name="Enter in pwl format">0m 0 0.5m 5 25m 5 25.5m -5 50m -5 50.5m 5 75m 5 75.5m -5 100m -5</field1></v1></source><model /><devicemodel /><subcircuit><x1><field>/home/saurabh/Desktop/eSim-2.0/library/SubcircuitLibrary/ua741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">1</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/Integrator/PowerDiode.lib b/Examples/Integrator/PowerDiode.lib deleted file mode 100644 index a2f61dce..00000000 --- a/Examples/Integrator/PowerDiode.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL PowerDiode D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ bv=1800 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=2.2E-15 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/Integrator/analysis b/Examples/Integrator/analysis deleted file mode 100644 index f496aec4..00000000 --- a/Examples/Integrator/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-03 100e-03 0e-00
\ No newline at end of file diff --git a/Examples/Integrator/ua741.cir b/Examples/Integrator/ua741.cir deleted file mode 100644 index de797429..00000000 --- a/Examples/Integrator/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/Examples/Integrator/ua741.cir.out b/Examples/Integrator/ua741.cir.out deleted file mode 100644 index 72e68514..00000000 --- a/Examples/Integrator/ua741.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -* u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -.ac lin 0 0Hz 0Hz - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/Integrator/ua741.pro b/Examples/Integrator/ua741.pro deleted file mode 100644 index c7b1d67b..00000000 --- a/Examples/Integrator/ua741.pro +++ /dev/null @@ -1,17 +0,0 @@ -update=Wed Mar 18 14:21:29 2020 -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/FreeEDA/library -[eeschema/libraries] -LibName1=power -LibName2=eSim_Devices -LibName3=eSim_User -LibName4=eSim_Subckt -LibName5=eSim_Sources -LibName6=eSim_Power -LibName7=eSim_Plot -LibName8=eSim_Miscellaneous -LibName9=eSim_Hybrid -LibName10=eSim_Digital -LibName11=eSim_Analog diff --git a/Examples/Integrator/ua741.sch b/Examples/Integrator/ua741.sch deleted file mode 100644 index b06dcc17..00000000 --- a/Examples/Integrator/ua741.sch +++ /dev/null @@ -1,229 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:power -LIBS:eSim_Devices -LIBS:eSim_User -LIBS:eSim_Subckt -LIBS:eSim_Sources -LIBS:eSim_Power -LIBS:eSim_Plot -LIBS:eSim_Miscellaneous -LIBS:eSim_Hybrid -LIBS:eSim_Digital -LIBS:eSim_Analog -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN -F 2 "" H 6250 2500 60 0001 C CNN -F 3 "" H 6250 2500 60 0001 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN -F 2 "" H 2300 3100 60 0001 C CNN -F 3 "" H 2300 3100 60 0001 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN -F 2 "" H 2250 2600 60 0001 C CNN -F 3 "" H 2250 2600 60 0001 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG1" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN -F 2 "" H 3450 3200 60 0001 C CNN -F 3 "" H 3450 3200 60 0001 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN -F 2 "" H 5200 2900 60 0001 C CNN -F 3 "" H 5200 2900 60 0001 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR1" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN -F 2 "" H 3700 3400 60 0001 C CNN -F 3 "" H 3700 3400 60 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN -F 2 "" H 3650 2850 60 0001 C CNN -F 3 "" H 3650 2850 60 0001 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -Text Notes 2600 2900 0 60 ~ 0 -2e6\n -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3000 4550 3300 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5400 2500 -Wire Wire Line - 5700 2500 6000 2500 -$Comp -L resistor Rin1 -U 1 1 5E71E232 -P 2950 2900 -F 0 "Rin1" H 3000 3030 50 0000 C CNN -F 1 "2e6" H 3000 2850 50 0000 C CNN -F 2 "" H 3000 2880 30 0000 C CNN -F 3 "" V 3000 2950 30 0000 C CNN - 1 2950 2900 - 0 1 1 0 -$EndComp -Wire Wire Line - 3000 2600 3000 2800 -$Comp -L resistor Rbw1 -U 1 1 5E71E326 -P 4050 2100 -F 0 "Rbw1" H 4100 2230 50 0000 C CNN -F 1 "0.5e6" H 4100 2050 50 0000 C CNN -F 2 "" H 4100 2080 30 0000 C CNN -F 3 "" V 4100 2150 30 0000 C CNN - 1 4050 2100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3900 2500 3900 2050 -Wire Wire Line - 3900 2050 3950 2050 -Wire Wire Line - 4250 2050 4400 2050 -Wire Wire Line - 4400 2050 4400 2500 -$Comp -L capacitor Cbw1 -U 1 1 5E71E45C -P 4550 2850 -F 0 "Cbw1" H 4575 2950 50 0000 L CNN -F 1 "31.85e-9" H 4575 2750 50 0000 L CNN -F 2 "" H 4588 2700 30 0000 C CNN -F 3 "" H 4550 2850 60 0000 C CNN - 1 4550 2850 - 1 0 0 -1 -$EndComp -$Comp -L resistor Rout1 -U 1 1 5E71E59C -P 5500 2250 -F 0 "Rout1" H 5550 2380 50 0000 C CNN -F 1 "75" H 5550 2200 50 0000 C CNN -F 2 "" H 5550 2230 30 0000 C CNN -F 3 "" V 5550 2300 30 0000 C CNN - 1 5500 2250 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5400 2500 5400 2200 -Wire Wire Line - 5700 2200 5700 2500 -$EndSCHEMATC diff --git a/Examples/Integrator/ua741.sub b/Examples/Integrator/ua741.sub deleted file mode 100644 index ad26c001..00000000 --- a/Examples/Integrator/ua741.sub +++ /dev/null @@ -1,12 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -* Control Statements - -.ends ua741
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/D.lib b/Examples/InvertingAmplifier/D.lib deleted file mode 100644 index ef18bb50..00000000 --- a/Examples/InvertingAmplifier/D.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL D1N750 D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ Bv=8.1 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=880.5E-18 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib b/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib index d481b436..a7152dcd 100644 --- a/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib +++ b/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib @@ -1,15 +1,32 @@ EESchema-LIBRARY Version 2.3 #encoding utf-8 # +# DC +# +DEF DC v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "DC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 w +X - 2 0 -450 300 U 50 50 1 1 w +ENDDRAW +ENDDEF +# # GND # DEF GND #PWR 0 0 Y Y 1 F P F0 "#PWR" 0 -250 50 H I C CNN F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N X GND 1 0 0 0 D 50 50 1 1 W N ENDDRAW ENDDEF @@ -32,18 +49,23 @@ X ~ 2 200 50 50 L 60 60 1 1 P ENDDRAW ENDDEF # -# UA741 +# lm_741 # -DEF UA741 X 0 40 Y Y 1 F N -F0 "X" 150 0 60 H V C CNN -F1 "UA741" 250 -150 60 H V C CNN +DEF lm_741 X 0 40 Y Y 1 F N +F0 "X" -200 0 60 H V C CNN +F1 "lm_741" -100 -250 60 H V C CNN F2 "" 0 0 60 H V C CNN F3 "" 0 0 60 H V C CNN DRAW -P 4 0 1 0 0 150 0 -150 350 0 0 150 N -X + 1 -200 100 200 R 50 50 1 1 I -X - 2 -200 -100 200 R 50 50 1 1 I -X ~ 3 550 0 200 L 50 50 1 1 O +P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N +X off_null 1 -50 400 200 D 50 38 1 1 I +X inv 2 -550 150 200 R 50 38 1 1 I +X non_inv 3 -550 -100 200 R 50 38 1 1 I +X v_neg 4 -150 -450 200 U 50 38 1 1 I +X off_null 5 50 350 200 D 50 38 1 1 I +X out 6 550 0 200 L 50 38 1 1 O +X v_pos 7 -150 450 200 D 50 38 1 1 I +X NC 8 150 -300 200 U 50 38 1 1 N ENDDRAW ENDDEF # diff --git a/Examples/InvertingAmplifier/InvertingAmplifier-rescue.lib b/Examples/InvertingAmplifier/InvertingAmplifier-rescue.lib new file mode 100644 index 00000000..5a3a50c1 --- /dev/null +++ b/Examples/InvertingAmplifier/InvertingAmplifier-rescue.lib @@ -0,0 +1,19 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# UA741-RESCUE-InvertingAmplifier +# +DEF UA741-RESCUE-InvertingAmplifier X 0 40 Y Y 1 F N +F0 "X" 150 0 60 H V C CNN +F1 "UA741-RESCUE-InvertingAmplifier" 250 -150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 0 150 0 -150 350 0 0 150 N +X + 1 -200 100 200 R 50 50 1 1 I +X - 2 -200 -100 200 R 50 50 1 1 I +X ~ 3 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/Examples/InvertingAmplifier/InvertingAmplifier.cir b/Examples/InvertingAmplifier/InvertingAmplifier.cir index 9ae92083..4bfc2197 100644 --- a/Examples/InvertingAmplifier/InvertingAmplifier.cir +++ b/Examples/InvertingAmplifier/InvertingAmplifier.cir @@ -1,18 +1,20 @@ -* /home/fossee/UpdatedExamples/InvertingAmplifier/InvertingAmplifier.cir +* /home/saurabh/Desktop/eSim/Examples/InvertingAmplifier/InvertingAmplifier.cir -* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar 3 22:37:06 2016 +* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Mar 27 17:44:01 2020 * To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N * To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 * Sheet Name: / -X1 Net-_R4-Pad1_ Net-_R1-Pad2_ out UA741 R1 in Net-_R1-Pad2_ 1k -R2 Net-_R1-Pad2_ out 5k +R3 Net-_R1-Pad2_ out 5k v1 in GND sine -R3 out GND 1k -R4 Net-_R4-Pad1_ GND 1k +R4 out GND 1k +R2 Net-_R2-Pad1_ GND 1k U1 in plot_v1 U2 out plot_v1 +v3 Net-_X1-Pad7_ GND 12 +v2 GND Net-_X1-Pad4_ 12 +X1 ? Net-_R1-Pad2_ Net-_R2-Pad1_ Net-_X1-Pad4_ ? out Net-_X1-Pad7_ ? lm_741 .end diff --git a/Examples/InvertingAmplifier/InvertingAmplifier.cir.out b/Examples/InvertingAmplifier/InvertingAmplifier.cir.out index 0437c978..21ea666c 100644 --- a/Examples/InvertingAmplifier/InvertingAmplifier.cir.out +++ b/Examples/InvertingAmplifier/InvertingAmplifier.cir.out @@ -1,15 +1,17 @@ -* /home/fossee/updatedexamples/invertingamplifier/invertingamplifier.cir +* /home/saurabh/desktop/esim/examples/invertingamplifier/invertingamplifier.cir -.include ua741.sub -x1 net-_r4-pad1_ net-_r1-pad2_ out ua741 +.include lm_741.sub r1 in net-_r1-pad2_ 1k -r2 net-_r1-pad2_ out 5k +r3 net-_r1-pad2_ out 5k v1 in gnd sine(0 2 50 0 0) -r3 out gnd 1k -r4 net-_r4-pad1_ gnd 1k +r4 out gnd 1k +r2 net-_r2-pad1_ gnd 1k * u1 in plot_v1 * u2 out plot_v1 -.tran 10e-03 100e-03 0e-03 +v3 net-_x1-pad7_ gnd 12 +v2 gnd net-_x1-pad4_ 12 +x1 ? net-_r1-pad2_ net-_r2-pad1_ net-_x1-pad4_ ? out net-_x1-pad7_ ? lm_741 +.tran 1e-03 100e-03 0e-03 * Control Statements .control diff --git a/Examples/InvertingAmplifier/InvertingAmplifier.pro b/Examples/InvertingAmplifier/InvertingAmplifier.pro index 55c43b89..53f08b39 100644 --- a/Examples/InvertingAmplifier/InvertingAmplifier.pro +++ b/Examples/InvertingAmplifier/InvertingAmplifier.pro @@ -1,4 +1,4 @@ -update=Wed Mar 11 16:36:50 2020 +update=Fri Mar 27 17:42:30 2020 version=1 last_client=eeschema [general] @@ -31,39 +31,40 @@ NetIExt=net version=1 LibDir= [eeschema/libraries] -LibName1=eSim_Analog -LibName2=eSim_Devices -LibName3=eSim_Digital -LibName4=eSim_Hybrid -LibName5=eSim_Miscellaneous -LibName6=eSim_Plot -LibName7=eSim_Power -LibName8=eSim_Sources -LibName9=eSim_Subckt -LibName10=eSim_User -LibName11=adc-dac -LibName12=memory -LibName13=xilinx -LibName14=microcontrollers -LibName15=dsp -LibName16=microchip -LibName17=analog_switches -LibName18=motorola -LibName19=texas -LibName20=intel -LibName21=audio -LibName22=interface -LibName23=digital-audio -LibName24=philips -LibName25=display -LibName26=cypress -LibName27=siliconi -LibName28=opto -LibName29=atmel -LibName30=contrib -LibName31=power -LibName32=transistors -LibName33=conn -LibName34=regul -LibName35=74xx -LibName36=cmos4000 +LibName1=InvertingAmplifier-rescue +LibName2=eSim_Analog +LibName3=eSim_Devices +LibName4=eSim_Digital +LibName5=eSim_Hybrid +LibName6=eSim_Miscellaneous +LibName7=eSim_Plot +LibName8=eSim_Power +LibName9=eSim_Sources +LibName10=eSim_Subckt +LibName11=eSim_User +LibName12=adc-dac +LibName13=memory +LibName14=xilinx +LibName15=microcontrollers +LibName16=dsp +LibName17=microchip +LibName18=analog_switches +LibName19=motorola +LibName20=texas +LibName21=intel +LibName22=audio +LibName23=interface +LibName24=digital-audio +LibName25=philips +LibName26=display +LibName27=cypress +LibName28=siliconi +LibName29=opto +LibName30=atmel +LibName31=contrib +LibName32=power +LibName33=transistors +LibName34=conn +LibName35=regul +LibName36=74xx +LibName37=cmos4000 diff --git a/Examples/InvertingAmplifier/InvertingAmplifier.sch b/Examples/InvertingAmplifier/InvertingAmplifier.sch index 8eb7ed7c..2047e755 100644 --- a/Examples/InvertingAmplifier/InvertingAmplifier.sch +++ b/Examples/InvertingAmplifier/InvertingAmplifier.sch @@ -1,4 +1,5 @@ EESchema Schematic File Version 2 +LIBS:InvertingAmplifier-rescue LIBS:eSim_Analog LIBS:eSim_Devices LIBS:eSim_Digital @@ -30,10 +31,8 @@ LIBS:opto LIBS:atmel LIBS:contrib LIBS:power -LIBS:device LIBS:transistors LIBS:conn -LIBS:linear LIBS:regul LIBS:74xx LIBS:cmos4000 @@ -53,19 +52,8 @@ Comment3 "" Comment4 "" $EndDescr $Comp -L UA741 X1 -U 1 1 56A88D40 -P 6000 3400 -F 0 "X1" H 6150 3400 60 0000 C CNN -F 1 "UA741" H 6250 3250 60 0000 C CNN -F 2 "" H 6000 3400 60 0000 C CNN -F 3 "" H 6000 3400 60 0000 C CNN - 1 6000 3400 - 1 0 0 1 -$EndComp -$Comp L R R1 -U 1 1 56A88DB5 +U 1 1 5E7DEECC P 5250 3350 F 0 "R1" H 5300 3480 50 0000 C CNN F 1 "1k" H 5300 3400 50 0000 C CNN @@ -75,10 +63,10 @@ F 3 "" V 5300 3400 30 0000 C CNN 1 0 0 -1 $EndComp $Comp -L R R2 -U 1 1 56A88DD8 +L R R3 +U 1 1 5E7DEECD P 6100 2850 -F 0 "R2" H 6150 2980 50 0000 C CNN +F 0 "R3" H 6150 2980 50 0000 C CNN F 1 "5k" H 6150 2900 50 0000 C CNN F 2 "" H 6150 2830 30 0000 C CNN F 3 "" V 6150 2900 30 0000 C CNN @@ -87,7 +75,7 @@ F 3 "" V 6150 2900 30 0000 C CNN $EndComp $Comp L sine v1 -U 1 1 56A88E30 +U 1 1 5E7DEECE P 4850 3750 F 0 "v1" H 4650 3850 60 0000 C CNN F 1 "sine" H 4650 3700 60 0000 C CNN @@ -98,18 +86,18 @@ F 3 "" H 4850 3750 60 0000 C CNN $EndComp $Comp L GND #PWR01 -U 1 1 56A88EC6 -P 5600 3850 -F 0 "#PWR01" H 5600 3600 50 0001 C CNN -F 1 "GND" H 5600 3700 50 0000 C CNN -F 2 "" H 5600 3850 50 0000 C CNN -F 3 "" H 5600 3850 50 0000 C CNN - 1 5600 3850 +U 1 1 5E7DEECF +P 5600 3900 +F 0 "#PWR01" H 5600 3650 50 0001 C CNN +F 1 "GND" H 5600 3750 50 0000 C CNN +F 2 "" H 5600 3900 50 0000 C CNN +F 3 "" H 5600 3900 50 0000 C CNN + 1 5600 3900 1 0 0 -1 $EndComp $Comp L GND #PWR02 -U 1 1 56A88F10 +U 1 1 5E7DEED0 P 4850 4200 F 0 "#PWR02" H 4850 3950 50 0001 C CNN F 1 "GND" H 4850 4050 50 0000 C CNN @@ -118,74 +106,46 @@ F 3 "" H 4850 4200 50 0000 C CNN 1 4850 4200 1 0 0 -1 $EndComp -Wire Wire Line - 4850 3300 5150 3300 -Wire Wire Line - 5450 3300 5800 3300 -Wire Wire Line - 6000 2800 5650 2800 -Wire Wire Line - 5650 2800 5650 3300 -Connection ~ 5650 3300 -Wire Wire Line - 6550 3400 6900 3400 -Wire Wire Line - 6700 3400 6700 2800 -Wire Wire Line - 6700 2800 6300 2800 Text GLabel 4900 3150 0 60 Input ~ 0 in -Wire Wire Line - 4900 3150 4950 3150 -Wire Wire Line - 4950 3100 4950 3300 -Connection ~ 4950 3300 -Connection ~ 6700 3400 $Comp -L R R3 -U 1 1 56A890CA -P 7000 3450 -F 0 "R3" H 7050 3580 50 0000 C CNN -F 1 "1k" H 7050 3500 50 0000 C CNN -F 2 "" H 7050 3430 30 0000 C CNN -F 3 "" V 7050 3500 30 0000 C CNN - 1 7000 3450 +L R R4 +U 1 1 5E7DEED1 +P 7550 3500 +F 0 "R4" H 7600 3630 50 0000 C CNN +F 1 "1k" H 7600 3550 50 0000 C CNN +F 2 "" H 7600 3480 30 0000 C CNN +F 3 "" V 7600 3550 30 0000 C CNN + 1 7550 3500 1 0 0 -1 $EndComp $Comp L GND #PWR03 -U 1 1 56A89129 -P 7200 3400 -F 0 "#PWR03" H 7200 3150 50 0001 C CNN -F 1 "GND" H 7200 3250 50 0000 C CNN -F 2 "" H 7200 3400 50 0000 C CNN -F 3 "" H 7200 3400 50 0000 C CNN - 1 7200 3400 +U 1 1 5E7DEED2 +P 7750 3450 +F 0 "#PWR03" H 7750 3200 50 0001 C CNN +F 1 "GND" H 7750 3300 50 0000 C CNN +F 2 "" H 7750 3450 50 0000 C CNN +F 3 "" H 7750 3450 50 0000 C CNN + 1 7750 3450 1 0 0 -1 $EndComp -Text GLabel 6950 3250 2 60 Input ~ 0 +Text GLabel 7500 3300 2 60 Input ~ 0 out -Wire Wire Line - 6850 3150 6850 3400 -Connection ~ 6850 3400 $Comp -L R R4 -U 1 1 56A891BE -P 5550 3650 -F 0 "R4" H 5600 3780 50 0000 C CNN -F 1 "1k" H 5600 3700 50 0000 C CNN -F 2 "" H 5600 3630 30 0000 C CNN -F 3 "" V 5600 3700 30 0000 C CNN - 1 5550 3650 +L R R2 +U 1 1 5E7DEED3 +P 5550 3700 +F 0 "R2" H 5600 3830 50 0000 C CNN +F 1 "1k" H 5600 3750 50 0000 C CNN +F 2 "" H 5600 3680 30 0000 C CNN +F 3 "" V 5600 3750 30 0000 C CNN + 1 5550 3700 0 1 1 0 $EndComp -Wire Wire Line - 5800 3500 5600 3500 -Wire Wire Line - 5600 3500 5600 3550 $Comp L plot_v1 U1 -U 1 1 56D45D15 +U 1 1 5E7DEED4 P 4950 3300 F 0 "U1" H 4950 3800 60 0000 C CNN F 1 "plot_v1" H 5150 3650 60 0000 C CNN @@ -196,17 +156,110 @@ F 3 "" H 4950 3300 60 0000 C CNN $EndComp $Comp L plot_v1 U2 -U 1 1 56D45D99 -P 6850 3350 -F 0 "U2" H 6850 3850 60 0000 C CNN -F 1 "plot_v1" H 7050 3700 60 0000 C CNN -F 2 "" H 6850 3350 60 0000 C CNN -F 3 "" H 6850 3350 60 0000 C CNN - 1 6850 3350 +U 1 1 5E7DEED5 +P 7400 3400 +F 0 "U2" H 7400 3900 60 0000 C CNN +F 1 "plot_v1" H 7600 3750 60 0000 C CNN +F 2 "" H 7400 3400 60 0000 C CNN +F 3 "" H 7400 3400 60 0000 C CNN + 1 7400 3400 + 1 0 0 -1 +$EndComp +$Comp +L DC v3 +U 1 1 5E7DEED6 +P 6750 2350 +F 0 "v3" H 6550 2450 60 0000 C CNN +F 1 "12" H 6550 2300 60 0000 C CNN +F 2 "R1" H 6450 2350 60 0000 C CNN +F 3 "" H 6750 2350 60 0000 C CNN + 1 6750 2350 + 0 -1 -1 0 +$EndComp +$Comp +L GND #PWR04 +U 1 1 5E7DEED7 +P 7200 2550 +F 0 "#PWR04" H 7200 2300 50 0001 C CNN +F 1 "GND" H 7200 2400 50 0000 C CNN +F 2 "" H 7200 2550 50 0001 C CNN +F 3 "" H 7200 2550 50 0001 C CNN + 1 7200 2550 1 0 0 -1 $EndComp +$Comp +L DC v2 +U 1 1 5E7DEED8 +P 6650 4100 +F 0 "v2" H 6450 4200 60 0000 C CNN +F 1 "12" H 6450 4050 60 0000 C CNN +F 2 "R1" H 6350 4100 60 0000 C CNN +F 3 "" H 6650 4100 60 0000 C CNN + 1 6650 4100 + 0 1 -1 0 +$EndComp +$Comp +L GND #PWR05 +U 1 1 5E7DEED9 +P 7250 4100 +F 0 "#PWR05" H 7250 3850 50 0001 C CNN +F 1 "GND" H 7250 3950 50 0000 C CNN +F 2 "" H 7250 4100 50 0001 C CNN +F 3 "" H 7250 4100 50 0001 C CNN + 1 7250 4100 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 4850 3300 5150 3300 +Wire Wire Line + 5450 3300 5800 3300 +Wire Wire Line + 6000 2800 5650 2800 +Wire Wire Line + 5650 2800 5650 3300 +Connection ~ 5650 3300 +Wire Wire Line + 6900 3450 7450 3450 +Wire Wire Line + 6300 2800 7050 2800 +Wire Wire Line + 4900 3150 4950 3150 +Wire Wire Line + 4950 3100 4950 3300 +Connection ~ 4950 3300 Wire Wire Line - 6950 3250 6850 3250 -Connection ~ 6850 3250 + 7400 3200 7400 3450 +Connection ~ 7400 3450 +Wire Wire Line + 5800 3550 5600 3550 +Wire Wire Line + 5600 3550 5600 3600 +Wire Wire Line + 7500 3300 7400 3300 +Connection ~ 7400 3300 Connection ~ 4950 3150 +Wire Wire Line + 7200 2550 7200 2350 +Wire Wire Line + 7100 4100 7250 4100 +$Comp +L lm_741 X1 +U 1 1 5E7DEEDA +P 6350 3450 +F 0 "X1" H 6150 3450 60 0000 C CNN +F 1 "lm_741" H 6250 3200 60 0000 C CNN +F 2 "" H 6350 3450 60 0000 C CNN +F 3 "" H 6350 3450 60 0000 C CNN + 1 6350 3450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7050 2800 7050 3450 +Connection ~ 7050 3450 +Wire Wire Line + 6300 2350 6200 2350 +Wire Wire Line + 6200 2350 6200 3000 +Wire Wire Line + 6200 3900 6200 4100 $EndSCHEMATC diff --git a/Examples/InvertingAmplifier/InvertingAmplifier_Previous_Values.xml b/Examples/InvertingAmplifier/InvertingAmplifier_Previous_Values.xml index 8c7b2d97..9207f2c8 100644 --- a/Examples/InvertingAmplifier/InvertingAmplifier_Previous_Values.xml +++ b/Examples/InvertingAmplifier/InvertingAmplifier_Previous_Values.xml @@ -1 +1 @@ -<KicadtoNgspice><source><v1 name="Source type">sine<field1 name="Offset Value">0</field1><field2 name="Amplitude">2</field2><field3 name="Frequency">50</field3><field4 name="Delay Time">0</field4><field5 name="Damping Factor">0</field5></v1></source><model /><devicemodel /><subcircuit><x1><field>/home/fossee/esim-updated/eSim/src/SubcircuitLibrary/ua741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file +<KicadtoNgspice><source><v1 name="Source type">sine<field1 name="Offset Value">0</field1><field2 name="Amplitude">2</field2><field3 name="Frequency">50</field3><field4 name="Delay Time">0</field4><field5 name="Damping Factor">0</field5></v1><v3 name="Source type">12</v3><v2 name="Source type">12</v2></source><model /><devicemodel /><subcircuit><x1><field>/home/saurabh/Desktop/eSim-2.0/library/SubcircuitLibrary/lm_741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">1</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/NPN.lib b/Examples/InvertingAmplifier/NPN.lib new file mode 100644 index 00000000..6509fe7a --- /dev/null +++ b/Examples/InvertingAmplifier/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p ++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/Examples/InvertingAmplifier/PNP.lib b/Examples/InvertingAmplifier/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/Examples/InvertingAmplifier/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/Examples/InvertingAmplifier/analysis b/Examples/InvertingAmplifier/analysis index 660a46cc..32436d42 100644 --- a/Examples/InvertingAmplifier/analysis +++ b/Examples/InvertingAmplifier/analysis @@ -1 +1 @@ -.tran 10e-03 100e-03 0e-03
\ No newline at end of file +.tran 1e-03 100e-03 0e-03
\ No newline at end of file diff --git a/library/SubcircuitLibrary/ua741/ua741-cache.lib b/Examples/InvertingAmplifier/lm_741-cache.lib index a330f429..32e31aa1 100644 --- a/library/SubcircuitLibrary/ua741/ua741-cache.lib +++ b/Examples/InvertingAmplifier/lm_741-cache.lib @@ -1,19 +1,6 @@ EESchema-LIBRARY Version 2.3 #encoding utf-8 # -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# # PORT # DEF PORT U 0 40 Y Y 26 F N @@ -54,38 +41,6 @@ X ~ 26 250 0 100 L 30 30 26 1 B ENDDRAW ENDDEF # -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 75 50 H I C CNN -F1 "PWR_FLAG" 0 150 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -X pwr 1 0 0 0 U 50 50 0 0 w -P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" 0 150 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# # eSim_C # DEF eSim_C C 0 10 N Y 1 F N @@ -105,6 +60,44 @@ X ~ 2 0 -150 110 U 40 40 1 1 P ENDDRAW ENDDEF # +# eSim_NPN-RESCUE-lm_741 +# +DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# +# eSim_PNP-RESCUE-lm_741 +# +DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# # eSim_R # DEF eSim_R R 0 0 N Y 1 F N diff --git a/Examples/InvertingAmplifier/lm_741-rescue.lib b/Examples/InvertingAmplifier/lm_741-rescue.lib new file mode 100644 index 00000000..1ac4cbd4 --- /dev/null +++ b/Examples/InvertingAmplifier/lm_741-rescue.lib @@ -0,0 +1,42 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# eSim_NPN-RESCUE-lm_741 +# +DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# +# eSim_PNP-RESCUE-lm_741 +# +DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 C +X B 2 -200 0 225 R 50 50 1 1 I +X E 3 100 -200 100 U 50 50 1 1 E +ENDDRAW +ENDDEF +# +#End Library diff --git a/Examples/InvertingAmplifier/lm_741.cir b/Examples/InvertingAmplifier/lm_741.cir new file mode 100644 index 00000000..4a5917ea --- /dev/null +++ b/Examples/InvertingAmplifier/lm_741.cir @@ -0,0 +1,43 @@ +* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN +Q2 Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN +Q6 Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP +Q5 Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP +Q3 Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN +Q4 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q9 Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q8 Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN +Q7 Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN +R1 Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k +R2 Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k +R3 Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k +Q12 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN +Q13 Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN +R4 Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k +R11 Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k +Q10 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q11 Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP +Q14 Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN +R8 Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k +R7 Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30p +Q16 Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN +Q15 Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN +R5 Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k +R6 Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50 +Q17 Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN +Q18 Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN +Q20 Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN +R9 Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25 +R10 Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50 +Q19 Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP +U1 Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT + +.end diff --git a/Examples/InvertingAmplifier/lm_741.cir.out b/Examples/InvertingAmplifier/lm_741.cir.out new file mode 100644 index 00000000..a00bd86a --- /dev/null +++ b/Examples/InvertingAmplifier/lm_741.cir.out @@ -0,0 +1,46 @@ +* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir + +.include npn_1.lib +.include pnp_1.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1 +q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1 +q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1 +q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1 +q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1 +q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1 +q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1 +r1 net-_q7-pad3_ net-_q12-pad3_ 1k +r2 net-_q3-pad3_ net-_q12-pad3_ 50k +r3 net-_q8-pad3_ net-_q12-pad3_ 1k +q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1 +q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1 +r4 net-_q13-pad3_ net-_q12-pad3_ 5k +r11 net-_q10-pad1_ net-_q12-pad1_ 39k +q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1 +r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k +r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k +c1 net-_c1-pad1_ net-_c1-pad2_ 30p +q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1 +q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1 +r5 net-_q15-pad2_ net-_q12-pad3_ 50k +r6 net-_q15-pad3_ net-_q12-pad3_ 50 +q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1 +q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1 +q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1 +r9 net-_q18-pad3_ net-_q20-pad3_ 25 +r10 net-_q20-pad3_ net-_q19-pad3_ 50 +q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1 +* u1 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/Examples/InvertingAmplifier/lm_741.pro b/Examples/InvertingAmplifier/lm_741.pro new file mode 100644 index 00000000..ea47a221 --- /dev/null +++ b/Examples/InvertingAmplifier/lm_741.pro @@ -0,0 +1,45 @@ +update=Fri Mar 20 14:12:34 2020 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=lm_741-rescue +LibName2=power +LibName3=eSim_Analog +LibName4=eSim_Devices +LibName5=eSim_Digital +LibName6=eSim_Hybrid +LibName7=eSim_Miscellaneous +LibName8=eSim_Plot +LibName9=eSim_Power +LibName10=eSim_User +LibName11=eSim_Sources +LibName12=eSim_Subckt diff --git a/Examples/InvertingAmplifier/lm_741.sch b/Examples/InvertingAmplifier/lm_741.sch new file mode 100644 index 00000000..698b434e --- /dev/null +++ b/Examples/InvertingAmplifier/lm_741.sch @@ -0,0 +1,697 @@ +EESchema Schematic File Version 2 +LIBS:lm_741-rescue +LIBS:power +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Plot +LIBS:eSim_Power +LIBS:eSim_User +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:lm_741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_NPN-RESCUE-lm_741 Q1 +U 1 1 5CE90A7B +P 2650 2700 +F 0 "Q1" H 2550 2750 50 0000 R CNN +F 1 "eSim_NPN" H 2600 2850 50 0000 R CNN +F 2 "" H 2850 2800 29 0000 C CNN +F 3 "" H 2650 2700 60 0000 C CNN + 1 2650 2700 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN-RESCUE-lm_741 Q2 +U 1 1 5CE90A7C +P 4300 2700 +F 0 "Q2" H 4200 2750 50 0000 R CNN +F 1 "eSim_NPN" H 4250 2850 50 0000 R CNN +F 2 "" H 4500 2800 29 0000 C CNN +F 3 "" H 4300 2700 60 0000 C CNN + 1 4300 2700 + -1 0 0 -1 +$EndComp +$Comp +L eSim_PNP-RESCUE-lm_741 Q6 +U 1 1 5CE90A7D +P 3000 3200 +F 0 "Q6" H 2900 3250 50 0000 R CNN +F 1 "eSim_PNP" H 2950 3350 50 0000 R CNN +F 2 "" H 3200 3300 29 0000 C CNN +F 3 "" H 3000 3200 60 0000 C CNN + 1 3000 3200 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP-RESCUE-lm_741 Q5 +U 1 1 5CE90A7E +P 3950 3200 +F 0 "Q5" H 3850 3250 50 0000 R CNN +F 1 "eSim_PNP" H 3900 3350 50 0000 R CNN +F 2 "" H 4150 3300 29 0000 C CNN +F 3 "" H 3950 3200 60 0000 C CNN + 1 3950 3200 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN-RESCUE-lm_741 Q3 +U 1 1 5CE90A7F +P 3300 4000 +F 0 "Q3" H 3200 4050 50 0000 R CNN +F 1 "eSim_NPN" H 3250 4150 50 0000 R CNN +F 2 "" H 3500 4100 29 0000 C CNN +F 3 "" H 3300 4000 60 0000 C CNN + 1 3300 4000 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP-RESCUE-lm_741 Q4 +U 1 1 5CE90A80 +P 3850 2000 +F 0 "Q4" H 3750 2050 50 0000 R CNN +F 1 "eSim_PNP" H 3800 2150 50 0000 R CNN +F 2 "" H 4050 2100 29 0000 C CNN +F 3 "" H 3850 2000 60 0000 C CNN + 1 3850 2000 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP-RESCUE-lm_741 Q9 +U 1 1 5CE90A81 +P 5200 2000 +F 0 "Q9" H 5100 2050 50 0000 R CNN +F 1 "eSim_PNP" H 5150 2150 50 0000 R CNN +F 2 "" H 5400 2100 29 0000 C CNN +F 3 "" H 5200 2000 60 0000 C CNN + 1 5200 2000 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN-RESCUE-lm_741 Q8 +U 1 1 5CE90A82 +P 3950 4600 +F 0 "Q8" H 3850 4650 50 0000 R CNN +F 1 "eSim_NPN" H 3900 4750 50 0000 R CNN +F 2 "" H 4150 4700 29 0000 C CNN +F 3 "" H 3950 4600 60 0000 C CNN + 1 3950 4600 + 1 0 0 -1 +$EndComp +$Comp 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+NoConn ~ 9100 6050 +$EndSCHEMATC diff --git a/Examples/InvertingAmplifier/lm_741.sub b/Examples/InvertingAmplifier/lm_741.sub new file mode 100644 index 00000000..fa8d27b1 --- /dev/null +++ b/Examples/InvertingAmplifier/lm_741.sub @@ -0,0 +1,40 @@ +* Subcircuit lm_741 +.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? +* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir +.include npn_1.lib +.include pnp_1.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1 +q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1 +q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1 +q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1 +q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1 +q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1 +q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1 +q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1 +r1 net-_q7-pad3_ net-_q12-pad3_ 1k +r2 net-_q3-pad3_ net-_q12-pad3_ 50k +r3 net-_q8-pad3_ net-_q12-pad3_ 1k +q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1 +q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1 +r4 net-_q13-pad3_ net-_q12-pad3_ 5k +r11 net-_q10-pad1_ net-_q12-pad1_ 39k +q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1 +q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1 +r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k +r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k +c1 net-_c1-pad1_ net-_c1-pad2_ 30p +q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1 +q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1 +r5 net-_q15-pad2_ net-_q12-pad3_ 50k +r6 net-_q15-pad3_ net-_q12-pad3_ 50 +q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1 +q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1 +q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1 +r9 net-_q18-pad3_ net-_q20-pad3_ 25 +r10 net-_q20-pad3_ net-_q19-pad3_ 50 +q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1 +* Control Statements + +.ends lm_741
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/lm_741_Previous_Values.xml b/Examples/InvertingAmplifier/lm_741_Previous_Values.xml new file mode 100644 index 00000000..b61322bb --- /dev/null +++ b/Examples/InvertingAmplifier/lm_741_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><q1><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q1><q20><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q20><q3><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q3><q2><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q2><q5><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q5><q4><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q4><q7><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q7><q6><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q6><q9><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q9><q8><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q8><q15><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q15><q14><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q14><q17><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q17><q16><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q16><q11><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q11><q10><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q10><q13><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q13><q12><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q12><q19><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q19><q18><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q18></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/npn_1.lib b/Examples/InvertingAmplifier/npn_1.lib new file mode 100644 index 00000000..a1818ed8 --- /dev/null +++ b/Examples/InvertingAmplifier/npn_1.lib @@ -0,0 +1,29 @@ +.model npn_1 NPN( ++ Vtf=1.7 ++ Cjc=0.5p ++ Nc=2 ++ Tr=46.91n ++ Ne=1.307 ++ Cje=0.5p ++ Isc=0 ++ Xtb=1.5 ++ Rb=500 ++ Rc=1 ++ Tf=411.1p ++ Xti=3 ++ Ikr=0 ++ Bf=125 ++ Fc=.5 ++ Ise=14.34f ++ Br=6.092 ++ Ikf=.2847 ++ Mje=.377 ++ Mjc=.3416 ++ Vaf=74.03 ++ Vjc=.75 ++ Vje=.75 ++ Xtf=3 ++ Itf=.6 ++ Is=14.34f ++ Eg=1.11 +)
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/pnp_1.lib b/Examples/InvertingAmplifier/pnp_1.lib new file mode 100644 index 00000000..a4ee06da --- /dev/null +++ b/Examples/InvertingAmplifier/pnp_1.lib @@ -0,0 +1,29 @@ +.model pnp_1 PNP( ++ Vtf=1.7 ++ Cjc=1.5p ++ Nc=2 ++ Tr=46.91n ++ Ne=1.307 ++ Cje=0.3p ++ Isc=0 ++ Xtb=1.5 ++ Rb=250 ++ Rc=1 ++ Tf=411.1p ++ Xti=3 ++ Ikr=0 ++ Bf=25 ++ Fc=.5 ++ Ise=14.34f ++ Br=6.092 ++ Ikf=.2847 ++ Mje=.377 ++ Mjc=.3416 ++ Vaf=74.03 ++ Vjc=.75 ++ Vje=.75 ++ Xtf=3 ++ Itf=.6 ++ Is=14.34f ++ Eg=1.11 +)
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/ua741.cir b/Examples/InvertingAmplifier/ua741.cir deleted file mode 100644 index de797429..00000000 --- a/Examples/InvertingAmplifier/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/Examples/InvertingAmplifier/ua741.cir.out b/Examples/InvertingAmplifier/ua741.cir.out deleted file mode 100644 index 72e68514..00000000 --- a/Examples/InvertingAmplifier/ua741.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -* u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -.ac lin 0 0Hz 0Hz - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/InvertingAmplifier/ua741.pro b/Examples/InvertingAmplifier/ua741.pro deleted file mode 100644 index c7b1d67b..00000000 --- a/Examples/InvertingAmplifier/ua741.pro +++ /dev/null @@ -1,17 +0,0 @@ -update=Wed Mar 18 14:21:29 2020 -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/FreeEDA/library -[eeschema/libraries] -LibName1=power -LibName2=eSim_Devices -LibName3=eSim_User -LibName4=eSim_Subckt -LibName5=eSim_Sources -LibName6=eSim_Power -LibName7=eSim_Plot -LibName8=eSim_Miscellaneous -LibName9=eSim_Hybrid -LibName10=eSim_Digital -LibName11=eSim_Analog diff --git a/Examples/InvertingAmplifier/ua741.sch b/Examples/InvertingAmplifier/ua741.sch deleted file mode 100644 index b06dcc17..00000000 --- a/Examples/InvertingAmplifier/ua741.sch +++ /dev/null @@ -1,229 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:power -LIBS:eSim_Devices -LIBS:eSim_User -LIBS:eSim_Subckt -LIBS:eSim_Sources -LIBS:eSim_Power -LIBS:eSim_Plot -LIBS:eSim_Miscellaneous -LIBS:eSim_Hybrid -LIBS:eSim_Digital -LIBS:eSim_Analog -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN -F 2 "" H 6250 2500 60 0001 C CNN -F 3 "" H 6250 2500 60 0001 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN -F 2 "" H 2300 3100 60 0001 C CNN -F 3 "" H 2300 3100 60 0001 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN -F 2 "" H 2250 2600 60 0001 C CNN -F 3 "" H 2250 2600 60 0001 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG1" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN -F 2 "" H 3450 3200 60 0001 C CNN -F 3 "" H 3450 3200 60 0001 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN -F 2 "" H 5200 2900 60 0001 C CNN -F 3 "" H 5200 2900 60 0001 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR1" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN -F 2 "" H 3700 3400 60 0001 C CNN -F 3 "" H 3700 3400 60 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN -F 2 "" H 3650 2850 60 0001 C CNN -F 3 "" H 3650 2850 60 0001 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -Text Notes 2600 2900 0 60 ~ 0 -2e6\n -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3000 4550 3300 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5400 2500 -Wire Wire Line - 5700 2500 6000 2500 -$Comp -L resistor Rin1 -U 1 1 5E71E232 -P 2950 2900 -F 0 "Rin1" H 3000 3030 50 0000 C CNN -F 1 "2e6" H 3000 2850 50 0000 C CNN -F 2 "" H 3000 2880 30 0000 C CNN -F 3 "" V 3000 2950 30 0000 C CNN - 1 2950 2900 - 0 1 1 0 -$EndComp -Wire Wire Line - 3000 2600 3000 2800 -$Comp -L resistor Rbw1 -U 1 1 5E71E326 -P 4050 2100 -F 0 "Rbw1" H 4100 2230 50 0000 C CNN -F 1 "0.5e6" H 4100 2050 50 0000 C CNN -F 2 "" H 4100 2080 30 0000 C CNN -F 3 "" V 4100 2150 30 0000 C CNN - 1 4050 2100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3900 2500 3900 2050 -Wire Wire Line - 3900 2050 3950 2050 -Wire Wire Line - 4250 2050 4400 2050 -Wire Wire Line - 4400 2050 4400 2500 -$Comp -L capacitor Cbw1 -U 1 1 5E71E45C -P 4550 2850 -F 0 "Cbw1" H 4575 2950 50 0000 L CNN -F 1 "31.85e-9" H 4575 2750 50 0000 L CNN -F 2 "" H 4588 2700 30 0000 C CNN -F 3 "" H 4550 2850 60 0000 C CNN - 1 4550 2850 - 1 0 0 -1 -$EndComp -$Comp -L resistor Rout1 -U 1 1 5E71E59C -P 5500 2250 -F 0 "Rout1" H 5550 2380 50 0000 C CNN -F 1 "75" H 5550 2200 50 0000 C CNN -F 2 "" H 5550 2230 30 0000 C CNN -F 3 "" V 5550 2300 30 0000 C CNN - 1 5500 2250 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5400 2500 5400 2200 -Wire Wire Line - 5700 2200 5700 2500 -$EndSCHEMATC diff --git a/Examples/InvertingAmplifier/ua741.sub b/Examples/InvertingAmplifier/ua741.sub deleted file mode 100644 index ad26c001..00000000 --- a/Examples/InvertingAmplifier/ua741.sub +++ /dev/null @@ -1,12 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -* Control Statements - -.ends ua741
\ No newline at end of file diff --git a/library/SubcircuitLibrary/ua741/analysis b/library/SubcircuitLibrary/ua741/analysis deleted file mode 100644 index 52ccc5ec..00000000 --- a/library/SubcircuitLibrary/ua741/analysis +++ /dev/null @@ -1 +0,0 @@ -.ac lin 0 0Hz 0Hz
\ No newline at end of file diff --git a/library/SubcircuitLibrary/ua741/ua741.cir b/library/SubcircuitLibrary/ua741/ua741.cir deleted file mode 100644 index de797429..00000000 --- a/library/SubcircuitLibrary/ua741/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/library/SubcircuitLibrary/ua741/ua741.cir.out b/library/SubcircuitLibrary/ua741/ua741.cir.out deleted file mode 100644 index 72e68514..00000000 --- a/library/SubcircuitLibrary/ua741/ua741.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -* u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -.ac lin 0 0Hz 0Hz - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/library/SubcircuitLibrary/ua741/ua741.pro b/library/SubcircuitLibrary/ua741/ua741.pro deleted file mode 100644 index c7b1d67b..00000000 --- a/library/SubcircuitLibrary/ua741/ua741.pro +++ /dev/null @@ -1,17 +0,0 @@ -update=Wed Mar 18 14:21:29 2020 -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/FreeEDA/library -[eeschema/libraries] -LibName1=power -LibName2=eSim_Devices -LibName3=eSim_User -LibName4=eSim_Subckt -LibName5=eSim_Sources -LibName6=eSim_Power -LibName7=eSim_Plot -LibName8=eSim_Miscellaneous -LibName9=eSim_Hybrid -LibName10=eSim_Digital -LibName11=eSim_Analog diff --git a/library/SubcircuitLibrary/ua741/ua741.sch b/library/SubcircuitLibrary/ua741/ua741.sch deleted file mode 100644 index b06dcc17..00000000 --- a/library/SubcircuitLibrary/ua741/ua741.sch +++ /dev/null @@ -1,229 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:power -LIBS:eSim_Devices -LIBS:eSim_User -LIBS:eSim_Subckt -LIBS:eSim_Sources -LIBS:eSim_Power -LIBS:eSim_Plot -LIBS:eSim_Miscellaneous -LIBS:eSim_Hybrid -LIBS:eSim_Digital -LIBS:eSim_Analog -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN -F 2 "" H 6250 2500 60 0001 C CNN -F 3 "" H 6250 2500 60 0001 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN -F 2 "" H 2300 3100 60 0001 C CNN -F 3 "" H 2300 3100 60 0001 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN -F 2 "" H 2250 2600 60 0001 C CNN -F 3 "" H 2250 2600 60 0001 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG1" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN -F 2 "" H 3450 3200 60 0001 C CNN -F 3 "" H 3450 3200 60 0001 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN -F 2 "" H 5200 2900 60 0001 C CNN -F 3 "" H 5200 2900 60 0001 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR1" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN -F 2 "" H 3700 3400 60 0001 C CNN -F 3 "" H 3700 3400 60 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN -F 2 "" H 3650 2850 60 0001 C CNN -F 3 "" H 3650 2850 60 0001 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -Text Notes 2600 2900 0 60 ~ 0 -2e6\n -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3000 4550 3300 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5400 2500 -Wire Wire Line - 5700 2500 6000 2500 -$Comp -L resistor Rin1 -U 1 1 5E71E232 -P 2950 2900 -F 0 "Rin1" H 3000 3030 50 0000 C CNN -F 1 "2e6" H 3000 2850 50 0000 C CNN -F 2 "" H 3000 2880 30 0000 C CNN -F 3 "" V 3000 2950 30 0000 C CNN - 1 2950 2900 - 0 1 1 0 -$EndComp -Wire Wire Line - 3000 2600 3000 2800 -$Comp -L resistor Rbw1 -U 1 1 5E71E326 -P 4050 2100 -F 0 "Rbw1" H 4100 2230 50 0000 C CNN -F 1 "0.5e6" H 4100 2050 50 0000 C CNN -F 2 "" H 4100 2080 30 0000 C CNN -F 3 "" V 4100 2150 30 0000 C CNN - 1 4050 2100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3900 2500 3900 2050 -Wire Wire Line - 3900 2050 3950 2050 -Wire Wire Line - 4250 2050 4400 2050 -Wire Wire Line - 4400 2050 4400 2500 -$Comp -L capacitor Cbw1 -U 1 1 5E71E45C -P 4550 2850 -F 0 "Cbw1" H 4575 2950 50 0000 L CNN -F 1 "31.85e-9" H 4575 2750 50 0000 L CNN -F 2 "" H 4588 2700 30 0000 C CNN -F 3 "" H 4550 2850 60 0000 C CNN - 1 4550 2850 - 1 0 0 -1 -$EndComp -$Comp -L resistor Rout1 -U 1 1 5E71E59C -P 5500 2250 -F 0 "Rout1" H 5550 2380 50 0000 C CNN -F 1 "75" H 5550 2200 50 0000 C CNN -F 2 "" H 5550 2230 30 0000 C CNN -F 3 "" V 5550 2300 30 0000 C CNN - 1 5500 2250 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5400 2500 5400 2200 -Wire Wire Line - 5700 2200 5700 2500 -$EndSCHEMATC diff --git a/library/SubcircuitLibrary/ua741/ua741.sub b/library/SubcircuitLibrary/ua741/ua741.sub deleted file mode 100644 index ad26c001..00000000 --- a/library/SubcircuitLibrary/ua741/ua741.sub +++ /dev/null @@ -1,12 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -* Control Statements - -.ends ua741
\ No newline at end of file diff --git a/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib b/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib index 0151b65f..a84f0727 100644 --- a/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib +++ b/library/kicadLibrary/kicad_eSim-Library/eSim_Subckt.lib @@ -487,21 +487,6 @@ X G 3 -350 -400 150 R 60 60 1 1 I ENDDRAW ENDDEF # -# UA741 -# -DEF UA741 X 0 40 Y Y 1 F N -F0 "X" 150 0 60 H V C CNN -F1 "UA741" 250 -150 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -P 4 0 1 0 0 150 0 -150 350 0 0 150 N -X + 1 -200 100 200 R 50 50 1 1 I -X - 2 -200 -100 200 R 50 50 1 1 I -X ~ 3 550 0 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# # UJT # DEF UJT X 0 40 Y Y 1 F N |