diff options
| author | Sumanto Kar | 2023-07-24 14:18:49 +0530 |
|---|---|---|
| committer | GitHub | 2023-07-24 14:18:49 +0530 |
| commit | 6ed8da81610585fc6780dd610857415a06ae643b (patch) | |
| tree | a3e0ca86e086d14a9b0c3bea1608c1f801a7a991 | |
| parent | 373add9a93e4c51c4f654ccd493ccb385af158b1 (diff) | |
| parent | 2c21cbd5a422108f43f523f86a6fcb26e823acc1 (diff) | |
| download | eSim-6ed8da81610585fc6780dd610857415a06ae643b.tar.gz eSim-6ed8da81610585fc6780dd610857415a06ae643b.tar.bz2 eSim-6ed8da81610585fc6780dd610857415a06ae643b.zip | |
Merge pull request #263 from Eyantra698Sumanto/master
Subckt files for different ICs by Hrittika Ghosh
112 files changed, 9514 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823-cache.lib b/library/SubcircuitLibrary/IC_INA823/IC_INA823-cache.lib new file mode 100644 index 00000000..752774e2 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823-cache.lib @@ -0,0 +1,83 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir new file mode 100644 index 00000000..1d8856ac --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir @@ -0,0 +1,20 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_INA823\IC_INA823.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 02/19/23 23:14:06
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X2 ? Net-_R1-Pad1_ Net-_U1-Pad1_ V- ? Net-_R1-Pad2_ V+ ? lm_741
+X1 ? Net-_R2-Pad1_ Net-_U1-Pad4_ V- ? Net-_R2-Pad2_ V+ ? lm_741
+X3 ? Net-_R4-Pad2_ Net-_R3-Pad2_ V- ? Net-_R6-Pad2_ V+ ? lm_741
+R2 Net-_R2-Pad1_ Net-_R2-Pad2_ 50k
+R1 Net-_R1-Pad1_ Net-_R1-Pad2_ 50k
+R4 Net-_R1-Pad2_ Net-_R4-Pad2_ 50k
+R3 Net-_R2-Pad2_ Net-_R3-Pad2_ 50k
+R6 Net-_R4-Pad2_ Net-_R6-Pad2_ 50k
+R5 Net-_R3-Pad2_ Net-_R5-Pad2_ 50k
+U1 Net-_U1-Pad1_ Net-_R1-Pad1_ Net-_R2-Pad1_ Net-_U1-Pad4_ V+ Net-_R5-Pad2_ V- Net-_R6-Pad2_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir.out b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir.out new file mode 100644 index 00000000..bccc31c2 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir.out @@ -0,0 +1,22 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_ina823\ic_ina823.cir
+
+.include lm_741.sub
+x2 ? net-_r1-pad1_ net-_u1-pad1_ v- ? net-_r1-pad2_ v+ ? lm_741
+x1 ? net-_r2-pad1_ net-_u1-pad4_ v- ? net-_r2-pad2_ v+ ? lm_741
+x3 ? net-_r4-pad2_ net-_r3-pad2_ v- ? net-_r6-pad2_ v+ ? lm_741
+r2 net-_r2-pad1_ net-_r2-pad2_ 50k
+r1 net-_r1-pad1_ net-_r1-pad2_ 50k
+r4 net-_r1-pad2_ net-_r4-pad2_ 50k
+r3 net-_r2-pad2_ net-_r3-pad2_ 50k
+r6 net-_r4-pad2_ net-_r6-pad2_ 50k
+r5 net-_r3-pad2_ net-_r5-pad2_ 50k
+* u1 net-_u1-pad1_ net-_r1-pad1_ net-_r2-pad1_ net-_u1-pad4_ v+ net-_r5-pad2_ v- net-_r6-pad2_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.pro b/library/SubcircuitLibrary/IC_INA823/IC_INA823.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.sch b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sch new file mode 100644 index 00000000..b1e3e9c5 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sch @@ -0,0 +1,347 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:IC_INA823-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L lm_741 X2
+U 1 1 63E9DF0B
+P 3150 1850
+F 0 "X2" H 2950 1850 60 0000 C CNN
+F 1 "lm_741" H 3050 1600 60 0000 C CNN
+F 2 "" H 3150 1850 60 0000 C CNN
+F 3 "" H 3150 1850 60 0000 C CNN
+ 1 3150 1850
+ 1 0 0 1
+$EndComp
+$Comp
+L lm_741 X1
+U 1 1 63E9DF38
+P 3100 3750
+F 0 "X1" H 2900 3750 60 0000 C CNN
+F 1 "lm_741" H 3000 3500 60 0000 C CNN
+F 2 "" H 3100 3750 60 0000 C CNN
+F 3 "" H 3100 3750 60 0000 C CNN
+ 1 3100 3750
+ 1 0 0 -1
+$EndComp
+$Comp
+L lm_741 X3
+U 1 1 63E9F328
+P 4850 2800
+F 0 "X3" H 4650 2800 60 0000 C CNN
+F 1 "lm_741" H 4750 2550 60 0000 C CNN
+F 2 "" H 4850 2800 60 0000 C CNN
+F 3 "" H 4850 2800 60 0000 C CNN
+ 1 4850 2800
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R2
+U 1 1 63E9F389
+P 3000 3050
+F 0 "R2" H 3050 3180 50 0000 C CNN
+F 1 "50k" H 3050 3000 50 0000 C CNN
+F 2 "" H 3050 3030 30 0000 C CNN
+F 3 "" V 3050 3100 30 0000 C CNN
+ 1 3000 3050
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R1
+U 1 1 63E9F3B0
+P 3000 2650
+F 0 "R1" H 3050 2780 50 0000 C CNN
+F 1 "50k" H 3050 2600 50 0000 C CNN
+F 2 "" H 3050 2630 30 0000 C CNN
+F 3 "" V 3050 2700 30 0000 C CNN
+ 1 3000 2650
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2050 2000 2600 2000
+Wire Wire Line
+ 2550 2000 2550 2600
+Wire Wire Line
+ 2550 2600 2900 2600
+Wire Wire Line
+ 3200 2600 3750 2600
+Wire Wire Line
+ 3750 2600 3750 1850
+Wire Wire Line
+ 3700 1850 3950 1850
+Wire Wire Line
+ 2900 3000 2500 3000
+Wire Wire Line
+ 2500 3000 2500 3600
+Wire Wire Line
+ 2050 3600 2550 3600
+Wire Wire Line
+ 3200 3000 3650 3000
+Wire Wire Line
+ 3650 3000 3650 3750
+$Comp
+L resistor R4
+U 1 1 63E9F453
+P 4050 1900
+F 0 "R4" H 4100 2030 50 0000 C CNN
+F 1 "50k" H 4100 1850 50 0000 C CNN
+F 2 "" H 4100 1880 30 0000 C CNN
+F 3 "" V 4100 1950 30 0000 C CNN
+ 1 4050 1900
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R3
+U 1 1 63E9F476
+P 3950 3800
+F 0 "R3" H 4000 3930 50 0000 C CNN
+F 1 "50k" H 4000 3750 50 0000 C CNN
+F 2 "" H 4000 3780 30 0000 C CNN
+F 3 "" V 4000 3850 30 0000 C CNN
+ 1 3950 3800
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R6
+U 1 1 63E9F4AD
+P 4750 1900
+F 0 "R6" H 4800 2030 50 0000 C CNN
+F 1 "50k" H 4800 1850 50 0000 C CNN
+F 2 "" H 4800 1880 30 0000 C CNN
+F 3 "" V 4800 1950 30 0000 C CNN
+ 1 4750 1900
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R5
+U 1 1 63E9F4D4
+P 4650 3800
+F 0 "R5" H 4700 3930 50 0000 C CNN
+F 1 "50k" H 4700 3750 50 0000 C CNN
+F 2 "" H 4700 3780 30 0000 C CNN
+F 3 "" V 4700 3850 30 0000 C CNN
+ 1 4650 3800
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4300 2650 4300 1850
+Wire Wire Line
+ 4250 1850 4650 1850
+Wire Wire Line
+ 3650 3750 3850 3750
+Connection ~ 3750 1850
+Connection ~ 4300 1850
+Wire Wire Line
+ 4550 3750 4150 3750
+Wire Wire Line
+ 4300 2900 4300 3750
+Connection ~ 4300 3750
+Wire Wire Line
+ 4950 1850 5400 1850
+Wire Wire Line
+ 5400 1850 5400 2800
+$Comp
+L PORT U1
+U 3 1 63E9F7D3
+P 1800 3600
+F 0 "U1" H 1850 3700 30 0000 C CNN
+F 1 "PORT" H 1800 3600 30 0000 C CNN
+F 2 "" H 1800 3600 60 0000 C CNN
+F 3 "" H 1800 3600 60 0000 C CNN
+ 3 1800 3600
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 63E9F7FE
+P 1800 3900
+F 0 "U1" H 1850 4000 30 0000 C CNN
+F 1 "PORT" H 1800 3900 30 0000 C CNN
+F 2 "" H 1800 3900 60 0000 C CNN
+F 3 "" H 1800 3900 60 0000 C CNN
+ 4 1800 3900
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 63E9FB83
+P 1800 2000
+F 0 "U1" H 1850 2100 30 0000 C CNN
+F 1 "PORT" H 1800 2000 30 0000 C CNN
+F 2 "" H 1800 2000 60 0000 C CNN
+F 3 "" H 1800 2000 60 0000 C CNN
+ 2 1800 2000
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 1 1 63E9FBC2
+P 1800 1750
+F 0 "U1" H 1850 1850 30 0000 C CNN
+F 1 "PORT" H 1800 1750 30 0000 C CNN
+F 2 "" H 1800 1750 60 0000 C CNN
+F 3 "" H 1800 1750 60 0000 C CNN
+ 1 1800 1750
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2050 1750 2600 1750
+Connection ~ 2550 2000
+Connection ~ 2500 3600
+Wire Wire Line
+ 2050 3900 2550 3900
+Wire Wire Line
+ 2550 3900 2550 3850
+$Comp
+L PORT U1
+U 5 1 63E9FD93
+P 3950 1450
+F 0 "U1" H 4000 1550 30 0000 C CNN
+F 1 "PORT" H 3950 1450 30 0000 C CNN
+F 2 "" H 3950 1450 60 0000 C CNN
+F 3 "" H 3950 1450 60 0000 C CNN
+ 5 3950 1450
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 7 1 63E9FDEE
+P 5250 1450
+F 0 "U1" H 5300 1550 30 0000 C CNN
+F 1 "PORT" H 5250 1450 30 0000 C CNN
+F 2 "" H 5250 1450 60 0000 C CNN
+F 3 "" H 5250 1450 60 0000 C CNN
+ 7 5250 1450
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 63E9FF0C
+P 5500 3750
+F 0 "U1" H 5550 3850 30 0000 C CNN
+F 1 "PORT" H 5500 3750 30 0000 C CNN
+F 2 "" H 5500 3750 60 0000 C CNN
+F 3 "" H 5500 3750 60 0000 C CNN
+ 6 5500 3750
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 8 1 63E9FF8B
+P 5950 2800
+F 0 "U1" H 6000 2900 30 0000 C CNN
+F 1 "PORT" H 5950 2800 30 0000 C CNN
+F 2 "" H 5950 2800 60 0000 C CNN
+F 3 "" H 5950 2800 60 0000 C CNN
+ 8 5950 2800
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 4850 3750 5250 3750
+Wire Wire Line
+ 5400 2800 5700 2800
+Text GLabel 4200 1200 0 60 Input ~ 0
+V+
+Text GLabel 4950 1200 2 60 Input ~ 0
+V-
+Wire Wire Line
+ 4200 1200 4350 1200
+Wire Wire Line
+ 4350 1200 4350 1450
+Connection ~ 4350 1450
+Wire Wire Line
+ 4950 1200 4850 1200
+Wire Wire Line
+ 4850 1200 4850 1450
+Connection ~ 4850 1450
+Text GLabel 3300 3250 2 60 Input ~ 0
+V+
+Text GLabel 3300 2450 2 60 Input ~ 0
+V+
+Text GLabel 4950 2200 2 60 Input ~ 0
+V+
+Text GLabel 3300 4350 2 60 Input ~ 0
+V-
+Text GLabel 3200 1150 2 60 Input ~ 0
+V-
+Text GLabel 4950 3400 2 60 Input ~ 0
+V-
+Wire Wire Line
+ 3200 1150 3000 1150
+Wire Wire Line
+ 3000 1150 3000 1400
+Wire Wire Line
+ 3300 2450 3000 2450
+Wire Wire Line
+ 3000 2450 3000 2300
+Wire Wire Line
+ 3300 3250 2950 3250
+Wire Wire Line
+ 2950 3250 2950 3300
+Wire Wire Line
+ 4950 2200 4700 2200
+Wire Wire Line
+ 4700 2200 4700 2350
+Wire Wire Line
+ 4950 3400 4700 3400
+Wire Wire Line
+ 4700 3400 4700 3250
+Wire Wire Line
+ 3300 4350 2950 4350
+Wire Wire Line
+ 2950 4350 2950 4200
+Wire Wire Line
+ 4350 1450 4200 1450
+Wire Wire Line
+ 4850 1450 5000 1450
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.sub b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sub new file mode 100644 index 00000000..51efa4c5 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sub @@ -0,0 +1,16 @@ +* Subcircuit IC_INA823
+.subckt IC_INA823 net-_u1-pad1_ net-_r1-pad1_ net-_r2-pad1_ net-_u1-pad4_ v+ net-_r5-pad2_ v- net-_r6-pad2_
+* c:\fossee\esim\library\subcircuitlibrary\ic_ina823\ic_ina823.cir
+.include lm_741.sub
+x2 ? net-_r1-pad1_ net-_u1-pad1_ v- ? net-_r1-pad2_ v+ ? lm_741
+x1 ? net-_r2-pad1_ net-_u1-pad4_ v- ? net-_r2-pad2_ v+ ? lm_741
+x3 ? net-_r4-pad2_ net-_r3-pad2_ v- ? net-_r6-pad2_ v+ ? lm_741
+r2 net-_r2-pad1_ net-_r2-pad2_ 50k
+r1 net-_r1-pad1_ net-_r1-pad2_ 50k
+r4 net-_r1-pad2_ net-_r4-pad2_ 50k
+r3 net-_r2-pad2_ net-_r3-pad2_ 50k
+r6 net-_r4-pad2_ net-_r6-pad2_ 50k
+r5 net-_r3-pad2_ net-_r5-pad2_ 50k
+* Control Statements
+
+.ends IC_INA823
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823_Previous_Values.xml b/library/SubcircuitLibrary/IC_INA823/IC_INA823_Previous_Values.xml new file mode 100644 index 00000000..f9d4a087 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel /><subcircuit><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x2><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x1><x3><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x3></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_INA823/NPN.lib b/library/SubcircuitLibrary/IC_INA823/NPN.lib new file mode 100644 index 00000000..7f2f0319 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_INA823/PNP.lib b/library/SubcircuitLibrary/IC_INA823/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_INA823/README.md b/library/SubcircuitLibrary/IC_INA823/README.md new file mode 100644 index 00000000..5986e65b --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/README.md @@ -0,0 +1,16 @@ + +# IC_INA823 IC + +It is an Instrumentation Amplifier IC. + + +## Documentation + +To know the details of INA823 IC please go through with the documentation : [INA823_datasheet](https://www.ti.com/lit/ds/symlink/ina823.pdf?ts=1690187005232&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FINA823%253Futm_source%253Dgoogle%2526utm_medium%253Dcpc%2526utm_campaign%253Dasc-null-null-GPN_EN-cpc-pf-google-wwe%2526utm_content%253DINA823%2526ds_k%253DINA823%2526DCM%253Dyes%2526gclid%253DCj0KCQjwwvilBhCFARIsADvYi7Kgs0updD5suYrFJ9Sr6wjuR8MVOhSZllX66pKD45ASCclMGW-jHQ8aAr9PEALw_wcB%2526gclsrc%253Daw.ds) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/IC_INA823/analysis b/library/SubcircuitLibrary/IC_INA823/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741-cache.lib b/library/SubcircuitLibrary/IC_INA823/lm_741-cache.lib new file mode 100644 index 00000000..6e908886 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741-cache.lib @@ -0,0 +1,119 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741-rescue.lib b/library/SubcircuitLibrary/IC_INA823/lm_741-rescue.lib new file mode 100644 index 00000000..bf8e4bd7 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741-rescue.lib @@ -0,0 +1,42 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# eSim_NPN-RESCUE-lm_741
+#
+DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP-RESCUE-lm_741
+#
+DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.cir b/library/SubcircuitLibrary/IC_INA823/lm_741.cir new file mode 100644 index 00000000..b7989199 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741.cir @@ -0,0 +1,43 @@ +* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+Q2 Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN
+Q6 Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP
+Q5 Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP
+Q3 Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN
+Q4 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q9 Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q8 Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN
+Q7 Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN
+R1 Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k
+R2 Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k
+R3 Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k
+Q12 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN
+Q13 Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN
+R4 Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k
+R11 Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k
+Q10 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q11 Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q14 Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN
+R8 Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k
+R7 Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30p
+Q16 Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN
+Q15 Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN
+R5 Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k
+R6 Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50
+Q17 Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN
+Q18 Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN
+Q20 Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN
+R9 Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25
+R10 Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50
+Q19 Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP
+U1 Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT
+
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.cir.out b/library/SubcircuitLibrary/IC_INA823/lm_741.cir.out new file mode 100644 index 00000000..01ede7ab --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741.cir.out @@ -0,0 +1,46 @@ +* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* u1 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.pro b/library/SubcircuitLibrary/IC_INA823/lm_741.pro new file mode 100644 index 00000000..222fb5cb --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741.pro @@ -0,0 +1,45 @@ +update=02/07/23 21:24:54
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=lm_741-rescue
+LibName2=power
+LibName3=eSim_Analog
+LibName4=eSim_Devices
+LibName5=eSim_Digital
+LibName6=eSim_Hybrid
+LibName7=eSim_Miscellaneous
+LibName8=eSim_Plot
+LibName9=eSim_Power
+LibName10=eSim_User
+LibName11=eSim_Sources
+LibName12=eSim_Subckt
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.sch b/library/SubcircuitLibrary/IC_INA823/lm_741.sch new file mode 100644 index 00000000..6a74cf22 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741.sch @@ -0,0 +1,697 @@ +EESchema Schematic File Version 2
+LIBS:power
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:lm_741-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 5CE90A7B
+P 2650 2700
+F 0 "Q1" H 2550 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 2600 2850 50 0000 R CNN
+F 2 "" H 2850 2800 29 0000 C CNN
+F 3 "" H 2650 2700 60 0000 C CNN
+ 1 2650 2700
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 5CE90A7C
+P 4300 2700
+F 0 "Q2" H 4200 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 4250 2850 50 0000 R CNN
+F 2 "" H 4500 2800 29 0000 C CNN
+F 3 "" H 4300 2700 60 0000 C CNN
+ 1 4300 2700
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 5CE90A7D
+P 3000 3200
+F 0 "Q6" H 2900 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 2950 3350 50 0000 R CNN
+F 2 "" H 3200 3300 29 0000 C CNN
+F 3 "" H 3000 3200 60 0000 C CNN
+ 1 3000 3200
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 5CE90A7E
+P 3950 3200
+F 0 "Q5" H 3850 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 3900 3350 50 0000 R CNN
+F 2 "" H 4150 3300 29 0000 C CNN
+F 3 "" H 3950 3200 60 0000 C CNN
+ 1 3950 3200
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 5CE90A7F
+P 3300 4000
+F 0 "Q3" H 3200 4050 50 0000 R CNN
+F 1 "eSim_NPN" H 3250 4150 50 0000 R CNN
+F 2 "" H 3500 4100 29 0000 C CNN
+F 3 "" H 3300 4000 60 0000 C CNN
+ 1 3300 4000
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 5CE90A80
+P 3850 2000
+F 0 "Q4" H 3750 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 3800 2150 50 0000 R CNN
+F 2 "" H 4050 2100 29 0000 C CNN
+F 3 "" H 3850 2000 60 0000 C CNN
+ 1 3850 2000
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q9
+U 1 1 5CE90A81
+P 5200 2000
+F 0 "Q9" H 5100 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 5150 2150 50 0000 R CNN
+F 2 "" H 5400 2100 29 0000 C CNN
+F 3 "" H 5200 2000 60 0000 C CNN
+ 1 5200 2000
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 5CE90A82
+P 3950 4600
+F 0 "Q8" H 3850 4650 50 0000 R CNN
+F 1 "eSim_NPN" H 3900 4750 50 0000 R CNN
+F 2 "" H 4150 4700 29 0000 C CNN
+F 3 "" H 3950 4600 60 0000 C CNN
+ 1 3950 4600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 5CE90A83
+P 3000 4600
+F 0 "Q7" H 2900 4650 50 0000 R CNN
+F 1 "eSim_NPN" H 2950 4750 50 0000 R CNN
+F 2 "" H 3200 4700 29 0000 C CNN
+F 3 "" H 3000 4600 60 0000 C CNN
+ 1 3000 4600
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_R R1
+U 1 1 5CE90A84
+P 2850 5200
+F 0 "R1" H 2900 5330 50 0000 C CNN
+F 1 "1k" H 2900 5250 50 0000 C CNN
+F 2 "" H 2900 5180 30 0000 C CNN
+F 3 "" V 2900 5250 30 0000 C CNN
+ 1 2850 5200
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_R R2
+U 1 1 5CE90A85
+P 3550 5200
+F 0 "R2" H 3600 5330 50 0000 C CNN
+F 1 "50k" H 3600 5250 50 0000 C CNN
+F 2 "" H 3600 5180 30 0000 C CNN
+F 3 "" V 3600 5250 30 0000 C CNN
+ 1 3550 5200
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_R R3
+U 1 1 5CE90A86
+P 4000 5200
+F 0 "R3" H 4050 5330 50 0000 C CNN
+F 1 "1k" H 4050 5250 50 0000 C CNN
+F 2 "" H 4050 5180 30 0000 C CNN
+F 3 "" V 4050 5250 30 0000 C CNN
+ 1 4000 5200
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_NPN Q12
+U 1 1 5CE90A87
+P 6300 4700
+F 0 "Q12" H 6200 4750 50 0000 R CNN
+F 1 "eSim_NPN" H 6250 4850 50 0000 R CNN
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
+L PORT U1
+U 3 1 5CE90A9B
+P 1900 1200
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+$Comp
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+$EndComp
+$Comp
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+$EndComp
+$Comp
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+$Comp
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+Connection ~ 4200 2000
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diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.sub b/library/SubcircuitLibrary/IC_INA823/lm_741.sub new file mode 100644 index 00000000..4e4feca4 --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741.sub @@ -0,0 +1,40 @@ +* Subcircuit lm_741
+.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ?
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* Control Statements
+
+.ends lm_741
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/IC_INA823/lm_741_Previous_Values.xml new file mode 100644 index 00000000..228572ce --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/lm_741_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><q1><field /></q1><q2><field /></q2><q6><field /></q6><q5><field /></q5><q3><field /></q3><q4><field /></q4><q9><field /></q9><q8><field /></q8><q7><field /></q7><q12><field /></q12><q13><field /></q13><q10><field /></q10><q11><field /></q11><q14><field /></q14><q16><field /></q16><q15><field /></q15><q17><field /></q17><q18><field /></q18><q20><field /></q20><q19><field /></q19></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_INA823/npn_1.lib b/library/SubcircuitLibrary/IC_INA823/npn_1.lib new file mode 100644 index 00000000..4a863e3e --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/npn_1.lib @@ -0,0 +1,29 @@ +.model npn_1 NPN(
++ Vtf=1.7
++ Cjc=0.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.5p
++ Isc=0
++ Xtb=1.5
++ Rb=500
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=125
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+)
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_INA823/pnp_1.lib b/library/SubcircuitLibrary/IC_INA823/pnp_1.lib new file mode 100644 index 00000000..c486429f --- /dev/null +++ b/library/SubcircuitLibrary/IC_INA823/pnp_1.lib @@ -0,0 +1,29 @@ +.model pnp_1 PNP(
++ Vtf=1.7
++ Cjc=1.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.3p
++ Isc=0
++ Xtb=1.5
++ Rb=250
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=25
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+)
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM386/D.lib b/library/SubcircuitLibrary/IC_LM386/D.lib new file mode 100644 index 00000000..513550fa --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/IC_LM386/IC_LM386-cache.lib b/library/SubcircuitLibrary/IC_LM386/IC_LM386-cache.lib new file mode 100644 index 00000000..6184ddb3 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/IC_LM386-cache.lib @@ -0,0 +1,126 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_LM386/IC_LM386.cir b/library/SubcircuitLibrary/IC_LM386/IC_LM386.cir new file mode 100644 index 00000000..762a03ee --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/IC_LM386.cir @@ -0,0 +1,30 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_LM386\IC_LM386.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/29/23 12:44:35
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+R1 Net-_Q9-Pad1_ Net-_R1-Pad2_ 15k
+R2 Net-_R1-Pad2_ Net-_Q2-Pad3_ 15k
+R3 Net-_Q2-Pad3_ Net-_R3-Pad2_ 150
+R4 Net-_R3-Pad2_ Net-_Q5-Pad3_ 1.35k
+R5 Net-_Q5-Pad3_ Net-_D1-Pad2_ 15k
+Q2 Net-_Q2-Pad1_ Net-_Q1-Pad3_ Net-_Q2-Pad3_ eSim_PNP
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_PNP
+Q5 Net-_Q4-Pad1_ Net-_Q5-Pad2_ Net-_Q5-Pad3_ eSim_PNP
+Q6 Net-_Q1-Pad1_ Net-_Q6-Pad2_ Net-_Q5-Pad2_ eSim_PNP
+Q3 Net-_Q2-Pad1_ Net-_Q2-Pad1_ Net-_Q1-Pad1_ eSim_NPN
+Q4 Net-_Q4-Pad1_ Net-_Q2-Pad1_ Net-_Q1-Pad1_ eSim_NPN
+D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode
+D2 Net-_D1-Pad2_ Net-_D2-Pad2_ eSim_Diode
+Q7 Net-_D2-Pad2_ Net-_Q4-Pad1_ Net-_Q1-Pad1_ eSim_NPN
+Q8 Net-_Q10-Pad2_ Net-_D2-Pad2_ Net-_D1-Pad2_ eSim_PNP
+Q9 Net-_Q9-Pad1_ Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_NPN
+Q10 Net-_D1-Pad2_ Net-_Q10-Pad2_ Net-_Q1-Pad1_ eSim_NPN
+R6 Net-_Q6-Pad2_ Net-_Q1-Pad1_ 50k
+R7 Net-_Q9-Pad1_ Net-_D1-Pad1_ 5k
+U1 Net-_Q1-Pad2_ Net-_R1-Pad2_ Net-_R3-Pad2_ Net-_Q5-Pad3_ Net-_Q6-Pad2_ Net-_Q9-Pad1_ Net-_D1-Pad2_ Net-_Q1-Pad1_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/IC_LM386/IC_LM386.cir.out b/library/SubcircuitLibrary/IC_LM386/IC_LM386.cir.out new file mode 100644 index 00000000..8272882b --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/IC_LM386.cir.out @@ -0,0 +1,34 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_lm386\ic_lm386.cir
+
+.include PNP.lib
+.include NPN.lib
+.include D.lib
+r1 net-_q9-pad1_ net-_r1-pad2_ 15k
+r2 net-_r1-pad2_ net-_q2-pad3_ 15k
+r3 net-_q2-pad3_ net-_r3-pad2_ 150
+r4 net-_r3-pad2_ net-_q5-pad3_ 1.35k
+r5 net-_q5-pad3_ net-_d1-pad2_ 15k
+q2 net-_q2-pad1_ net-_q1-pad3_ net-_q2-pad3_ Q2N2907A
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A
+q5 net-_q4-pad1_ net-_q5-pad2_ net-_q5-pad3_ Q2N2907A
+q6 net-_q1-pad1_ net-_q6-pad2_ net-_q5-pad2_ Q2N2907A
+q3 net-_q2-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+q4 net-_q4-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad2_ net-_d2-pad2_ 1N4148
+q7 net-_d2-pad2_ net-_q4-pad1_ net-_q1-pad1_ Q2N2222
+q8 net-_q10-pad2_ net-_d2-pad2_ net-_d1-pad2_ Q2N2907A
+q9 net-_q9-pad1_ net-_d1-pad1_ net-_d1-pad2_ Q2N2222
+q10 net-_d1-pad2_ net-_q10-pad2_ net-_q1-pad1_ Q2N2222
+r6 net-_q6-pad2_ net-_q1-pad1_ 50k
+r7 net-_q9-pad1_ net-_d1-pad1_ 5k
+* u1 net-_q1-pad2_ net-_r1-pad2_ net-_r3-pad2_ net-_q5-pad3_ net-_q6-pad2_ net-_q9-pad1_ net-_d1-pad2_ net-_q1-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_LM386/IC_LM386.pro b/library/SubcircuitLibrary/IC_LM386/IC_LM386.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/IC_LM386.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/IC_LM386/IC_LM386.sch b/library/SubcircuitLibrary/IC_LM386/IC_LM386.sch new file mode 100644 index 00000000..664462a4 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/IC_LM386.sch @@ -0,0 +1,463 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:IC_LM386-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L resistor R1
+U 1 1 641FE287
+P 4300 3050
+F 0 "R1" H 4350 3180 50 0000 C CNN
+F 1 "15k" H 4350 3000 50 0000 C CNN
+F 2 "" H 4350 3030 30 0000 C CNN
+F 3 "" V 4350 3100 30 0000 C CNN
+ 1 4300 3050
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R2
+U 1 1 641FE2A0
+P 4300 3550
+F 0 "R2" H 4350 3680 50 0000 C CNN
+F 1 "15k" H 4350 3500 50 0000 C CNN
+F 2 "" H 4350 3530 30 0000 C CNN
+F 3 "" V 4350 3600 30 0000 C CNN
+ 1 4300 3550
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R3
+U 1 1 641FE2C1
+P 4600 4050
+F 0 "R3" H 4650 4180 50 0000 C CNN
+F 1 "150" H 4650 4000 50 0000 C CNN
+F 2 "" H 4650 4030 30 0000 C CNN
+F 3 "" V 4650 4100 30 0000 C CNN
+ 1 4600 4050
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R4
+U 1 1 641FE2E0
+P 5150 4050
+F 0 "R4" H 5200 4180 50 0000 C CNN
+F 1 "1.35k" H 5200 4000 50 0000 C CNN
+F 2 "" H 5200 4030 30 0000 C CNN
+F 3 "" V 5200 4100 30 0000 C CNN
+ 1 5150 4050
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R5
+U 1 1 641FE3C5
+P 6250 4050
+F 0 "R5" H 6300 4180 50 0000 C CNN
+F 1 "15k" H 6300 4000 50 0000 C CNN
+F 2 "" H 6300 4030 30 0000 C CNN
+F 3 "" V 6300 4100 30 0000 C CNN
+ 1 6250 4050
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q2
+U 1 1 641FE3EC
+P 4250 4450
+F 0 "Q2" H 4150 4500 50 0000 R CNN
+F 1 "eSim_PNP" H 4200 4600 50 0000 R CNN
+F 2 "" H 4450 4550 29 0000 C CNN
+F 3 "" H 4250 4450 60 0000 C CNN
+ 1 4250 4450
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q1
+U 1 1 641FE423
+P 3700 4850
+F 0 "Q1" H 3600 4900 50 0000 R CNN
+F 1 "eSim_PNP" H 3650 5000 50 0000 R CNN
+F 2 "" H 3900 4950 29 0000 C CNN
+F 3 "" H 3700 4850 60 0000 C CNN
+ 1 3700 4850
+ 1 0 0 1
+$EndComp
+$Comp
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+U 1 1 641FE44A
+P 5650 4450
+F 0 "Q5" H 5550 4500 50 0000 R CNN
+F 1 "eSim_PNP" H 5600 4600 50 0000 R CNN
+F 2 "" H 5850 4550 29 0000 C CNN
+F 3 "" H 5650 4450 60 0000 C CNN
+ 1 5650 4450
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 641FE47B
+P 6150 4850
+F 0 "Q6" H 6050 4900 50 0000 R CNN
+F 1 "eSim_PNP" H 6100 5000 50 0000 R CNN
+F 2 "" H 6350 4950 29 0000 C CNN
+F 3 "" H 6150 4850 60 0000 C CNN
+ 1 6150 4850
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 641FE52E
+P 4450 5600
+F 0 "Q3" H 4350 5650 50 0000 R CNN
+F 1 "eSim_NPN" H 4400 5750 50 0000 R CNN
+F 2 "" H 4650 5700 29 0000 C CNN
+F 3 "" H 4450 5600 60 0000 C CNN
+ 1 4450 5600
+ -1 0 0 -1
+$EndComp
+$Comp
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+U 1 1 641FE561
+P 5450 5600
+F 0 "Q4" H 5350 5650 50 0000 R CNN
+F 1 "eSim_NPN" H 5400 5750 50 0000 R CNN
+F 2 "" H 5650 5700 29 0000 C CNN
+F 3 "" H 5450 5600 60 0000 C CNN
+ 1 5450 5600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D1
+U 1 1 641FE592
+P 7050 3650
+F 0 "D1" H 7050 3750 50 0000 C CNN
+F 1 "eSim_Diode" H 7050 3550 50 0000 C CNN
+F 2 "" H 7050 3650 60 0000 C CNN
+F 3 "" H 7050 3650 60 0000 C CNN
+ 1 7050 3650
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_Diode D2
+U 1 1 641FE5C3
+P 7050 4400
+F 0 "D2" H 7050 4500 50 0000 C CNN
+F 1 "eSim_Diode" H 7050 4300 50 0000 C CNN
+F 2 "" H 7050 4400 60 0000 C CNN
+F 3 "" H 7050 4400 60 0000 C CNN
+ 1 7050 4400
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 6420528C
+P 6950 5600
+F 0 "Q7" H 6850 5650 50 0000 R CNN
+F 1 "eSim_NPN" H 6900 5750 50 0000 R CNN
+F 2 "" H 7150 5700 29 0000 C CNN
+F 3 "" H 6950 5600 60 0000 C CNN
+ 1 6950 5600
+ 1 0 0 -1
+$EndComp
+$Comp
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+U 1 1 642052CF
+P 7400 4800
+F 0 "Q8" H 7300 4850 50 0000 R CNN
+F 1 "eSim_PNP" H 7350 4950 50 0000 R CNN
+F 2 "" H 7600 4900 29 0000 C CNN
+F 3 "" H 7400 4800 60 0000 C CNN
+ 1 7400 4800
+ 1 0 0 1
+$EndComp
+$Comp
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+U 1 1 64205306
+P 7750 3500
+F 0 "Q9" H 7650 3550 50 0000 R CNN
+F 1 "eSim_NPN" H 7700 3650 50 0000 R CNN
+F 2 "" H 7950 3600 29 0000 C CNN
+F 3 "" H 7750 3500 60 0000 C CNN
+ 1 7750 3500
+ 1 0 0 -1
+$EndComp
+$Comp
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+U 1 1 64205357
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+F 0 "Q10" H 7650 5400 50 0000 R CNN
+F 1 "eSim_NPN" H 7700 5500 50 0000 R CNN
+F 2 "" H 7950 5450 29 0000 C CNN
+F 3 "" H 7750 5350 60 0000 C CNN
+ 1 7750 5350
+ 1 0 0 -1
+$EndComp
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 6450 4000 8100 4000
+Wire Wire Line
+ 7050 3800 7050 4250
+Connection ~ 7050 4000
+Connection ~ 4350 4000
+Wire Wire Line
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+Connection ~ 5550 4000
+Wire Wire Line
+ 3800 4650 3800 4450
+Wire Wire Line
+ 3800 4450 4050 4450
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 4350 5150 4750 5150
+Wire Wire Line
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+Connection ~ 4750 5600
+Connection ~ 4350 5150
+Wire Wire Line
+ 3800 5050 3800 6050
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 7850 4500
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 5550 6050
+Wire Wire Line
+ 6050 5050 6050 6050
+Connection ~ 6050 6050
+$Comp
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+U 1 1 64205A0B
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+F 1 "50k" H 6350 5300 50 0000 C CNN
+F 2 "" H 6350 5330 30 0000 C CNN
+F 3 "" V 6350 5400 30 0000 C CNN
+ 1 6300 5350
+ 0 1 1 0
+$EndComp
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 5550 5200
+Wire Wire Line
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+Connection ~ 6350 6050
+$Comp
+L resistor R7
+U 1 1 64205F94
+P 7000 3050
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+F 1 "5k" H 7050 3000 50 0000 C CNN
+F 2 "" H 7050 3030 30 0000 C CNN
+F 3 "" V 7050 3100 30 0000 C CNN
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+ 0 1 1 0
+$EndComp
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 7050 2700
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 7850 4000
+Wire Wire Line
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+Connection ~ 7050 6050
+$Comp
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+U 2 1 64207110
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+F 3 "" H 3850 3350 60 0000 C CNN
+ 2 3850 3350
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+F 3 "" H 3050 4850 60 0000 C CNN
+ 1 3050 4850
+ 1 0 0 -1
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+$Comp
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+P 8350 2700
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+F 1 "PORT" H 8350 2700 30 0000 C CNN
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+F 3 "" H 8350 2700 60 0000 C CNN
+ 6 8350 2700
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 7 1 64207223
+P 8350 4000
+F 0 "U1" H 8400 4100 30 0000 C CNN
+F 1 "PORT" H 8350 4000 30 0000 C CNN
+F 2 "" H 8350 4000 60 0000 C CNN
+F 3 "" H 8350 4000 60 0000 C CNN
+ 7 8350 4000
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 8 1 6420728A
+P 8350 6050
+F 0 "U1" H 8400 6150 30 0000 C CNN
+F 1 "PORT" H 8350 6050 30 0000 C CNN
+F 2 "" H 8350 6050 60 0000 C CNN
+F 3 "" H 8350 6050 60 0000 C CNN
+ 8 8350 6050
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 6420731D
+P 4950 3600
+F 0 "U1" H 5000 3700 30 0000 C CNN
+F 1 "PORT" H 4950 3600 30 0000 C CNN
+F 2 "" H 4950 3600 60 0000 C CNN
+F 3 "" H 4950 3600 60 0000 C CNN
+ 3 4950 3600
+ 0 1 1 0
+$EndComp
+$Comp
+L PORT U1
+U 4 1 6420736E
+P 5550 3600
+F 0 "U1" H 5600 3700 30 0000 C CNN
+F 1 "PORT" H 5550 3600 30 0000 C CNN
+F 2 "" H 5550 3600 60 0000 C CNN
+F 3 "" H 5550 3600 60 0000 C CNN
+ 4 5550 3600
+ 0 1 1 0
+$EndComp
+Connection ~ 7850 6050
+Wire Wire Line
+ 4950 3850 4950 4000
+Connection ~ 4950 4000
+Wire Wire Line
+ 3300 4850 3500 4850
+Wire Wire Line
+ 4100 3350 4350 3350
+Connection ~ 4350 3350
+Connection ~ 7850 2700
+$Comp
+L PORT U1
+U 5 1 6420A0F6
+P 6750 4850
+F 0 "U1" H 6800 4950 30 0000 C CNN
+F 1 "PORT" H 6750 4850 30 0000 C CNN
+F 2 "" H 6750 4850 60 0000 C CNN
+F 3 "" H 6750 4850 60 0000 C CNN
+ 5 6750 4850
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 6500 4850 6350 4850
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/IC_LM386/IC_LM386.sub b/library/SubcircuitLibrary/IC_LM386/IC_LM386.sub new file mode 100644 index 00000000..9de14c5f --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/IC_LM386.sub @@ -0,0 +1,28 @@ +* Subcircuit IC_LM386
+.subckt IC_LM386 net-_q1-pad2_ net-_r1-pad2_ net-_r3-pad2_ net-_q5-pad3_ net-_q6-pad2_ net-_q9-pad1_ net-_d1-pad2_ net-_q1-pad1_
+* c:\fossee\esim\library\subcircuitlibrary\ic_lm386\ic_lm386.cir
+.include PNP.lib
+.include NPN.lib
+.include D.lib
+r1 net-_q9-pad1_ net-_r1-pad2_ 15k
+r2 net-_r1-pad2_ net-_q2-pad3_ 15k
+r3 net-_q2-pad3_ net-_r3-pad2_ 150
+r4 net-_r3-pad2_ net-_q5-pad3_ 1.35k
+r5 net-_q5-pad3_ net-_d1-pad2_ 15k
+q2 net-_q2-pad1_ net-_q1-pad3_ net-_q2-pad3_ Q2N2907A
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A
+q5 net-_q4-pad1_ net-_q5-pad2_ net-_q5-pad3_ Q2N2907A
+q6 net-_q1-pad1_ net-_q6-pad2_ net-_q5-pad2_ Q2N2907A
+q3 net-_q2-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+q4 net-_q4-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad2_ net-_d2-pad2_ 1N4148
+q7 net-_d2-pad2_ net-_q4-pad1_ net-_q1-pad1_ Q2N2222
+q8 net-_q10-pad2_ net-_d2-pad2_ net-_d1-pad2_ Q2N2907A
+q9 net-_q9-pad1_ net-_d1-pad1_ net-_d1-pad2_ Q2N2222
+q10 net-_d1-pad2_ net-_q10-pad2_ net-_q1-pad1_ Q2N2222
+r6 net-_q6-pad2_ net-_q1-pad1_ 50k
+r7 net-_q9-pad1_ net-_d1-pad1_ 5k
+* Control Statements
+
+.ends IC_LM386
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM386/IC_LM386_Previous_Values.xml b/library/SubcircuitLibrary/IC_LM386/IC_LM386_Previous_Values.xml new file mode 100644 index 00000000..5a0ae808 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/IC_LM386_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q2><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q1><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q6><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><d2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q8><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q9><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM386/NPN.lib b/library/SubcircuitLibrary/IC_LM386/NPN.lib new file mode 100644 index 00000000..9c378ed8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_LM386/PNP.lib b/library/SubcircuitLibrary/IC_LM386/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_LM386/README.md b/library/SubcircuitLibrary/IC_LM386/README.md new file mode 100644 index 00000000..88482e8e --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/README.md @@ -0,0 +1,16 @@ + +# IC_LM386 IC + +LM386 is a audio power amplifier IC. + + +## Documentation + +To know the details of LM386 IC please go through with the documentation : [LM386_datasheet](https://www.ti.com/lit/ds/symlink/lm386.pdf?ts=1690187127880&ref_url=https%253A%252F%252Fwww.google.co.in%252F) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/IC_LM386/analysis b/library/SubcircuitLibrary/IC_LM386/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM386/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM397MFX/D.lib b/library/SubcircuitLibrary/IC_LM397MFX/D.lib new file mode 100644 index 00000000..513550fa --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX-cache.lib b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX-cache.lib new file mode 100644 index 00000000..0d415165 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX-cache.lib @@ -0,0 +1,159 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_GND
+#
+DEF eSim_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "eSim_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# eSim_NJF
+#
+DEF eSim_NJF J 0 0 Y N 1 F N
+F0 "J" -100 50 50 H V R CNN
+F1 "eSim_NJF" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS jfet_n
+DRAW
+C 50 0 111 0 1 10 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 3 0 1 0 100 -100 100 -50 10 -50 N
+P 3 0 1 0 100 100 100 55 10 55 N
+P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F
+X D 1 100 200 100 D 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 P
+X S 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.cir b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.cir new file mode 100644 index 00000000..91aa3286 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.cir @@ -0,0 +1,36 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_LM397MFX\IC_LM397MFX.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/20/23 21:50:19
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+J1 Net-_J1-Pad1_ GND Net-_J1-Pad3_ jfet_n
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP
+Q4 Net-_J1-Pad3_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP
+Q5 Net-_Q2-Pad3_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP
+Q8 Net-_D4-Pad1_ Net-_Q1-Pad1_ Net-_Q7-Pad3_ eSim_PNP
+Q7 Net-_D2-Pad1_ Net-_Q1-Pad1_ Net-_Q7-Pad3_ eSim_PNP
+Q10 Net-_Q10-Pad1_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP
+R2 Net-_Q1-Pad1_ Net-_Q1-Pad2_ 2k
+R3 Net-_J1-Pad1_ Net-_Q7-Pad3_ 2.1k
+Q2 Net-_Q1-Pad1_ Net-_J1-Pad3_ Net-_Q2-Pad3_ eSim_NPN
+Q3 Net-_J1-Pad3_ Net-_Q2-Pad3_ GND eSim_NPN
+D2 Net-_D2-Pad1_ Net-_D1-Pad2_ eSim_Diode
+D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode
+Q6 GND Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_PNP
+Q9 Net-_D3-Pad1_ Net-_D1-Pad2_ Net-_Q10-Pad1_ eSim_PNP
+Q12 Net-_Q11-Pad1_ Net-_D4-Pad2_ Net-_Q10-Pad1_ eSim_PNP
+Q13 GND Net-_D5-Pad1_ Net-_D4-Pad2_ eSim_PNP
+D4 Net-_D4-Pad1_ Net-_D4-Pad2_ eSim_Diode
+D5 Net-_D5-Pad1_ Net-_D4-Pad2_ eSim_Diode
+R1 Net-_Q2-Pad3_ GND 4.8k
+Q11 Net-_Q11-Pad1_ Net-_D3-Pad1_ GND eSim_NPN
+D3 Net-_D3-Pad1_ GND eSim_Diode
+Q14 Net-_Q14-Pad1_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP
+Q15 Net-_Q14-Pad1_ Net-_Q11-Pad1_ GND eSim_NPN
+Q16 Net-_Q16-Pad1_ Net-_Q14-Pad1_ GND eSim_NPN
+U1 Net-_J1-Pad1_ Net-_D1-Pad1_ Net-_D5-Pad1_ Net-_Q16-Pad1_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.cir.out b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.cir.out new file mode 100644 index 00000000..9a6fe2e6 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.cir.out @@ -0,0 +1,41 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_lm397mfx\ic_lm397mfx.cir
+
+.include NPN.lib
+.include D.lib
+.include PNP.lib
+.include NJF.lib
+j1 net-_j1-pad1_ gnd net-_j1-pad3_ J2N3819
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A
+q4 net-_j1-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+q5 net-_q2-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+q8 net-_d4-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A
+q7 net-_d2-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A
+q10 net-_q10-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+r2 net-_q1-pad1_ net-_q1-pad2_ 2k
+r3 net-_j1-pad1_ net-_q7-pad3_ 2.1k
+q2 net-_q1-pad1_ net-_j1-pad3_ net-_q2-pad3_ Q2N2222
+q3 net-_j1-pad3_ net-_q2-pad3_ gnd Q2N2222
+d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+q6 gnd net-_d1-pad1_ net-_d1-pad2_ Q2N2907A
+q9 net-_d3-pad1_ net-_d1-pad2_ net-_q10-pad1_ Q2N2907A
+q12 net-_q11-pad1_ net-_d4-pad2_ net-_q10-pad1_ Q2N2907A
+q13 gnd net-_d5-pad1_ net-_d4-pad2_ Q2N2907A
+d4 net-_d4-pad1_ net-_d4-pad2_ 1N4148
+d5 net-_d5-pad1_ net-_d4-pad2_ 1N4148
+r1 net-_q2-pad3_ gnd 4.8k
+q11 net-_q11-pad1_ net-_d3-pad1_ gnd Q2N2222
+d3 net-_d3-pad1_ gnd 1N4148
+q14 net-_q14-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+q15 net-_q14-pad1_ net-_q11-pad1_ gnd Q2N2222
+q16 net-_q16-pad1_ net-_q14-pad1_ gnd Q2N2222
+* u1 net-_j1-pad1_ net-_d1-pad1_ net-_d5-pad1_ net-_q16-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.pro b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
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diff --git a/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.sch b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.sch new file mode 100644 index 00000000..b4e03c45 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.sch @@ -0,0 +1,568 @@ +EESchema Schematic File Version 2
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+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:IC_LM397MFX-cache
+EELAYER 25 0
+EELAYER END
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+encoding utf-8
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diff --git a/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.sub b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.sub new file mode 100644 index 00000000..b5a6248f --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX.sub @@ -0,0 +1,35 @@ +* Subcircuit IC_LM397MFX
+.subckt IC_LM397MFX net-_j1-pad1_ net-_d1-pad1_ net-_d5-pad1_ net-_q16-pad1_
+* c:\fossee\esim\library\subcircuitlibrary\ic_lm397mfx\ic_lm397mfx.cir
+.include NPN.lib
+.include D.lib
+.include PNP.lib
+.include NJF.lib
+j1 net-_j1-pad1_ gnd net-_j1-pad3_ J2N3819
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A
+q4 net-_j1-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+q5 net-_q2-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+q8 net-_d4-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A
+q7 net-_d2-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A
+q10 net-_q10-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+r2 net-_q1-pad1_ net-_q1-pad2_ 2k
+r3 net-_j1-pad1_ net-_q7-pad3_ 2.1k
+q2 net-_q1-pad1_ net-_j1-pad3_ net-_q2-pad3_ Q2N2222
+q3 net-_j1-pad3_ net-_q2-pad3_ gnd Q2N2222
+d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+q6 gnd net-_d1-pad1_ net-_d1-pad2_ Q2N2907A
+q9 net-_d3-pad1_ net-_d1-pad2_ net-_q10-pad1_ Q2N2907A
+q12 net-_q11-pad1_ net-_d4-pad2_ net-_q10-pad1_ Q2N2907A
+q13 gnd net-_d5-pad1_ net-_d4-pad2_ Q2N2907A
+d4 net-_d4-pad1_ net-_d4-pad2_ 1N4148
+d5 net-_d5-pad1_ net-_d4-pad2_ 1N4148
+r1 net-_q2-pad3_ gnd 4.8k
+q11 net-_q11-pad1_ net-_d3-pad1_ gnd Q2N2222
+d3 net-_d3-pad1_ gnd 1N4148
+q14 net-_q14-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A
+q15 net-_q14-pad1_ net-_q11-pad1_ gnd Q2N2222
+q16 net-_q16-pad1_ net-_q14-pad1_ gnd Q2N2222
+* Control Statements
+
+.ends IC_LM397MFX
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX_Previous_Values.xml b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX_Previous_Values.xml new file mode 100644 index 00000000..4d0d8f2a --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/IC_LM397MFX_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><j1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j1><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q1><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q4><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q8><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q7><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q10><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><d2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q6><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q9><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q13><d4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d4><d5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d5><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11><d3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d3><q14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q14><q15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q15><q16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q16></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_LM397MFX/NJF.lib b/library/SubcircuitLibrary/IC_LM397MFX/NJF.lib new file mode 100644 index 00000000..c3af26e8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
++ Af=1)
diff --git a/library/SubcircuitLibrary/IC_LM397MFX/NPN.lib b/library/SubcircuitLibrary/IC_LM397MFX/NPN.lib new file mode 100644 index 00000000..9c378ed8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_LM397MFX/PNP.lib b/library/SubcircuitLibrary/IC_LM397MFX/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_LM397MFX/README.md b/library/SubcircuitLibrary/IC_LM397MFX/README.md new file mode 100644 index 00000000..b2107de0 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/README.md @@ -0,0 +1,16 @@ + +# IC_LM397MFX IC + +LM397MFX is a Single General-Purpose Voltage Comparator IC. + + +## Documentation + +To know the details of LM397MFX IC please go through with the documentation : [LM397MFX_datasheet](https://www.ti.com/lit/ds/symlink/lm397.pdf?ts=1690183083144&ref_url=https%253A%252F%252Fwww.google.com%252F) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/IC_LM397MFX/analysis b/library/SubcircuitLibrary/IC_LM397MFX/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_LM397MFX/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827-cache.lib b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827-cache.lib new file mode 100644 index 00000000..f4bc17ab --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827-cache.lib @@ -0,0 +1,141 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NJF
+#
+DEF eSim_NJF J 0 0 Y N 1 F N
+F0 "J" -100 50 50 H V R CNN
+F1 "eSim_NJF" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS jfet_n
+DRAW
+C 50 0 111 0 1 10 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 3 0 1 0 100 -100 100 -50 10 -50 N
+P 3 0 1 0 100 100 100 55 10 55 N
+P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F
+X D 1 100 200 100 D 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 P
+X S 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir new file mode 100644 index 00000000..f6c752d8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir @@ -0,0 +1,37 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_OPA827\IC_OPA827.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/14/23 18:08:37
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1 Net-_C1-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad3_ eSim_PNP
+Q3 Net-_Q1-Pad2_ Net-_Q1-Pad2_ Net-_J2-Pad3_ eSim_PNP
+Q4 Net-_Q1-Pad2_ Net-_Q1-Pad2_ Net-_J3-Pad1_ eSim_PNP
+Q5 Net-_C2-Pad2_ Net-_Q1-Pad2_ Net-_J4-Pad1_ eSim_PNP
+Q8 Net-_Q7-Pad1_ Net-_Q7-Pad1_ Net-_J1-Pad1_ eSim_PNP
+Q9 Net-_C2-Pad1_ Net-_Q7-Pad1_ Net-_J1-Pad1_ eSim_PNP
+Q2 Net-_C1-Pad1_ Net-_Q10-Pad3_ Net-_Q2-Pad3_ eSim_NPN
+Q6 Net-_C2-Pad2_ Net-_Q10-Pad3_ Net-_Q6-Pad3_ eSim_NPN
+Q7 Net-_Q7-Pad1_ Net-_C1-Pad1_ Net-_Q10-Pad3_ eSim_NPN
+Q10 Net-_C2-Pad1_ Net-_C2-Pad2_ Net-_Q10-Pad3_ eSim_NPN
+Q11 Net-_J1-Pad1_ Net-_C2-Pad1_ Net-_Q11-Pad3_ eSim_NPN
+Q12 Net-_C1-Pad1_ Net-_C2-Pad1_ Net-_Q12-Pad3_ eSim_PNP
+Q13 Net-_J1-Pad1_ Net-_Q12-Pad3_ Net-_Q13-Pad3_ eSim_NPN
+Q14 Net-_C1-Pad1_ Net-_Q11-Pad3_ Net-_Q13-Pad3_ eSim_PNP
+C1 Net-_C1-Pad1_ Net-_C1-Pad1_ 0.1u
+C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 0.1u
+R1 Net-_Q2-Pad3_ Net-_C1-Pad1_ 200
+R2 Net-_Q6-Pad3_ Net-_C1-Pad1_ 200
+U1 Net-_J1-Pad2_ Net-_J1-Pad1_ Net-_J3-Pad2_ Net-_C1-Pad1_ Net-_Q13-Pad3_ PORT
+J1 Net-_J1-Pad1_ Net-_J1-Pad2_ Net-_J1-Pad3_ jfet_n
+J2 Net-_J1-Pad1_ Net-_J1-Pad2_ Net-_J2-Pad3_ jfet_n
+J3 Net-_J3-Pad1_ Net-_J3-Pad2_ Net-_J1-Pad1_ jfet_n
+J4 Net-_J4-Pad1_ Net-_J3-Pad2_ Net-_J1-Pad1_ jfet_n
+R3 Net-_Q1-Pad2_ Net-_C1-Pad1_ 5k
+R4 Net-_Q10-Pad3_ Net-_C1-Pad1_ 5k
+R5 Net-_Q11-Pad3_ Net-_C1-Pad1_ 500
+R6 Net-_J1-Pad1_ Net-_Q12-Pad3_ 10
+
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir.out b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir.out new file mode 100644 index 00000000..8804c851 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir.out @@ -0,0 +1,41 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_opa827\ic_opa827.cir
+
+.include NJF.lib
+.include NPN.lib
+.include PNP.lib
+q1 net-_c1-pad1_ net-_q1-pad2_ net-_j1-pad3_ Q2N2907A
+q3 net-_q1-pad2_ net-_q1-pad2_ net-_j2-pad3_ Q2N2907A
+q4 net-_q1-pad2_ net-_q1-pad2_ net-_j3-pad1_ Q2N2907A
+q5 net-_c2-pad2_ net-_q1-pad2_ net-_j4-pad1_ Q2N2907A
+q8 net-_q7-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q9 net-_c2-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q2 net-_c1-pad1_ net-_q10-pad3_ net-_q2-pad3_ Q2N2222
+q6 net-_c2-pad2_ net-_q10-pad3_ net-_q6-pad3_ Q2N2222
+q7 net-_q7-pad1_ net-_c1-pad1_ net-_q10-pad3_ Q2N2222
+q10 net-_c2-pad1_ net-_c2-pad2_ net-_q10-pad3_ Q2N2222
+q11 net-_j1-pad1_ net-_c2-pad1_ net-_q11-pad3_ Q2N2222
+q12 net-_c1-pad1_ net-_c2-pad1_ net-_q12-pad3_ Q2N2907A
+q13 net-_j1-pad1_ net-_q12-pad3_ net-_q13-pad3_ Q2N2222
+q14 net-_c1-pad1_ net-_q11-pad3_ net-_q13-pad3_ Q2N2907A
+c1 net-_c1-pad1_ net-_c1-pad1_ 0.1u
+c2 net-_c2-pad1_ net-_c2-pad2_ 0.1u
+r1 net-_q2-pad3_ net-_c1-pad1_ 200
+r2 net-_q6-pad3_ net-_c1-pad1_ 200
+* u1 net-_j1-pad2_ net-_j1-pad1_ net-_j3-pad2_ net-_c1-pad1_ net-_q13-pad3_ port
+j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819
+j2 net-_j1-pad1_ net-_j1-pad2_ net-_j2-pad3_ J2N3819
+j3 net-_j3-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+j4 net-_j4-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+r3 net-_q1-pad2_ net-_c1-pad1_ 5k
+r4 net-_q10-pad3_ net-_c1-pad1_ 5k
+r5 net-_q11-pad3_ net-_c1-pad1_ 500
+r6 net-_j1-pad1_ net-_q12-pad3_ 10
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.pro b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sch b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sch new file mode 100644 index 00000000..df9a6152 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sch @@ -0,0 +1,571 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:IC_OPA827-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_PNP Q1
+U 1 1 63F31271
+P 3350 3600
+F 0 "Q1" H 3250 3650 50 0000 R CNN
+F 1 "eSim_PNP" H 3300 3750 50 0000 R CNN
+F 2 "" H 3550 3700 29 0000 C CNN
+F 3 "" H 3350 3600 60 0000 C CNN
+ 1 3350 3600
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q3
+U 1 1 63F312A0
+P 4000 3600
+F 0 "Q3" H 3900 3650 50 0000 R CNN
+F 1 "eSim_PNP" H 3950 3750 50 0000 R CNN
+F 2 "" H 4200 3700 29 0000 C CNN
+F 3 "" H 4000 3600 60 0000 C CNN
+ 1 4000 3600
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 63F312CB
+P 4950 3600
+F 0 "Q4" H 4850 3650 50 0000 R CNN
+F 1 "eSim_PNP" H 4900 3750 50 0000 R CNN
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diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sub b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sub new file mode 100644 index 00000000..b45c8262 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sub @@ -0,0 +1,35 @@ +* Subcircuit IC_OPA827
+.subckt IC_OPA827 net-_j1-pad2_ net-_j1-pad1_ net-_j3-pad2_ net-_c1-pad1_ net-_q13-pad3_
+* c:\fossee\esim\library\subcircuitlibrary\ic_opa827\ic_opa827.cir
+.include NJF.lib
+.include NPN.lib
+.include PNP.lib
+q1 net-_c1-pad1_ net-_q1-pad2_ net-_j1-pad3_ Q2N2907A
+q3 net-_q1-pad2_ net-_q1-pad2_ net-_j2-pad3_ Q2N2907A
+q4 net-_q1-pad2_ net-_q1-pad2_ net-_j3-pad1_ Q2N2907A
+q5 net-_c2-pad2_ net-_q1-pad2_ net-_j4-pad1_ Q2N2907A
+q8 net-_q7-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q9 net-_c2-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q2 net-_c1-pad1_ net-_q10-pad3_ net-_q2-pad3_ Q2N2222
+q6 net-_c2-pad2_ net-_q10-pad3_ net-_q6-pad3_ Q2N2222
+q7 net-_q7-pad1_ net-_c1-pad1_ net-_q10-pad3_ Q2N2222
+q10 net-_c2-pad1_ net-_c2-pad2_ net-_q10-pad3_ Q2N2222
+q11 net-_j1-pad1_ net-_c2-pad1_ net-_q11-pad3_ Q2N2222
+q12 net-_c1-pad1_ net-_c2-pad1_ net-_q12-pad3_ Q2N2907A
+q13 net-_j1-pad1_ net-_q12-pad3_ net-_q13-pad3_ Q2N2222
+q14 net-_c1-pad1_ net-_q11-pad3_ net-_q13-pad3_ Q2N2907A
+c1 net-_c1-pad1_ net-_c1-pad1_ 0.1u
+c2 net-_c2-pad1_ net-_c2-pad2_ 0.1u
+r1 net-_q2-pad3_ net-_c1-pad1_ 200
+r2 net-_q6-pad3_ net-_c1-pad1_ 200
+j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819
+j2 net-_j1-pad1_ net-_j1-pad2_ net-_j2-pad3_ J2N3819
+j3 net-_j3-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+j4 net-_j4-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+r3 net-_q1-pad2_ net-_c1-pad1_ 5k
+r4 net-_q10-pad3_ net-_c1-pad1_ 5k
+r5 net-_q11-pad3_ net-_c1-pad1_ 500
+r6 net-_j1-pad1_ net-_q12-pad3_ 10
+* Control Statements
+
+.ends IC_OPA827
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827_Previous_Values.xml b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827_Previous_Values.xml new file mode 100644 index 00000000..12052040 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><i1 name="Source type">10m</i1><i2 name="Source type">10m</i2><i4 name="Source type">5m</i4><i3 name="Source type">5m</i3></source><model /><devicemodel><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q1><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q4><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q8><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q9><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q6><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q13><q14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q14><j1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j1><j2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j2><j3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j3><j4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j4></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA827/NJF.lib b/library/SubcircuitLibrary/IC_OPA827/NJF.lib new file mode 100644 index 00000000..c3af26e8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
++ Af=1)
diff --git a/library/SubcircuitLibrary/IC_OPA827/NMOS-180nm.lib b/library/SubcircuitLibrary/IC_OPA827/NMOS-180nm.lib new file mode 100644 index 00000000..54e9786e --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697
++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0
++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3
++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286
++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078
++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/IC_OPA827/NPN.lib b/library/SubcircuitLibrary/IC_OPA827/NPN.lib new file mode 100644 index 00000000..9c378ed8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_OPA827/PNP.lib b/library/SubcircuitLibrary/IC_OPA827/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_OPA827/README.md b/library/SubcircuitLibrary/IC_OPA827/README.md new file mode 100644 index 00000000..61cd4fb5 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/README.md @@ -0,0 +1,16 @@ + +# IC_OPA827 IC + +OPA827 is a Ultra-Low-Noise Audio Op Amps IC. + + +## Documentation + +To know the details of OPA827 IC please go through with the documentation : [OPA827_datasheet](https://www.mouser.in/new/texas-instruments/ti-opa1656-op-amps/?gclid=Cj0KCQjwwvilBhCFARIsADvYi7J2yeGw_41jcQ3-dqZVWa-ufzNHBjwkf0oN3Jz0Bdk2msXTsnRrzTUaAjciEALw_wcB) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/IC_OPA827/analysis b/library/SubcircuitLibrary/IC_OPA827/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA862/IC_OPA862-cache.lib b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862-cache.lib new file mode 100644 index 00000000..e5f1c7f6 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862-cache.lib @@ -0,0 +1,102 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.cir b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.cir new file mode 100644 index 00000000..7a93233a --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.cir @@ -0,0 +1,16 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_OPA862\IC_OPA862.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/14/23 14:32:55
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1 ? Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad4_ ? Net-_R1-Pad1_ Net-_U1-Pad5_ ? lm_741
+X2 ? Net-_C1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ ? Net-_C1-Pad1_ Net-_U1-Pad5_ ? lm_741
+R1 Net-_R1-Pad1_ Net-_C1-Pad2_ 1k
+R2 Net-_C1-Pad2_ Net-_C1-Pad1_ 1k
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 4p
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_R1-Pad1_ Net-_C1-Pad1_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.cir.out b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.cir.out new file mode 100644 index 00000000..002f2b60 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.cir.out @@ -0,0 +1,18 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_opa862\ic_opa862.cir
+
+.include lm_741.sub
+x1 ? net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad4_ ? net-_r1-pad1_ net-_u1-pad5_ ? lm_741
+x2 ? net-_c1-pad2_ net-_u1-pad3_ net-_u1-pad4_ ? net-_c1-pad1_ net-_u1-pad5_ ? lm_741
+r1 net-_r1-pad1_ net-_c1-pad2_ 1k
+r2 net-_c1-pad2_ net-_c1-pad1_ 1k
+c1 net-_c1-pad1_ net-_c1-pad2_ 4p
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_r1-pad1_ net-_c1-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.pro b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.sch b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.sch new file mode 100644 index 00000000..69acebd5 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.sch @@ -0,0 +1,233 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:IC_OPA862-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L lm_741 X1
+U 1 1 6405D910
+P 4500 2950
+F 0 "X1" H 4300 2950 60 0000 C CNN
+F 1 "lm_741" H 4400 2700 60 0000 C CNN
+F 2 "" H 4500 2950 60 0000 C CNN
+F 3 "" H 4500 2950 60 0000 C CNN
+ 1 4500 2950
+ 1 0 0 -1
+$EndComp
+$Comp
+L lm_741 X2
+U 1 1 6405D92B
+P 5950 4700
+F 0 "X2" H 5750 4700 60 0000 C CNN
+F 1 "lm_741" H 5850 4450 60 0000 C CNN
+F 2 "" H 5950 4700 60 0000 C CNN
+F 3 "" H 5950 4700 60 0000 C CNN
+ 1 5950 4700
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R1
+U 1 1 6405D952
+P 5150 4600
+F 0 "R1" H 5200 4730 50 0000 C CNN
+F 1 "1k" H 5200 4550 50 0000 C CNN
+F 2 "" H 5200 4580 30 0000 C CNN
+F 3 "" V 5200 4650 30 0000 C CNN
+ 1 5150 4600
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R2
+U 1 1 6405D971
+P 5650 4000
+F 0 "R2" H 5700 4130 50 0000 C CNN
+F 1 "1k" H 5700 3950 50 0000 C CNN
+F 2 "" H 5700 3980 30 0000 C CNN
+F 3 "" V 5700 4050 30 0000 C CNN
+ 1 5650 4000
+ 1 0 0 -1
+$EndComp
+$Comp
+L capacitor C1
+U 1 1 6405D98E
+P 5700 3700
+F 0 "C1" H 5725 3800 50 0000 L CNN
+F 1 "4p" H 5725 3600 50 0000 L CNN
+F 2 "" H 5738 3550 30 0000 C CNN
+F 3 "" H 5700 3700 60 0000 C CNN
+ 1 5700 3700
+ 0 1 1 0
+$EndComp
+$Comp
+L PORT U1
+U 1 1 6405DEE9
+P 3550 2800
+F 0 "U1" H 3600 2900 30 0000 C CNN
+F 1 "PORT" H 3550 2800 30 0000 C CNN
+F 2 "" H 3550 2800 60 0000 C CNN
+F 3 "" H 3550 2800 60 0000 C CNN
+ 1 3550 2800
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 6405DF14
+P 3550 3050
+F 0 "U1" H 3600 3150 30 0000 C CNN
+F 1 "PORT" H 3550 3050 30 0000 C CNN
+F 2 "" H 3550 3050 60 0000 C CNN
+F 3 "" H 3550 3050 60 0000 C CNN
+ 2 3550 3050
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 6405DF3B
+P 3900 4800
+F 0 "U1" H 3950 4900 30 0000 C CNN
+F 1 "PORT" H 3900 4800 30 0000 C CNN
+F 2 "" H 3900 4800 60 0000 C CNN
+F 3 "" H 3900 4800 60 0000 C CNN
+ 3 3900 4800
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 6405E150
+P 6450 2200
+F 0 "U1" H 6500 2300 30 0000 C CNN
+F 1 "PORT" H 6450 2200 30 0000 C CNN
+F 2 "" H 6450 2200 60 0000 C CNN
+F 3 "" H 6450 2200 60 0000 C CNN
+ 5 6450 2200
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 6405E212
+P 4350 5600
+F 0 "U1" H 4400 5700 30 0000 C CNN
+F 1 "PORT" H 4350 5600 30 0000 C CNN
+F 2 "" H 4350 5600 60 0000 C CNN
+F 3 "" H 4350 5600 60 0000 C CNN
+ 4 4350 5600
+ 0 -1 -1 0
+$EndComp
+Wire Wire Line
+ 5050 2950 5050 4550
+Wire Wire Line
+ 5550 3950 5400 3950
+Wire Wire Line
+ 5400 3700 5400 4550
+Wire Wire Line
+ 5400 4550 5350 4550
+Wire Wire Line
+ 5550 3700 5400 3700
+Connection ~ 5400 3950
+Wire Wire Line
+ 5850 3950 6500 3950
+Wire Wire Line
+ 6500 3700 6500 4700
+Wire Wire Line
+ 5850 3700 6500 3700
+Connection ~ 6500 3950
+Wire Wire Line
+ 5050 2950 7250 2950
+Wire Wire Line
+ 6500 4700 7250 4700
+Wire Wire Line
+ 4350 2500 4350 2200
+Wire Wire Line
+ 4350 2200 6200 2200
+Wire Wire Line
+ 6100 2200 6100 4250
+Wire Wire Line
+ 6100 4250 5800 4250
+Wire Wire Line
+ 4350 3400 4350 5350
+Wire Wire Line
+ 4350 5250 5800 5250
+Wire Wire Line
+ 5800 5250 5800 5150
+Wire Wire Line
+ 3800 2800 3950 2800
+Wire Wire Line
+ 3800 3050 3950 3050
+Wire Wire Line
+ 4150 4800 5400 4800
+Connection ~ 4350 5250
+Connection ~ 6100 2200
+$Comp
+L PORT U1
+U 6 1 6405E6DC
+P 7500 2950
+F 0 "U1" H 7550 3050 30 0000 C CNN
+F 1 "PORT" H 7500 2950 30 0000 C CNN
+F 2 "" H 7500 2950 60 0000 C CNN
+F 3 "" H 7500 2950 60 0000 C CNN
+ 6 7500 2950
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 7 1 6405E70F
+P 7500 4700
+F 0 "U1" H 7550 4800 30 0000 C CNN
+F 1 "PORT" H 7500 4700 30 0000 C CNN
+F 2 "" H 7500 4700 60 0000 C CNN
+F 3 "" H 7500 4700 60 0000 C CNN
+ 7 7500 4700
+ -1 0 0 1
+$EndComp
+Connection ~ 6950 2950
+Connection ~ 6950 4700
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.sub b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.sub new file mode 100644 index 00000000..39f761c3 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862.sub @@ -0,0 +1,12 @@ +* Subcircuit IC_OPA862
+.subckt IC_OPA862 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_r1-pad1_ net-_c1-pad1_
+* c:\fossee\esim\library\subcircuitlibrary\ic_opa862\ic_opa862.cir
+.include lm_741.sub
+x1 ? net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad4_ ? net-_r1-pad1_ net-_u1-pad5_ ? lm_741
+x2 ? net-_c1-pad2_ net-_u1-pad3_ net-_u1-pad4_ ? net-_c1-pad1_ net-_u1-pad5_ ? lm_741
+r1 net-_r1-pad1_ net-_c1-pad2_ 1k
+r2 net-_c1-pad2_ net-_c1-pad1_ 1k
+c1 net-_c1-pad1_ net-_c1-pad2_ 4p
+* Control Statements
+
+.ends IC_OPA862
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA862/IC_OPA862_Previous_Values.xml b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862_Previous_Values.xml new file mode 100644 index 00000000..1f826187 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/IC_OPA862_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel /><subcircuit><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x1><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x2></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA862/NPN.lib b/library/SubcircuitLibrary/IC_OPA862/NPN.lib new file mode 100644 index 00000000..7f2f0319 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_OPA862/PNP.lib b/library/SubcircuitLibrary/IC_OPA862/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_OPA862/README.md b/library/SubcircuitLibrary/IC_OPA862/README.md new file mode 100644 index 00000000..1b45c968 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/README.md @@ -0,0 +1,16 @@ + +# IC_OPA862 IC + +OPA862 is a High Input Impedance, Single-Ended to Differential ADC Driver IC. + + +## Documentation + +To know the details of OPA862 IC please go through with the documentation : [OPA862_datasheet](https://www.ti.com/lit/ds/symlink/opa862.pdf?ts=1690187471743&ref_url=https%253A%252F%252Fwww.google.co.in%252F) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/IC_OPA862/analysis b/library/SubcircuitLibrary/IC_OPA862/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741-cache.lib b/library/SubcircuitLibrary/IC_OPA862/lm_741-cache.lib new file mode 100644 index 00000000..6e908886 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741-cache.lib @@ -0,0 +1,119 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741-rescue.lib b/library/SubcircuitLibrary/IC_OPA862/lm_741-rescue.lib new file mode 100644 index 00000000..bf8e4bd7 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741-rescue.lib @@ -0,0 +1,42 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# eSim_NPN-RESCUE-lm_741
+#
+DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP-RESCUE-lm_741
+#
+DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741.cir b/library/SubcircuitLibrary/IC_OPA862/lm_741.cir new file mode 100644 index 00000000..b7989199 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741.cir @@ -0,0 +1,43 @@ +* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+Q2 Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN
+Q6 Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP
+Q5 Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP
+Q3 Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN
+Q4 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q9 Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q8 Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN
+Q7 Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN
+R1 Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k
+R2 Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k
+R3 Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k
+Q12 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN
+Q13 Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN
+R4 Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k
+R11 Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k
+Q10 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q11 Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q14 Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN
+R8 Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k
+R7 Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30p
+Q16 Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN
+Q15 Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN
+R5 Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k
+R6 Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50
+Q17 Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN
+Q18 Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN
+Q20 Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN
+R9 Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25
+R10 Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50
+Q19 Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP
+U1 Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT
+
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741.cir.out b/library/SubcircuitLibrary/IC_OPA862/lm_741.cir.out new file mode 100644 index 00000000..01ede7ab --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741.cir.out @@ -0,0 +1,46 @@ +* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* u1 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741.pro b/library/SubcircuitLibrary/IC_OPA862/lm_741.pro new file mode 100644 index 00000000..222fb5cb --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741.pro @@ -0,0 +1,45 @@ +update=02/07/23 21:24:54
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=lm_741-rescue
+LibName2=power
+LibName3=eSim_Analog
+LibName4=eSim_Devices
+LibName5=eSim_Digital
+LibName6=eSim_Hybrid
+LibName7=eSim_Miscellaneous
+LibName8=eSim_Plot
+LibName9=eSim_Power
+LibName10=eSim_User
+LibName11=eSim_Sources
+LibName12=eSim_Subckt
diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741.sch b/library/SubcircuitLibrary/IC_OPA862/lm_741.sch new file mode 100644 index 00000000..6a74cf22 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741.sch @@ -0,0 +1,697 @@ +EESchema Schematic File Version 2
+LIBS:power
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:lm_741-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 5CE90A7B
+P 2650 2700
+F 0 "Q1" H 2550 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 2600 2850 50 0000 R CNN
+F 2 "" H 2850 2800 29 0000 C CNN
+F 3 "" H 2650 2700 60 0000 C CNN
+ 1 2650 2700
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 5CE90A7C
+P 4300 2700
+F 0 "Q2" H 4200 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 4250 2850 50 0000 R CNN
+F 2 "" H 4500 2800 29 0000 C CNN
+F 3 "" H 4300 2700 60 0000 C CNN
+ 1 4300 2700
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 5CE90A7D
+P 3000 3200
+F 0 "Q6" H 2900 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 2950 3350 50 0000 R CNN
+F 2 "" H 3200 3300 29 0000 C CNN
+F 3 "" H 3000 3200 60 0000 C CNN
+ 1 3000 3200
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 5CE90A7E
+P 3950 3200
+F 0 "Q5" H 3850 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 3900 3350 50 0000 R CNN
+F 2 "" H 4150 3300 29 0000 C CNN
+F 3 "" H 3950 3200 60 0000 C CNN
+ 1 3950 3200
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 5CE90A7F
+P 3300 4000
+F 0 "Q3" H 3200 4050 50 0000 R CNN
+F 1 "eSim_NPN" H 3250 4150 50 0000 R CNN
+F 2 "" H 3500 4100 29 0000 C CNN
+F 3 "" H 3300 4000 60 0000 C CNN
+ 1 3300 4000
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 5CE90A80
+P 3850 2000
+F 0 "Q4" H 3750 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 3800 2150 50 0000 R CNN
+F 2 "" H 4050 2100 29 0000 C CNN
+F 3 "" H 3850 2000 60 0000 C CNN
+ 1 3850 2000
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q9
+U 1 1 5CE90A81
+P 5200 2000
+F 0 "Q9" H 5100 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 5150 2150 50 0000 R CNN
+F 2 "" H 5400 2100 29 0000 C CNN
+F 3 "" H 5200 2000 60 0000 C CNN
+ 1 5200 2000
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 5CE90A82
+P 3950 4600
+F 0 "Q8" H 3850 4650 50 0000 R CNN
+F 1 "eSim_NPN" H 3900 4750 50 0000 R CNN
+F 2 "" H 4150 4700 29 0000 C CNN
+F 3 "" H 3950 4600 60 0000 C CNN
+ 1 3950 4600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 5CE90A83
+P 3000 4600
+F 0 "Q7" H 2900 4650 50 0000 R CNN
+F 1 "eSim_NPN" H 2950 4750 50 0000 R CNN
+F 2 "" H 3200 4700 29 0000 C CNN
+F 3 "" H 3000 4600 60 0000 C CNN
+ 1 3000 4600
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_R R1
+U 1 1 5CE90A84
+P 2850 5200
+F 0 "R1" H 2900 5330 50 0000 C CNN
+F 1 "1k" H 2900 5250 50 0000 C CNN
+F 2 "" H 2900 5180 30 0000 C CNN
+F 3 "" V 2900 5250 30 0000 C CNN
+ 1 2850 5200
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_R R2
+U 1 1 5CE90A85
+P 3550 5200
+F 0 "R2" H 3600 5330 50 0000 C CNN
+F 1 "50k" H 3600 5250 50 0000 C CNN
+F 2 "" H 3600 5180 30 0000 C CNN
+F 3 "" V 3600 5250 30 0000 C CNN
+ 1 3550 5200
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_R R3
+U 1 1 5CE90A86
+P 4000 5200
+F 0 "R3" H 4050 5330 50 0000 C CNN
+F 1 "1k" H 4050 5250 50 0000 C CNN
+F 2 "" H 4050 5180 30 0000 C CNN
+F 3 "" V 4050 5250 30 0000 C CNN
+ 1 4000 5200
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_NPN Q12
+U 1 1 5CE90A87
+P 6300 4700
+F 0 "Q12" H 6200 4750 50 0000 R CNN
+F 1 "eSim_NPN" H 6250 4850 50 0000 R CNN
+F 2 "" H 6500 4800 29 0000 C CNN
+F 3 "" H 6300 4700 60 0000 C CNN
+ 1 6300 4700
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q13
+U 1 1 5CE90A88
+P 5400 4700
+F 0 "Q13" H 5300 4750 50 0000 R CNN
+F 1 "eSim_NPN" H 5350 4850 50 0000 R CNN
+F 2 "" H 5600 4800 29 0000 C CNN
+F 3 "" H 5400 4700 60 0000 C CNN
+ 1 5400 4700
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_R R4
+U 1 1 5CE90A89
+P 5250 5200
+F 0 "R4" H 5300 5330 50 0000 C CNN
+F 1 "5k" H 5300 5250 50 0000 C CNN
+F 2 "" H 5300 5180 30 0000 C CNN
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
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+$Comp
+L eSim_NPN Q20
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+$Comp
+L eSim_R R9
+U 1 1 5CE90A98
+P 8850 3000
+F 0 "R9" H 8900 3130 50 0000 C CNN
+F 1 "25" H 8900 3050 50 0000 C CNN
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+$EndComp
+$Comp
+L eSim_R R10
+U 1 1 5CE90A99
+P 8850 3750
+F 0 "R10" H 8900 3880 50 0000 C CNN
+F 1 "50" H 8900 3800 50 0000 C CNN
+F 2 "" H 8900 3730 30 0000 C CNN
+F 3 "" V 8900 3800 30 0000 C CNN
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+$Comp
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+U 1 1 5CE90A9A
+P 8800 4600
+F 0 "Q19" H 8700 4650 50 0000 R CNN
+F 1 "eSim_PNP" H 8750 4750 50 0000 R CNN
+F 2 "" H 9000 4700 29 0000 C CNN
+F 3 "" H 8800 4600 60 0000 C CNN
+ 1 8800 4600
+ 1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5CE90A9B
+P 1900 1200
+F 0 "U1" H 1950 1300 30 0000 C CNN
+F 1 "PORT" H 1900 1200 30 0000 C CNN
+F 2 "" H 1900 1200 60 0000 C CNN
+F 3 "" H 1900 1200 60 0000 C CNN
+ 3 1900 1200
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5CE90A9C
+P 4500 1050
+F 0 "U1" H 4550 1150 30 0000 C CNN
+F 1 "PORT" H 4500 1050 30 0000 C CNN
+F 2 "" H 4500 1050 60 0000 C CNN
+F 3 "" H 4500 1050 60 0000 C CNN
+ 2 4500 1050
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 7 1 5CE90A9D
+P 9750 1650
+F 0 "U1" H 9800 1750 30 0000 C CNN
+F 1 "PORT" H 9750 1650 30 0000 C CNN
+F 2 "" H 9750 1650 60 0000 C CNN
+F 3 "" H 9750 1650 60 0000 C CNN
+ 7 9750 1650
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 5CE90A9E
+P 9750 3500
+F 0 "U1" H 9800 3600 30 0000 C CNN
+F 1 "PORT" H 9750 3500 30 0000 C CNN
+F 2 "" H 9750 3500 60 0000 C CNN
+F 3 "" H 9750 3500 60 0000 C CNN
+ 6 9750 3500
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5CE90A9F
+P 9700 5550
+F 0 "U1" H 9750 5650 30 0000 C CNN
+F 1 "PORT" H 9700 5550 30 0000 C CNN
+F 2 "" H 9700 5550 60 0000 C CNN
+F 3 "" H 9700 5550 60 0000 C CNN
+ 4 9700 5550
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 3200 3200 3750 3200
+Wire Wire Line
+ 2750 2900 2750 2950
+Wire Wire Line
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+Wire Wire Line
+ 2900 2950 2900 3000
+Wire Wire Line
+ 4200 2900 4200 2950
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+ 2750 2350 2750 2500
+Wire Wire Line
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+Connection ~ 4200 2350
+Connection ~ 4200 2000
+Wire Wire Line
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+Connection ~ 3750 2350
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 3750 1650
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741.sub b/library/SubcircuitLibrary/IC_OPA862/lm_741.sub new file mode 100644 index 00000000..4e4feca4 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741.sub @@ -0,0 +1,40 @@ +* Subcircuit lm_741
+.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ?
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* Control Statements
+
+.ends lm_741
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA862/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/IC_OPA862/lm_741_Previous_Values.xml new file mode 100644 index 00000000..228572ce --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/lm_741_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><q1><field /></q1><q2><field /></q2><q6><field /></q6><q5><field /></q5><q3><field /></q3><q4><field /></q4><q9><field /></q9><q8><field /></q8><q7><field /></q7><q12><field /></q12><q13><field /></q13><q10><field /></q10><q11><field /></q11><q14><field /></q14><q16><field /></q16><q15><field /></q15><q17><field /></q17><q18><field /></q18><q20><field /></q20><q19><field /></q19></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA862/npn_1.lib b/library/SubcircuitLibrary/IC_OPA862/npn_1.lib new file mode 100644 index 00000000..4a863e3e --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/npn_1.lib @@ -0,0 +1,29 @@ +.model npn_1 NPN(
++ Vtf=1.7
++ Cjc=0.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.5p
++ Isc=0
++ Xtb=1.5
++ Rb=500
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=125
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+)
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA862/pnp_1.lib b/library/SubcircuitLibrary/IC_OPA862/pnp_1.lib new file mode 100644 index 00000000..c486429f --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA862/pnp_1.lib @@ -0,0 +1,29 @@ +.model pnp_1 PNP(
++ Vtf=1.7
++ Cjc=1.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.3p
++ Isc=0
++ Xtb=1.5
++ Rb=250
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=25
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+)
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_ULN2803/D.lib b/library/SubcircuitLibrary/IC_ULN2803/D.lib new file mode 100644 index 00000000..513550fa --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803-cache.lib b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803-cache.lib new file mode 100644 index 00000000..80d6c006 --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803-cache.lib @@ -0,0 +1,120 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_GND
+#
+DEF eSim_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "eSim_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.cir b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.cir new file mode 100644 index 00000000..2c0c3ec4 --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.cir @@ -0,0 +1,75 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_ULN2803\IC_ULN2803.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/14/23 00:06:55
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q2 Net-_D6-Pad2_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN
+Q5 Net-_D6-Pad2_ Net-_Q2-Pad3_ E eSim_NPN
+R2 Net-_D2-Pad2_ Net-_Q2-Pad2_ 2.7k
+R5 Net-_Q2-Pad2_ Net-_Q2-Pad3_ 7.2k
+R8 Net-_Q2-Pad3_ E 3k
+D6 E Net-_D6-Pad2_ eSim_Diode
+D8 Net-_D6-Pad2_ COM eSim_Diode
+D2 E Net-_D2-Pad2_ eSim_Diode
+U1 Net-_D1-Pad2_ Net-_D2-Pad2_ Net-_D3-Pad2_ Net-_D4-Pad2_ Net-_D6-Pad2_ Net-_D7-Pad2_ Net-_D10-Pad2_ Net-_D11-Pad2_ COM Net-_D12-Pad2_ E Net-_D13-Pad2_ Net-_D19-Pad2_ Net-_D15-Pad2_ Net-_D17-Pad2_ Net-_D20-Pad2_ Net-_D21-Pad2_ Net-_D23-Pad2_ PORT
+Q3 Net-_D7-Pad2_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN
+Q6 Net-_D7-Pad2_ Net-_Q3-Pad3_ E eSim_NPN
+R3 Net-_D3-Pad2_ Net-_Q3-Pad2_ 2.7k
+R6 Net-_Q3-Pad2_ Net-_Q3-Pad3_ 7.2k
+R9 Net-_Q3-Pad3_ E 3k
+D7 E Net-_D7-Pad2_ eSim_Diode
+D9 Net-_D7-Pad2_ COM eSim_Diode
+D3 E Net-_D3-Pad2_ eSim_Diode
+D1 E Net-_D1-Pad2_ eSim_Diode
+D5 Net-_D4-Pad2_ COM eSim_Diode
+D4 E Net-_D4-Pad2_ eSim_Diode
+R7 Net-_Q1-Pad3_ E 3k
+R4 Net-_Q1-Pad2_ Net-_Q1-Pad3_ 7.2k
+R1 Net-_D1-Pad2_ Net-_Q1-Pad2_ 2.7k
+Q4 Net-_D4-Pad2_ Net-_Q1-Pad3_ E eSim_NPN
+Q1 Net-_D4-Pad2_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+D10 E Net-_D10-Pad2_ eSim_Diode
+D14 Net-_D13-Pad2_ COM eSim_Diode
+D13 E Net-_D13-Pad2_ eSim_Diode
+R16 Net-_Q10-Pad2_ E 3k
+R11 Net-_Q7-Pad2_ Net-_Q10-Pad2_ 7.2k
+R10 Net-_D10-Pad2_ Net-_Q7-Pad2_ 2.7k
+Q10 Net-_D13-Pad2_ Net-_Q10-Pad2_ E eSim_NPN
+Q7 Net-_D13-Pad2_ Net-_Q7-Pad2_ Net-_Q10-Pad2_ eSim_NPN
+Q8 Net-_D15-Pad2_ Net-_Q8-Pad2_ Net-_Q11-Pad2_ eSim_NPN
+Q11 Net-_D15-Pad2_ Net-_Q11-Pad2_ E eSim_NPN
+R12 Net-_D11-Pad2_ Net-_Q8-Pad2_ 2.7k
+R14 Net-_Q8-Pad2_ Net-_Q11-Pad2_ 7.2k
+R17 Net-_Q11-Pad2_ E 3k
+D15 E Net-_D15-Pad2_ eSim_Diode
+D16 Net-_D15-Pad2_ COM eSim_Diode
+D11 E Net-_D11-Pad2_ eSim_Diode
+Q9 Net-_D17-Pad2_ Net-_Q9-Pad2_ Net-_Q12-Pad2_ eSim_NPN
+Q12 Net-_D17-Pad2_ Net-_Q12-Pad2_ E eSim_NPN
+R13 Net-_D12-Pad2_ Net-_Q9-Pad2_ 2.7k
+R15 Net-_Q9-Pad2_ Net-_Q12-Pad2_ 7.2k
+R18 Net-_Q12-Pad2_ E 3k
+D17 E Net-_D17-Pad2_ eSim_Diode
+D18 Net-_D17-Pad2_ COM eSim_Diode
+D12 E Net-_D12-Pad2_ eSim_Diode
+Q13 Net-_D21-Pad2_ Net-_Q13-Pad2_ Net-_Q13-Pad3_ eSim_NPN
+Q15 Net-_D21-Pad2_ Net-_Q13-Pad3_ E eSim_NPN
+R19 Net-_D19-Pad2_ Net-_Q13-Pad2_ 2.7k
+R20 Net-_Q13-Pad2_ Net-_Q13-Pad3_ 7.2k
+R23 Net-_Q13-Pad3_ E 3k
+D21 E Net-_D21-Pad2_ eSim_Diode
+D22 Net-_D21-Pad2_ COM eSim_Diode
+D19 E Net-_D19-Pad2_ eSim_Diode
+Q14 Net-_D23-Pad2_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN
+Q16 Net-_D23-Pad2_ Net-_Q14-Pad3_ E eSim_NPN
+R21 Net-_D20-Pad2_ Net-_Q14-Pad2_ 2.7k
+R22 Net-_Q14-Pad2_ Net-_Q14-Pad3_ 7.2k
+R24 Net-_Q14-Pad3_ E 3k
+D23 E Net-_D23-Pad2_ eSim_Diode
+D24 Net-_D23-Pad2_ COM eSim_Diode
+D20 E Net-_D20-Pad2_ eSim_Diode
+
+.end
diff --git a/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.cir.out b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.cir.out new file mode 100644 index 00000000..1edcac09 --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.cir.out @@ -0,0 +1,78 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_uln2803\ic_uln2803.cir
+
+.include D.lib
+.include NPN.lib
+q2 net-_d6-pad2_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
+q5 net-_d6-pad2_ net-_q2-pad3_ e Q2N2222
+r2 net-_d2-pad2_ net-_q2-pad2_ 2.7k
+r5 net-_q2-pad2_ net-_q2-pad3_ 7.2k
+r8 net-_q2-pad3_ e 3k
+d6 e net-_d6-pad2_ 1N4148
+d8 net-_d6-pad2_ com 1N4148
+d2 e net-_d2-pad2_ 1N4148
+* u1 net-_d1-pad2_ net-_d2-pad2_ net-_d3-pad2_ net-_d4-pad2_ net-_d6-pad2_ net-_d7-pad2_ net-_d10-pad2_ net-_d11-pad2_ com net-_d12-pad2_ e net-_d13-pad2_ net-_d19-pad2_ net-_d15-pad2_ net-_d17-pad2_ net-_d20-pad2_ net-_d21-pad2_ net-_d23-pad2_ port
+q3 net-_d7-pad2_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222
+q6 net-_d7-pad2_ net-_q3-pad3_ e Q2N2222
+r3 net-_d3-pad2_ net-_q3-pad2_ 2.7k
+r6 net-_q3-pad2_ net-_q3-pad3_ 7.2k
+r9 net-_q3-pad3_ e 3k
+d7 e net-_d7-pad2_ 1N4148
+d9 net-_d7-pad2_ com 1N4148
+d3 e net-_d3-pad2_ 1N4148
+d1 e net-_d1-pad2_ 1N4148
+d5 net-_d4-pad2_ com 1N4148
+d4 e net-_d4-pad2_ 1N4148
+r7 net-_q1-pad3_ e 3k
+r4 net-_q1-pad2_ net-_q1-pad3_ 7.2k
+r1 net-_d1-pad2_ net-_q1-pad2_ 2.7k
+q4 net-_d4-pad2_ net-_q1-pad3_ e Q2N2222
+q1 net-_d4-pad2_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+d10 e net-_d10-pad2_ 1N4148
+d14 net-_d13-pad2_ com 1N4148
+d13 e net-_d13-pad2_ 1N4148
+r16 net-_q10-pad2_ e 3k
+r11 net-_q7-pad2_ net-_q10-pad2_ 7.2k
+r10 net-_d10-pad2_ net-_q7-pad2_ 2.7k
+q10 net-_d13-pad2_ net-_q10-pad2_ e Q2N2222
+q7 net-_d13-pad2_ net-_q7-pad2_ net-_q10-pad2_ Q2N2222
+q8 net-_d15-pad2_ net-_q8-pad2_ net-_q11-pad2_ Q2N2222
+q11 net-_d15-pad2_ net-_q11-pad2_ e Q2N2222
+r12 net-_d11-pad2_ net-_q8-pad2_ 2.7k
+r14 net-_q8-pad2_ net-_q11-pad2_ 7.2k
+r17 net-_q11-pad2_ e 3k
+d15 e net-_d15-pad2_ 1N4148
+d16 net-_d15-pad2_ com 1N4148
+d11 e net-_d11-pad2_ 1N4148
+q9 net-_d17-pad2_ net-_q9-pad2_ net-_q12-pad2_ Q2N2222
+q12 net-_d17-pad2_ net-_q12-pad2_ e Q2N2222
+r13 net-_d12-pad2_ net-_q9-pad2_ 2.7k
+r15 net-_q9-pad2_ net-_q12-pad2_ 7.2k
+r18 net-_q12-pad2_ e 3k
+d17 e net-_d17-pad2_ 1N4148
+d18 net-_d17-pad2_ com 1N4148
+d12 e net-_d12-pad2_ 1N4148
+q13 net-_d21-pad2_ net-_q13-pad2_ net-_q13-pad3_ Q2N2222
+q15 net-_d21-pad2_ net-_q13-pad3_ e Q2N2222
+r19 net-_d19-pad2_ net-_q13-pad2_ 2.7k
+r20 net-_q13-pad2_ net-_q13-pad3_ 7.2k
+r23 net-_q13-pad3_ e 3k
+d21 e net-_d21-pad2_ 1N4148
+d22 net-_d21-pad2_ com 1N4148
+d19 e net-_d19-pad2_ 1N4148
+q14 net-_d23-pad2_ net-_q14-pad2_ net-_q14-pad3_ Q2N2222
+q16 net-_d23-pad2_ net-_q14-pad3_ e Q2N2222
+r21 net-_d20-pad2_ net-_q14-pad2_ 2.7k
+r22 net-_q14-pad2_ net-_q14-pad3_ 7.2k
+r24 net-_q14-pad3_ e 3k
+d23 e net-_d23-pad2_ 1N4148
+d24 net-_d23-pad2_ com 1N4148
+d20 e net-_d20-pad2_ 1N4148
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.pro b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.sch b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.sch new file mode 100644 index 00000000..5345bc0e --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.sch @@ -0,0 +1,1448 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q2
+U 1 1 640F71F2
+P 2300 3750
+F 0 "Q2" H 2200 3800 50 0000 R CNN
+F 1 "eSim_NPN" H 2250 3900 50 0000 R CNN
+F 2 "" H 2500 3850 29 0000 C CNN
+F 3 "" H 2300 3750 60 0000 C CNN
+ 1 2300 3750
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q5
+U 1 1 640F71F8
+P 3150 4150
+F 0 "Q5" H 3050 4200 50 0000 R CNN
+F 1 "eSim_NPN" H 3100 4300 50 0000 R CNN
+F 2 "" H 3350 4250 29 0000 C CNN
+F 3 "" H 3150 4150 60 0000 C CNN
+ 1 3150 4150
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R2
+U 1 1 640F71FE
+P 1750 3800
+F 0 "R2" H 1800 3930 50 0000 C CNN
+F 1 "2.7k" H 1800 3750 50 0000 C CNN
+F 2 "" H 1800 3780 30 0000 C CNN
+F 3 "" V 1800 3850 30 0000 C CNN
+ 1 1750 3800
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R5
+U 1 1 640F7204
+P 2100 4650
+F 0 "R5" H 2150 4780 50 0000 C CNN
+F 1 "7.2k" H 2150 4600 50 0000 C CNN
+F 2 "" H 2150 4630 30 0000 C CNN
+F 3 "" V 2150 4700 30 0000 C CNN
+ 1 2100 4650
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R8
+U 1 1 640F720A
+P 2700 4650
+F 0 "R8" H 2750 4780 50 0000 C CNN
+F 1 "3k" H 2750 4600 50 0000 C CNN
+F 2 "" H 2750 4630 30 0000 C CNN
+F 3 "" V 2750 4700 30 0000 C CNN
+ 1 2700 4650
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1950 3750 2100 3750
+Wire Wire Line
+ 2000 3750 2000 4600
+Connection ~ 2000 3750
+Wire Wire Line
+ 2300 4600 2600 4600
+Wire Wire Line
+ 2400 3950 2400 4600
+Connection ~ 2400 4600
+Wire Wire Line
+ 2400 4150 2950 4150
+Wire Wire Line
+ 2400 3550 2400 3450
+Wire Wire Line
+ 2400 3450 3750 3450
+Wire Wire Line
+ 3250 3200 3250 3950
+Connection ~ 2400 4150
+Wire Wire Line
+ 2900 4600 3800 4600
+Wire Wire Line
+ 3250 4350 3250 5000
+$Comp
+L eSim_Diode D6
+U 1 1 640F721D
+P 3600 3950
+F 0 "D6" V 3600 4050 50 0000 C CNN
+F 1 "eSim_Diode" H 3600 3850 50 0000 C CNN
+F 2 "" H 3600 3950 60 0000 C CNN
+F 3 "" H 3600 3950 60 0000 C CNN
+ 1 3600 3950
+ 0 -1 -1 0
+$EndComp
+$Comp
+L eSim_Diode D8
+U 1 1 640F7223
+P 3650 3200
+F 0 "D8" H 3650 3300 50 0000 C CNN
+F 1 "eSim_Diode" H 3650 3100 50 0000 C CNN
+F 2 "" H 3650 3200 60 0000 C CNN
+F 3 "" H 3650 3200 60 0000 C CNN
+ 1 3650 3200
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D2
+U 1 1 640F7229
+P 1700 4900
+F 0 "D2" H 1700 5000 50 0000 C CNN
+F 1 "eSim_Diode" V 1700 4800 50 0000 C CNN
+F 2 "" H 1700 4900 60 0000 C CNN
+F 3 "" H 1700 4900 60 0000 C CNN
+ 1 1700 4900
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 1250 3750 1650 3750
+Wire Wire Line
+ 1450 3750 1450 4900
+Wire Wire Line
+ 1450 4900 1550 4900
+Wire Wire Line
+ 3250 4900 1850 4900
+Connection ~ 3250 4600
+Wire Wire Line
+ 3500 3200 3250 3200
+Connection ~ 3250 3450
+Wire Wire Line
+ 3600 3450 3600 3800
+Wire Wire Line
+ 3600 4600 3600 4100
+Text GLabel 4000 3200 2 60 Input ~ 0
+COM
+Text GLabel 3800 4600 2 60 Input ~ 0
+E
+$Comp
+L PORT U1
+U 2 1 640F723A
+P 1000 3750
+F 0 "U1" H 1050 3850 30 0000 C CNN
+F 1 "PORT" H 1000 3750 30 0000 C CNN
+F 2 "" H 1000 3750 60 0000 C CNN
+F 3 "" H 1000 3750 60 0000 C CNN
+ 2 1000 3750
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 640F7240
+P 4000 3450
+F 0 "U1" H 4050 3550 30 0000 C CNN
+F 1 "PORT" H 4000 3450 30 0000 C CNN
+F 2 "" H 4000 3450 60 0000 C CNN
+F 3 "" H 4000 3450 60 0000 C CNN
+ 5 4000 3450
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_GND #PWR01
+U 1 1 640F7246
+P 3250 5000
+F 0 "#PWR01" H 3250 4750 50 0001 C CNN
+F 1 "eSim_GND" H 3250 4850 50 0000 C CNN
+F 2 "" H 3250 5000 50 0001 C CNN
+F 3 "" H 3250 5000 50 0001 C CNN
+ 1 3250 5000
+ 1 0 0 -1
+$EndComp
+Connection ~ 3600 4600
+Connection ~ 1450 3750
+Connection ~ 3250 4900
+Connection ~ 3600 3450
+Wire Wire Line
+ 3800 3200 4000 3200
+$Comp
+L eSim_NPN Q3
+U 1 1 640F758F
+P 2300 6250
+F 0 "Q3" H 2200 6300 50 0000 R CNN
+F 1 "eSim_NPN" H 2250 6400 50 0000 R CNN
+F 2 "" H 2500 6350 29 0000 C CNN
+F 3 "" H 2300 6250 60 0000 C CNN
+ 1 2300 6250
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q6
+U 1 1 640F7595
+P 3150 6650
+F 0 "Q6" H 3050 6700 50 0000 R CNN
+F 1 "eSim_NPN" H 3100 6800 50 0000 R CNN
+F 2 "" H 3350 6750 29 0000 C CNN
+F 3 "" H 3150 6650 60 0000 C CNN
+ 1 3150 6650
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R3
+U 1 1 640F759B
+P 1750 6300
+F 0 "R3" H 1800 6430 50 0000 C CNN
+F 1 "2.7k" H 1800 6250 50 0000 C CNN
+F 2 "" H 1800 6280 30 0000 C CNN
+F 3 "" V 1800 6350 30 0000 C CNN
+ 1 1750 6300
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R6
+U 1 1 640F75A1
+P 2100 7150
+F 0 "R6" H 2150 7280 50 0000 C CNN
+F 1 "7.2k" H 2150 7100 50 0000 C CNN
+F 2 "" H 2150 7130 30 0000 C CNN
+F 3 "" V 2150 7200 30 0000 C CNN
+ 1 2100 7150
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R9
+U 1 1 640F75A7
+P 2700 7150
+F 0 "R9" H 2750 7280 50 0000 C CNN
+F 1 "3k" H 2750 7100 50 0000 C CNN
+F 2 "" H 2750 7130 30 0000 C CNN
+F 3 "" V 2750 7200 30 0000 C CNN
+ 1 2700 7150
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1950 6250 2100 6250
+Wire Wire Line
+ 2000 6250 2000 7100
+Connection ~ 2000 6250
+Wire Wire Line
+ 2300 7100 2600 7100
+Wire Wire Line
+ 2400 6450 2400 7100
+Connection ~ 2400 7100
+Wire Wire Line
+ 2400 6650 2950 6650
+Wire Wire Line
+ 2400 6050 2400 5950
+Wire Wire Line
+ 2400 5950 3750 5950
+Wire Wire Line
+ 3250 5700 3250 6450
+Connection ~ 2400 6650
+Wire Wire Line
+ 2900 7100 3800 7100
+Wire Wire Line
+ 3250 6850 3250 7500
+$Comp
+L eSim_Diode D7
+U 1 1 640F75BA
+P 3600 6450
+F 0 "D7" V 3600 6550 50 0000 C CNN
+F 1 "eSim_Diode" H 3600 6350 50 0000 C CNN
+F 2 "" H 3600 6450 60 0000 C CNN
+F 3 "" H 3600 6450 60 0000 C CNN
+ 1 3600 6450
+ 0 -1 -1 0
+$EndComp
+$Comp
+L eSim_Diode D9
+U 1 1 640F75C0
+P 3650 5700
+F 0 "D9" H 3650 5800 50 0000 C CNN
+F 1 "eSim_Diode" H 3650 5600 50 0000 C CNN
+F 2 "" H 3650 5700 60 0000 C CNN
+F 3 "" H 3650 5700 60 0000 C CNN
+ 1 3650 5700
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D3
+U 1 1 640F75C6
+P 1700 7400
+F 0 "D3" H 1700 7500 50 0000 C CNN
+F 1 "eSim_Diode" V 1700 7300 50 0000 C CNN
+F 2 "" H 1700 7400 60 0000 C CNN
+F 3 "" H 1700 7400 60 0000 C CNN
+ 1 1700 7400
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 1250 6250 1650 6250
+Wire Wire Line
+ 1450 6250 1450 7400
+Wire Wire Line
+ 1450 7400 1550 7400
+Wire Wire Line
+ 3250 7400 1850 7400
+Connection ~ 3250 7100
+Wire Wire Line
+ 3500 5700 3250 5700
+Connection ~ 3250 5950
+Wire Wire Line
+ 3600 5950 3600 6300
+Wire Wire Line
+ 3600 7100 3600 6600
+Text GLabel 4000 5700 2 60 Input ~ 0
+COM
+Text GLabel 3800 7100 2 60 Input ~ 0
+E
+$Comp
+L PORT U1
+U 3 1 640F75D7
+P 1000 6250
+F 0 "U1" H 1050 6350 30 0000 C CNN
+F 1 "PORT" H 1000 6250 30 0000 C CNN
+F 2 "" H 1000 6250 60 0000 C CNN
+F 3 "" H 1000 6250 60 0000 C CNN
+ 3 1000 6250
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 640F75DD
+P 4000 5950
+F 0 "U1" H 4050 6050 30 0000 C CNN
+F 1 "PORT" H 4000 5950 30 0000 C CNN
+F 2 "" H 4000 5950 60 0000 C CNN
+F 3 "" H 4000 5950 60 0000 C CNN
+ 6 4000 5950
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_GND #PWR02
+U 1 1 640F75E3
+P 3250 7500
+F 0 "#PWR02" H 3250 7250 50 0001 C CNN
+F 1 "eSim_GND" H 3250 7350 50 0000 C CNN
+F 2 "" H 3250 7500 50 0001 C CNN
+F 3 "" H 3250 7500 50 0001 C CNN
+ 1 3250 7500
+ 1 0 0 -1
+$EndComp
+Connection ~ 3600 7100
+Connection ~ 1450 6250
+Connection ~ 3250 7400
+Connection ~ 3600 5950
+Wire Wire Line
+ 3800 5700 4000 5700
+Wire Wire Line
+ 3700 750 3900 750
+Connection ~ 3500 1000
+Connection ~ 3150 2450
+Connection ~ 1350 1300
+Connection ~ 3500 2150
+$Comp
+L eSim_GND #PWR03
+U 1 1 640F6C94
+P 3150 2550
+F 0 "#PWR03" H 3150 2300 50 0001 C CNN
+F 1 "eSim_GND" H 3150 2400 50 0000 C CNN
+F 2 "" H 3150 2550 50 0001 C CNN
+F 3 "" H 3150 2550 50 0001 C CNN
+ 1 3150 2550
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 640F6C63
+P 3900 1000
+F 0 "U1" H 3950 1100 30 0000 C CNN
+F 1 "PORT" H 3900 1000 30 0000 C CNN
+F 2 "" H 3900 1000 60 0000 C CNN
+F 3 "" H 3900 1000 60 0000 C CNN
+ 4 3900 1000
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 1 1 640F6C2E
+P 900 1300
+F 0 "U1" H 950 1400 30 0000 C CNN
+F 1 "PORT" H 900 1300 30 0000 C CNN
+F 2 "" H 900 1300 60 0000 C CNN
+F 3 "" H 900 1300 60 0000 C CNN
+ 1 900 1300
+ 1 0 0 -1
+$EndComp
+Text GLabel 3700 2150 2 60 Input ~ 0
+E
+Text GLabel 3900 750 2 60 Input ~ 0
+COM
+Wire Wire Line
+ 3500 2150 3500 1650
+Wire Wire Line
+ 3500 1000 3500 1350
+Connection ~ 3150 1000
+Wire Wire Line
+ 3400 750 3150 750
+Connection ~ 3150 2150
+Wire Wire Line
+ 3150 2450 1750 2450
+Wire Wire Line
+ 1350 2450 1450 2450
+Wire Wire Line
+ 1350 1300 1350 2450
+Wire Wire Line
+ 1150 1300 1550 1300
+$Comp
+L eSim_Diode D1
+U 1 1 640F6A62
+P 1600 2450
+F 0 "D1" H 1600 2550 50 0000 C CNN
+F 1 "eSim_Diode" V 1600 2350 50 0000 C CNN
+F 2 "" H 1600 2450 60 0000 C CNN
+F 3 "" H 1600 2450 60 0000 C CNN
+ 1 1600 2450
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_Diode D5
+U 1 1 640F6A03
+P 3550 750
+F 0 "D5" H 3550 850 50 0000 C CNN
+F 1 "eSim_Diode" H 3550 650 50 0000 C CNN
+F 2 "" H 3550 750 60 0000 C CNN
+F 3 "" H 3550 750 60 0000 C CNN
+ 1 3550 750
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D4
+U 1 1 640F69D8
+P 3500 1500
+F 0 "D4" V 3500 1600 50 0000 C CNN
+F 1 "eSim_Diode" H 3500 1400 50 0000 C CNN
+F 2 "" H 3500 1500 60 0000 C CNN
+F 3 "" H 3500 1500 60 0000 C CNN
+ 1 3500 1500
+ 0 -1 -1 0
+$EndComp
+Wire Wire Line
+ 3150 1900 3150 2550
+Wire Wire Line
+ 2800 2150 3700 2150
+Connection ~ 2300 1700
+Wire Wire Line
+ 3150 750 3150 1500
+Wire Wire Line
+ 2300 1000 3650 1000
+Wire Wire Line
+ 2300 1100 2300 1000
+Wire Wire Line
+ 2300 1700 2850 1700
+Connection ~ 2300 2150
+Wire Wire Line
+ 2300 1500 2300 2150
+Wire Wire Line
+ 2200 2150 2500 2150
+Connection ~ 1900 1300
+Wire Wire Line
+ 1900 1300 1900 2150
+Wire Wire Line
+ 1850 1300 2000 1300
+$Comp
+L resistor R7
+U 1 1 640F6853
+P 2600 2200
+F 0 "R7" H 2650 2330 50 0000 C CNN
+F 1 "3k" H 2650 2150 50 0000 C CNN
+F 2 "" H 2650 2180 30 0000 C CNN
+F 3 "" V 2650 2250 30 0000 C CNN
+ 1 2600 2200
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R4
+U 1 1 640F6826
+P 2000 2200
+F 0 "R4" H 2050 2330 50 0000 C CNN
+F 1 "7.2k" H 2050 2150 50 0000 C CNN
+F 2 "" H 2050 2180 30 0000 C CNN
+F 3 "" V 2050 2250 30 0000 C CNN
+ 1 2000 2200
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R1
+U 1 1 640F6805
+P 1650 1350
+F 0 "R1" H 1700 1480 50 0000 C CNN
+F 1 "2.7k" H 1700 1300 50 0000 C CNN
+F 2 "" H 1700 1330 30 0000 C CNN
+F 3 "" V 1700 1400 30 0000 C CNN
+ 1 1650 1350
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q4
+U 1 1 640F67EC
+P 3050 1700
+F 0 "Q4" H 2950 1750 50 0000 R CNN
+F 1 "eSim_NPN" H 3000 1850 50 0000 R CNN
+F 2 "" H 3250 1800 29 0000 C CNN
+F 3 "" H 3050 1700 60 0000 C CNN
+ 1 3050 1700
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q1
+U 1 1 640F67D5
+P 2200 1300
+F 0 "Q1" H 2100 1350 50 0000 R CNN
+F 1 "eSim_NPN" H 2150 1450 50 0000 R CNN
+F 2 "" H 2400 1400 29 0000 C CNN
+F 3 "" H 2200 1300 60 0000 C CNN
+ 1 2200 1300
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 7000 600 7200 600
+Connection ~ 6800 850
+Connection ~ 6450 2300
+Connection ~ 4650 1150
+Connection ~ 6800 2000
+$Comp
+L eSim_GND #PWR04
+U 1 1 640F7EE5
+P 6450 2400
+F 0 "#PWR04" H 6450 2150 50 0001 C CNN
+F 1 "eSim_GND" H 6450 2250 50 0000 C CNN
+F 2 "" H 6450 2400 50 0001 C CNN
+F 3 "" H 6450 2400 50 0001 C CNN
+ 1 6450 2400
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 12 1 640F7EEB
+P 7200 850
+F 0 "U1" H 7250 950 30 0000 C CNN
+F 1 "PORT" H 7200 850 30 0000 C CNN
+F 2 "" H 7200 850 60 0000 C CNN
+F 3 "" H 7200 850 60 0000 C CNN
+ 12 7200 850
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 7 1 640F7EF1
+P 4200 1150
+F 0 "U1" H 4250 1250 30 0000 C CNN
+F 1 "PORT" H 4200 1150 30 0000 C CNN
+F 2 "" H 4200 1150 60 0000 C CNN
+F 3 "" H 4200 1150 60 0000 C CNN
+ 7 4200 1150
+ 1 0 0 -1
+$EndComp
+Text GLabel 7000 2000 2 60 Input ~ 0
+E
+Text GLabel 7200 600 2 60 Input ~ 0
+COM
+Wire Wire Line
+ 6800 2000 6800 1500
+Wire Wire Line
+ 6800 850 6800 1200
+Connection ~ 6450 850
+Wire Wire Line
+ 6700 600 6450 600
+Connection ~ 6450 2000
+Wire Wire Line
+ 6450 2300 5050 2300
+Wire Wire Line
+ 4650 2300 4750 2300
+Wire Wire Line
+ 4650 1150 4650 2300
+Wire Wire Line
+ 4450 1150 4850 1150
+$Comp
+L eSim_Diode D10
+U 1 1 640F7F02
+P 4900 2300
+F 0 "D10" H 4900 2400 50 0000 C CNN
+F 1 "eSim_Diode" V 4900 2200 50 0000 C CNN
+F 2 "" H 4900 2300 60 0000 C CNN
+F 3 "" H 4900 2300 60 0000 C CNN
+ 1 4900 2300
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_Diode D14
+U 1 1 640F7F08
+P 6850 600
+F 0 "D14" H 6850 700 50 0000 C CNN
+F 1 "eSim_Diode" H 6850 500 50 0000 C CNN
+F 2 "" H 6850 600 60 0000 C CNN
+F 3 "" H 6850 600 60 0000 C CNN
+ 1 6850 600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D13
+U 1 1 640F7F0E
+P 6800 1350
+F 0 "D13" V 6800 1450 50 0000 C CNN
+F 1 "eSim_Diode" H 6800 1250 50 0000 C CNN
+F 2 "" H 6800 1350 60 0000 C CNN
+F 3 "" H 6800 1350 60 0000 C CNN
+ 1 6800 1350
+ 0 -1 -1 0
+$EndComp
+Wire Wire Line
+ 6450 1750 6450 2400
+Wire Wire Line
+ 6100 2000 7000 2000
+Connection ~ 5600 1550
+Wire Wire Line
+ 6450 600 6450 1350
+Wire Wire Line
+ 5600 850 6950 850
+Wire Wire Line
+ 5600 950 5600 850
+Wire Wire Line
+ 5600 1550 6150 1550
+Connection ~ 5600 2000
+Wire Wire Line
+ 5600 1350 5600 2000
+Wire Wire Line
+ 5500 2000 5800 2000
+Connection ~ 5200 1150
+Wire Wire Line
+ 5200 1150 5200 2000
+Wire Wire Line
+ 5150 1150 5300 1150
+$Comp
+L resistor R16
+U 1 1 640F7F21
+P 5900 2050
+F 0 "R16" H 5950 2180 50 0000 C CNN
+F 1 "3k" H 5950 2000 50 0000 C CNN
+F 2 "" H 5950 2030 30 0000 C CNN
+F 3 "" V 5950 2100 30 0000 C CNN
+ 1 5900 2050
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R11
+U 1 1 640F7F27
+P 5300 2050
+F 0 "R11" H 5350 2180 50 0000 C CNN
+F 1 "7.2k" H 5350 2000 50 0000 C CNN
+F 2 "" H 5350 2030 30 0000 C CNN
+F 3 "" V 5350 2100 30 0000 C CNN
+ 1 5300 2050
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R10
+U 1 1 640F7F2D
+P 4950 1200
+F 0 "R10" H 5000 1330 50 0000 C CNN
+F 1 "2.7k" H 5000 1150 50 0000 C CNN
+F 2 "" H 5000 1180 30 0000 C CNN
+F 3 "" V 5000 1250 30 0000 C CNN
+ 1 4950 1200
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q10
+U 1 1 640F7F33
+P 6350 1550
+F 0 "Q10" H 6250 1600 50 0000 R CNN
+F 1 "eSim_NPN" H 6300 1700 50 0000 R CNN
+F 2 "" H 6550 1650 29 0000 C CNN
+F 3 "" H 6350 1550 60 0000 C CNN
+ 1 6350 1550
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 640F7F39
+P 5500 1150
+F 0 "Q7" H 5400 1200 50 0000 R CNN
+F 1 "eSim_NPN" H 5450 1300 50 0000 R CNN
+F 2 "" H 5700 1250 29 0000 C CNN
+F 3 "" H 5500 1150 60 0000 C CNN
+ 1 5500 1150
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 640F8345
+P 5850 3600
+F 0 "Q8" H 5750 3650 50 0000 R CNN
+F 1 "eSim_NPN" H 5800 3750 50 0000 R CNN
+F 2 "" H 6050 3700 29 0000 C CNN
+F 3 "" H 5850 3600 60 0000 C CNN
+ 1 5850 3600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q11
+U 1 1 640F834B
+P 6700 4000
+F 0 "Q11" H 6600 4050 50 0000 R CNN
+F 1 "eSim_NPN" H 6650 4150 50 0000 R CNN
+F 2 "" H 6900 4100 29 0000 C CNN
+F 3 "" H 6700 4000 60 0000 C CNN
+ 1 6700 4000
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R12
+U 1 1 640F8351
+P 5300 3650
+F 0 "R12" H 5350 3780 50 0000 C CNN
+F 1 "2.7k" H 5350 3600 50 0000 C CNN
+F 2 "" H 5350 3630 30 0000 C CNN
+F 3 "" V 5350 3700 30 0000 C CNN
+ 1 5300 3650
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R14
+U 1 1 640F8357
+P 5650 4500
+F 0 "R14" H 5700 4630 50 0000 C CNN
+F 1 "7.2k" H 5700 4450 50 0000 C CNN
+F 2 "" H 5700 4480 30 0000 C CNN
+F 3 "" V 5700 4550 30 0000 C CNN
+ 1 5650 4500
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R17
+U 1 1 640F835D
+P 6250 4500
+F 0 "R17" H 6300 4630 50 0000 C CNN
+F 1 "3k" H 6300 4450 50 0000 C CNN
+F 2 "" H 6300 4480 30 0000 C CNN
+F 3 "" V 6300 4550 30 0000 C CNN
+ 1 6250 4500
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5500 3600 5650 3600
+Wire Wire Line
+ 5550 3600 5550 4450
+Connection ~ 5550 3600
+Wire Wire Line
+ 5850 4450 6150 4450
+Wire Wire Line
+ 5950 3800 5950 4450
+Connection ~ 5950 4450
+Wire Wire Line
+ 5950 4000 6500 4000
+Wire Wire Line
+ 5950 3400 5950 3300
+Wire Wire Line
+ 5950 3300 7300 3300
+Wire Wire Line
+ 6800 3050 6800 3800
+Connection ~ 5950 4000
+Wire Wire Line
+ 6450 4450 7350 4450
+Wire Wire Line
+ 6800 4200 6800 4850
+$Comp
+L eSim_Diode D15
+U 1 1 640F8370
+P 7150 3800
+F 0 "D15" V 7150 3900 50 0000 C CNN
+F 1 "eSim_Diode" H 7150 3700 50 0000 C CNN
+F 2 "" H 7150 3800 60 0000 C CNN
+F 3 "" H 7150 3800 60 0000 C CNN
+ 1 7150 3800
+ 0 -1 -1 0
+$EndComp
+$Comp
+L eSim_Diode D16
+U 1 1 640F8376
+P 7200 3050
+F 0 "D16" H 7200 3150 50 0000 C CNN
+F 1 "eSim_Diode" H 7200 2950 50 0000 C CNN
+F 2 "" H 7200 3050 60 0000 C CNN
+F 3 "" H 7200 3050 60 0000 C CNN
+ 1 7200 3050
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D11
+U 1 1 640F837C
+P 5250 4750
+F 0 "D11" H 5250 4850 50 0000 C CNN
+F 1 "eSim_Diode" V 5250 4650 50 0000 C CNN
+F 2 "" H 5250 4750 60 0000 C CNN
+F 3 "" H 5250 4750 60 0000 C CNN
+ 1 5250 4750
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 4800 3600 5200 3600
+Wire Wire Line
+ 5000 3600 5000 4750
+Wire Wire Line
+ 5000 4750 5100 4750
+Wire Wire Line
+ 6800 4750 5400 4750
+Connection ~ 6800 4450
+Wire Wire Line
+ 7050 3050 6800 3050
+Connection ~ 6800 3300
+Wire Wire Line
+ 7150 3300 7150 3650
+Wire Wire Line
+ 7150 4450 7150 3950
+Text GLabel 7550 3050 2 60 Input ~ 0
+COM
+Text GLabel 7350 4450 2 60 Input ~ 0
+E
+$Comp
+L PORT U1
+U 8 1 640F838D
+P 4550 3600
+F 0 "U1" H 4600 3700 30 0000 C CNN
+F 1 "PORT" H 4550 3600 30 0000 C CNN
+F 2 "" H 4550 3600 60 0000 C CNN
+F 3 "" H 4550 3600 60 0000 C CNN
+ 8 4550 3600
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 14 1 640F8393
+P 7550 3300
+F 0 "U1" H 7600 3400 30 0000 C CNN
+F 1 "PORT" H 7550 3300 30 0000 C CNN
+F 2 "" H 7550 3300 60 0000 C CNN
+F 3 "" H 7550 3300 60 0000 C CNN
+ 14 7550 3300
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_GND #PWR05
+U 1 1 640F8399
+P 6800 4850
+F 0 "#PWR05" H 6800 4600 50 0001 C CNN
+F 1 "eSim_GND" H 6800 4700 50 0000 C CNN
+F 2 "" H 6800 4850 50 0001 C CNN
+F 3 "" H 6800 4850 50 0001 C CNN
+ 1 6800 4850
+ 1 0 0 -1
+$EndComp
+Connection ~ 7150 4450
+Connection ~ 5000 3600
+Connection ~ 6800 4750
+Connection ~ 7150 3300
+Wire Wire Line
+ 7350 3050 7550 3050
+$Comp
+L eSim_NPN Q9
+U 1 1 640F8AC0
+P 6000 6150
+F 0 "Q9" H 5900 6200 50 0000 R CNN
+F 1 "eSim_NPN" H 5950 6300 50 0000 R CNN
+F 2 "" H 6200 6250 29 0000 C CNN
+F 3 "" H 6000 6150 60 0000 C CNN
+ 1 6000 6150
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q12
+U 1 1 640F8AC6
+P 6850 6550
+F 0 "Q12" H 6750 6600 50 0000 R CNN
+F 1 "eSim_NPN" H 6800 6700 50 0000 R CNN
+F 2 "" H 7050 6650 29 0000 C CNN
+F 3 "" H 6850 6550 60 0000 C CNN
+ 1 6850 6550
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R13
+U 1 1 640F8ACC
+P 5450 6200
+F 0 "R13" H 5500 6330 50 0000 C CNN
+F 1 "2.7k" H 5500 6150 50 0000 C CNN
+F 2 "" H 5500 6180 30 0000 C CNN
+F 3 "" V 5500 6250 30 0000 C CNN
+ 1 5450 6200
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R15
+U 1 1 640F8AD2
+P 5800 7050
+F 0 "R15" H 5850 7180 50 0000 C CNN
+F 1 "7.2k" H 5850 7000 50 0000 C CNN
+F 2 "" H 5850 7030 30 0000 C CNN
+F 3 "" V 5850 7100 30 0000 C CNN
+ 1 5800 7050
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R18
+U 1 1 640F8AD8
+P 6400 7050
+F 0 "R18" H 6450 7180 50 0000 C CNN
+F 1 "3k" H 6450 7000 50 0000 C CNN
+F 2 "" H 6450 7030 30 0000 C CNN
+F 3 "" V 6450 7100 30 0000 C CNN
+ 1 6400 7050
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5650 6150 5800 6150
+Wire Wire Line
+ 5700 6150 5700 7000
+Connection ~ 5700 6150
+Wire Wire Line
+ 6000 7000 6300 7000
+Wire Wire Line
+ 6100 6350 6100 7000
+Connection ~ 6100 7000
+Wire Wire Line
+ 6100 6550 6650 6550
+Wire Wire Line
+ 6100 5950 6100 5850
+Wire Wire Line
+ 6100 5850 7450 5850
+Wire Wire Line
+ 6950 5600 6950 6350
+Connection ~ 6100 6550
+Wire Wire Line
+ 6600 7000 7500 7000
+Wire Wire Line
+ 6950 6750 6950 7400
+$Comp
+L eSim_Diode D17
+U 1 1 640F8AEB
+P 7300 6350
+F 0 "D17" V 7300 6450 50 0000 C CNN
+F 1 "eSim_Diode" H 7300 6250 50 0000 C CNN
+F 2 "" H 7300 6350 60 0000 C CNN
+F 3 "" H 7300 6350 60 0000 C CNN
+ 1 7300 6350
+ 0 -1 -1 0
+$EndComp
+$Comp
+L eSim_Diode D18
+U 1 1 640F8AF1
+P 7350 5600
+F 0 "D18" H 7350 5700 50 0000 C CNN
+F 1 "eSim_Diode" H 7350 5500 50 0000 C CNN
+F 2 "" H 7350 5600 60 0000 C CNN
+F 3 "" H 7350 5600 60 0000 C CNN
+ 1 7350 5600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D12
+U 1 1 640F8AF7
+P 5400 7300
+F 0 "D12" H 5400 7400 50 0000 C CNN
+F 1 "eSim_Diode" V 5400 7200 50 0000 C CNN
+F 2 "" H 5400 7300 60 0000 C CNN
+F 3 "" H 5400 7300 60 0000 C CNN
+ 1 5400 7300
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 4950 6150 5350 6150
+Wire Wire Line
+ 5150 6150 5150 7300
+Wire Wire Line
+ 5150 7300 5250 7300
+Wire Wire Line
+ 6950 7300 5550 7300
+Connection ~ 6950 7000
+Wire Wire Line
+ 7200 5600 6950 5600
+Connection ~ 6950 5850
+Wire Wire Line
+ 7300 5850 7300 6200
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diff --git a/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.sub b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.sub new file mode 100644 index 00000000..33e714a2 --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803.sub @@ -0,0 +1,72 @@ +* Subcircuit IC_ULN2803
+.subckt IC_ULN2803 net-_d1-pad2_ net-_d2-pad2_ net-_d3-pad2_ net-_d4-pad2_ net-_d6-pad2_ net-_d7-pad2_ net-_d10-pad2_ net-_d11-pad2_ com net-_d12-pad2_ e net-_d13-pad2_ net-_d19-pad2_ net-_d15-pad2_ net-_d17-pad2_ net-_d20-pad2_ net-_d21-pad2_ net-_d23-pad2_
+* c:\fossee\esim\library\subcircuitlibrary\ic_uln2803\ic_uln2803.cir
+.include D.lib
+.include NPN.lib
+q2 net-_d6-pad2_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
+q5 net-_d6-pad2_ net-_q2-pad3_ e Q2N2222
+r2 net-_d2-pad2_ net-_q2-pad2_ 2.7k
+r5 net-_q2-pad2_ net-_q2-pad3_ 7.2k
+r8 net-_q2-pad3_ e 3k
+d6 e net-_d6-pad2_ 1N4148
+d8 net-_d6-pad2_ com 1N4148
+d2 e net-_d2-pad2_ 1N4148
+q3 net-_d7-pad2_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222
+q6 net-_d7-pad2_ net-_q3-pad3_ e Q2N2222
+r3 net-_d3-pad2_ net-_q3-pad2_ 2.7k
+r6 net-_q3-pad2_ net-_q3-pad3_ 7.2k
+r9 net-_q3-pad3_ e 3k
+d7 e net-_d7-pad2_ 1N4148
+d9 net-_d7-pad2_ com 1N4148
+d3 e net-_d3-pad2_ 1N4148
+d1 e net-_d1-pad2_ 1N4148
+d5 net-_d4-pad2_ com 1N4148
+d4 e net-_d4-pad2_ 1N4148
+r7 net-_q1-pad3_ e 3k
+r4 net-_q1-pad2_ net-_q1-pad3_ 7.2k
+r1 net-_d1-pad2_ net-_q1-pad2_ 2.7k
+q4 net-_d4-pad2_ net-_q1-pad3_ e Q2N2222
+q1 net-_d4-pad2_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+d10 e net-_d10-pad2_ 1N4148
+d14 net-_d13-pad2_ com 1N4148
+d13 e net-_d13-pad2_ 1N4148
+r16 net-_q10-pad2_ e 3k
+r11 net-_q7-pad2_ net-_q10-pad2_ 7.2k
+r10 net-_d10-pad2_ net-_q7-pad2_ 2.7k
+q10 net-_d13-pad2_ net-_q10-pad2_ e Q2N2222
+q7 net-_d13-pad2_ net-_q7-pad2_ net-_q10-pad2_ Q2N2222
+q8 net-_d15-pad2_ net-_q8-pad2_ net-_q11-pad2_ Q2N2222
+q11 net-_d15-pad2_ net-_q11-pad2_ e Q2N2222
+r12 net-_d11-pad2_ net-_q8-pad2_ 2.7k
+r14 net-_q8-pad2_ net-_q11-pad2_ 7.2k
+r17 net-_q11-pad2_ e 3k
+d15 e net-_d15-pad2_ 1N4148
+d16 net-_d15-pad2_ com 1N4148
+d11 e net-_d11-pad2_ 1N4148
+q9 net-_d17-pad2_ net-_q9-pad2_ net-_q12-pad2_ Q2N2222
+q12 net-_d17-pad2_ net-_q12-pad2_ e Q2N2222
+r13 net-_d12-pad2_ net-_q9-pad2_ 2.7k
+r15 net-_q9-pad2_ net-_q12-pad2_ 7.2k
+r18 net-_q12-pad2_ e 3k
+d17 e net-_d17-pad2_ 1N4148
+d18 net-_d17-pad2_ com 1N4148
+d12 e net-_d12-pad2_ 1N4148
+q13 net-_d21-pad2_ net-_q13-pad2_ net-_q13-pad3_ Q2N2222
+q15 net-_d21-pad2_ net-_q13-pad3_ e Q2N2222
+r19 net-_d19-pad2_ net-_q13-pad2_ 2.7k
+r20 net-_q13-pad2_ net-_q13-pad3_ 7.2k
+r23 net-_q13-pad3_ e 3k
+d21 e net-_d21-pad2_ 1N4148
+d22 net-_d21-pad2_ com 1N4148
+d19 e net-_d19-pad2_ 1N4148
+q14 net-_d23-pad2_ net-_q14-pad2_ net-_q14-pad3_ Q2N2222
+q16 net-_d23-pad2_ net-_q14-pad3_ e Q2N2222
+r21 net-_d20-pad2_ net-_q14-pad2_ 2.7k
+r22 net-_q14-pad2_ net-_q14-pad3_ 7.2k
+r24 net-_q14-pad3_ e 3k
+d23 e net-_d23-pad2_ 1N4148
+d24 net-_d23-pad2_ com 1N4148
+d20 e net-_d20-pad2_ 1N4148
+* Control Statements
+
+.ends IC_ULN2803
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803_Previous_Values.xml b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803_Previous_Values.xml new file mode 100644 index 00000000..f01bf79e --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/IC_ULN2803_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q5><d6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d6><d8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d8><d2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q6><d7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d7><d9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d9><d3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d3><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><d5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d5><d4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d4><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><d10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d10><d14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d14><d13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d13><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q8><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11><d15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d15><d16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d16><d11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d11><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q9><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q12><d17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d17><d18><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d18><d12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d12><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q13><q15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q15><d21><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d21><d22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d22><d19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d19><q14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q14><q16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q16><d23><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d23><d24><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d24><d20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d20></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_ULN2803/NPN.lib b/library/SubcircuitLibrary/IC_ULN2803/NPN.lib new file mode 100644 index 00000000..9c378ed8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_ULN2803/README.md b/library/SubcircuitLibrary/IC_ULN2803/README.md new file mode 100644 index 00000000..8a3f7f1c --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/README.md @@ -0,0 +1,16 @@ + +# IC_ULN2803 IC + +ULN2803 is a High-current Darlington Transistor Arrays IC. + + +## Documentation + +To know the details of ULN2803 IC please go through with the documentation : [ULN2803_datasheet](https://datasheet.lcsc.com/lcsc/2102221641_BL-Shanghai-Belling-ULN2803_C2690548.pdf) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/IC_ULN2803/analysis b/library/SubcircuitLibrary/IC_ULN2803/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_ULN2803/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/LOG101/LOG101-cache.lib b/library/SubcircuitLibrary/LOG101/LOG101-cache.lib new file mode 100644 index 00000000..22a2176b --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/LOG101-cache.lib @@ -0,0 +1,135 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_GND
+#
+DEF eSim_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "eSim_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.cir b/library/SubcircuitLibrary/LOG101/LOG101.cir new file mode 100644 index 00000000..c570faa5 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/LOG101.cir @@ -0,0 +1,18 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\LOG101\LOG101.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 02/23/23 15:07:29
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1 ? Net-_Q1-Pad1_ GND V- ? Net-_Q1-Pad3_ V+ ? lm_741
+X2 ? Net-_C1-Pad2_ GND V- ? Net-_C1-Pad1_ V+ ? lm_741
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 100p
+R1 Net-_C1-Pad1_ Net-_Q1-Pad2_ 15.72k
+R2 Net-_Q1-Pad2_ GND 1k
+U1 Net-_C1-Pad2_ Net-_Q1-Pad1_ V+ V- GND Net-_C1-Pad1_ PORT
+Q2 Net-_C1-Pad2_ GND Net-_Q1-Pad3_ eSim_NPN
+
+.end
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.cir.out b/library/SubcircuitLibrary/LOG101/LOG101.cir.out new file mode 100644 index 00000000..8592b8fc --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/LOG101.cir.out @@ -0,0 +1,21 @@ +* c:\fossee\esim\library\subcircuitlibrary\log101\log101.cir
+
+.include lm_741.sub
+.include NPN.lib
+x1 ? net-_q1-pad1_ gnd v- ? net-_q1-pad3_ v+ ? lm_741
+x2 ? net-_c1-pad2_ gnd v- ? net-_c1-pad1_ v+ ? lm_741
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+c1 net-_c1-pad1_ net-_c1-pad2_ 100p
+r1 net-_c1-pad1_ net-_q1-pad2_ 15.72k
+r2 net-_q1-pad2_ gnd 1k
+* u1 net-_c1-pad2_ net-_q1-pad1_ v+ v- gnd net-_c1-pad1_ port
+q2 net-_c1-pad2_ gnd net-_q1-pad3_ Q2N2222
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.pro b/library/SubcircuitLibrary/LOG101/LOG101.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/LOG101.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.sch b/library/SubcircuitLibrary/LOG101/LOG101.sch new file mode 100644 index 00000000..738a6da5 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/LOG101.sch @@ -0,0 +1,343 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:LOG101-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L lm_741 X1
+U 1 1 63EA744D
+P 5100 4650
+F 0 "X1" H 4900 4650 60 0000 C CNN
+F 1 "lm_741" H 5000 4400 60 0000 C CNN
+F 2 "" H 5100 4650 60 0000 C CNN
+F 3 "" H 5100 4650 60 0000 C CNN
+ 1 5100 4650
+ 1 0 0 -1
+$EndComp
+$Comp
+L lm_741 X2
+U 1 1 63EA74D9
+P 7000 4250
+F 0 "X2" H 6800 4250 60 0000 C CNN
+F 1 "lm_741" H 6900 4000 60 0000 C CNN
+F 2 "" H 7000 4250 60 0000 C CNN
+F 3 "" H 7000 4250 60 0000 C CNN
+ 1 7000 4250
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q1
+U 1 1 63EA7516
+P 5050 3650
+F 0 "Q1" H 4950 3700 50 0000 R CNN
+F 1 "eSim_NPN" H 5000 3800 50 0000 R CNN
+F 2 "" H 5250 3750 29 0000 C CNN
+F 3 "" H 5050 3650 60 0000 C CNN
+ 1 5050 3650
+ 0 -1 -1 0
+$EndComp
+Wire Wire Line
+ 4200 3550 4850 3550
+Wire Wire Line
+ 4550 4500 4550 3550
+Connection ~ 4550 3550
+Wire Wire Line
+ 5250 3550 5450 3550
+Wire Wire Line
+ 5650 4650 5650 4150
+Wire Wire Line
+ 5650 4150 5350 4150
+Wire Wire Line
+ 5350 4150 5350 3550
+Connection ~ 5350 3550
+Wire Wire Line
+ 5850 3550 6100 3550
+Wire Wire Line
+ 6100 3000 6100 4100
+Wire Wire Line
+ 6100 4100 6450 4100
+$Comp
+L capacitor C1
+U 1 1 63EA766F
+P 6500 3000
+F 0 "C1" H 6525 3100 50 0000 L CNN
+F 1 "100p" H 6525 2900 50 0000 L CNN
+F 2 "" H 6538 2850 30 0000 C CNN
+F 3 "" H 6500 3000 60 0000 C CNN
+ 1 6500 3000
+ 0 1 1 0
+$EndComp
+Wire Wire Line
+ 4150 3000 6350 3000
+Connection ~ 6100 3000
+Connection ~ 6100 3550
+$Comp
+L resistor R1
+U 1 1 63EA76F2
+P 7500 4600
+F 0 "R1" H 7550 4730 50 0000 C CNN
+F 1 "15.72k" H 7550 4550 50 0000 C CNN
+F 2 "" H 7550 4580 30 0000 C CNN
+F 3 "" V 7550 4650 30 0000 C CNN
+ 1 7500 4600
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R2
+U 1 1 63EA771B
+P 7500 5150
+F 0 "R2" H 7550 5280 50 0000 C CNN
+F 1 "1k" H 7550 5100 50 0000 C CNN
+F 2 "" H 7550 5130 30 0000 C CNN
+F 3 "" V 7550 5200 30 0000 C CNN
+ 1 7500 5150
+ 0 1 1 0
+$EndComp
+Wire Wire Line
+ 7550 5050 7550 4800
+Wire Wire Line
+ 5050 3850 5050 4000
+Wire Wire Line
+ 5050 4000 6000 4000
+Wire Wire Line
+ 6000 4000 6000 4950
+Wire Wire Line
+ 6000 4950 7550 4950
+Connection ~ 7550 4950
+Wire Wire Line
+ 7550 3000 7550 4500
+Wire Wire Line
+ 6650 3000 7550 3000
+Connection ~ 7550 4250
+$Comp
+L eSim_GND #PWR01
+U 1 1 63EA785A
+P 4400 4900
+F 0 "#PWR01" H 4400 4650 50 0001 C CNN
+F 1 "eSim_GND" H 4400 4750 50 0000 C CNN
+F 2 "" H 4400 4900 50 0001 C CNN
+F 3 "" H 4400 4900 50 0001 C CNN
+ 1 4400 4900
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_GND #PWR02
+U 1 1 63EA7880
+P 7550 5500
+F 0 "#PWR02" H 7550 5250 50 0001 C CNN
+F 1 "eSim_GND" H 7550 5350 50 0000 C CNN
+F 2 "" H 7550 5500 50 0001 C CNN
+F 3 "" H 7550 5500 50 0001 C CNN
+ 1 7550 5500
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_GND #PWR03
+U 1 1 63EA78A6
+P 5850 3900
+F 0 "#PWR03" H 5850 3650 50 0001 C CNN
+F 1 "eSim_GND" H 5850 3750 50 0000 C CNN
+F 2 "" H 5850 3900 50 0001 C CNN
+F 3 "" H 5850 3900 50 0001 C CNN
+ 1 5850 3900
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_GND #PWR04
+U 1 1 63EA78D5
+P 6350 4550
+F 0 "#PWR04" H 6350 4300 50 0001 C CNN
+F 1 "eSim_GND" H 6350 4400 50 0000 C CNN
+F 2 "" H 6350 4550 50 0001 C CNN
+F 3 "" H 6350 4550 50 0001 C CNN
+ 1 6350 4550
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4550 4750 4400 4750
+Wire Wire Line
+ 4400 4750 4400 4900
+Wire Wire Line
+ 7550 5500 7550 5350
+Wire Wire Line
+ 6450 4350 6350 4350
+Wire Wire Line
+ 6350 4350 6350 4550
+Wire Wire Line
+ 5650 3850 5850 3850
+Wire Wire Line
+ 5850 3850 5850 3900
+$Comp
+L PORT U1
+U 1 1 63EA7BBF
+P 3900 3000
+F 0 "U1" H 3950 3100 30 0000 C CNN
+F 1 "PORT" H 3900 3000 30 0000 C CNN
+F 2 "" H 3900 3000 60 0000 C CNN
+F 3 "" H 3900 3000 60 0000 C CNN
+ 1 3900 3000
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 63EA7EC1
+P 7950 4250
+F 0 "U1" H 8000 4350 30 0000 C CNN
+F 1 "PORT" H 7950 4250 30 0000 C CNN
+F 2 "" H 7950 4250 60 0000 C CNN
+F 3 "" H 7950 4250 60 0000 C CNN
+ 6 7950 4250
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 63EA7EEC
+P 3950 3550
+F 0 "U1" H 4000 3650 30 0000 C CNN
+F 1 "PORT" H 3950 3550 30 0000 C CNN
+F 2 "" H 3950 3550 60 0000 C CNN
+F 3 "" H 3950 3550 60 0000 C CNN
+ 2 3950 3550
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 63EA8093
+P 7900 5400
+F 0 "U1" H 7950 5500 30 0000 C CNN
+F 1 "PORT" H 7900 5400 30 0000 C CNN
+F 2 "" H 7900 5400 60 0000 C CNN
+F 3 "" H 7900 5400 60 0000 C CNN
+ 5 7900 5400
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 63EA8382
+P 5200 5800
+F 0 "U1" H 5250 5900 30 0000 C CNN
+F 1 "PORT" H 5200 5800 30 0000 C CNN
+F 2 "" H 5200 5800 60 0000 C CNN
+F 3 "" H 5200 5800 60 0000 C CNN
+ 3 5200 5800
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 63EA83BF
+P 6250 5800
+F 0 "U1" H 6300 5900 30 0000 C CNN
+F 1 "PORT" H 6250 5800 30 0000 C CNN
+F 2 "" H 6250 5800 60 0000 C CNN
+F 3 "" H 6250 5800 60 0000 C CNN
+ 4 6250 5800
+ -1 0 0 1
+$EndComp
+Text GLabel 5500 5500 0 60 Input ~ 0
+V+
+Text GLabel 5900 5500 2 60 Input ~ 0
+V-
+Wire Wire Line
+ 5550 5500 5500 5500
+Wire Wire Line
+ 5550 5500 5550 5800
+Connection ~ 5550 5800
+Wire Wire Line
+ 5900 5500 5850 5500
+Wire Wire Line
+ 5850 5500 5850 5800
+Connection ~ 5850 5800
+Text GLabel 5100 4150 2 60 Input ~ 0
+V+
+Text GLabel 7000 3650 2 60 Input ~ 0
+V+
+Text GLabel 5100 5250 2 60 Input ~ 0
+V-
+Text GLabel 7000 4800 2 60 Input ~ 0
+V-
+Wire Wire Line
+ 5100 4150 4950 4150
+Wire Wire Line
+ 4950 4150 4950 4200
+Wire Wire Line
+ 5100 5250 4950 5250
+Wire Wire Line
+ 4950 5250 4950 5100
+Wire Wire Line
+ 7000 3650 6850 3650
+Wire Wire Line
+ 6850 3650 6850 3800
+Wire Wire Line
+ 7000 4800 6850 4800
+Wire Wire Line
+ 6850 4800 6850 4700
+Wire Wire Line
+ 7650 5400 7550 5400
+Connection ~ 7550 5400
+Wire Wire Line
+ 7700 4250 7550 4250
+$Comp
+L eSim_NPN Q2
+U 1 1 63EA92EA
+P 5650 3650
+F 0 "Q2" H 5550 3700 50 0000 R CNN
+F 1 "eSim_NPN" H 5600 3800 50 0000 R CNN
+F 2 "" H 5850 3750 29 0000 C CNN
+F 3 "" H 5650 3650 60 0000 C CNN
+ 1 5650 3650
+ 0 1 -1 0
+$EndComp
+Wire Wire Line
+ 5550 5800 5450 5800
+Wire Wire Line
+ 5850 5800 6000 5800
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.sub b/library/SubcircuitLibrary/LOG101/LOG101.sub new file mode 100644 index 00000000..3d0c704a --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/LOG101.sub @@ -0,0 +1,15 @@ +* Subcircuit LOG101
+.subckt LOG101 net-_c1-pad2_ net-_q1-pad1_ v+ v- gnd net-_c1-pad1_
+* c:\fossee\esim\library\subcircuitlibrary\log101\log101.cir
+.include lm_741.sub
+.include NPN.lib
+x1 ? net-_q1-pad1_ gnd v- ? net-_q1-pad3_ v+ ? lm_741
+x2 ? net-_c1-pad2_ gnd v- ? net-_c1-pad1_ v+ ? lm_741
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+c1 net-_c1-pad1_ net-_c1-pad2_ 100p
+r1 net-_c1-pad1_ net-_q1-pad2_ 15.72k
+r2 net-_q1-pad2_ gnd 1k
+q2 net-_c1-pad2_ gnd net-_q1-pad3_ Q2N2222
+* Control Statements
+
+.ends LOG101
\ No newline at end of file diff --git a/library/SubcircuitLibrary/LOG101/LOG101_Previous_Values.xml b/library/SubcircuitLibrary/LOG101/LOG101_Previous_Values.xml new file mode 100644 index 00000000..db2cbdf0 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/LOG101_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2></devicemodel><subcircuit><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x1><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x2></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/LOG101/NPN.lib b/library/SubcircuitLibrary/LOG101/NPN.lib new file mode 100644 index 00000000..7f2f0319 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/LOG101/PNP.lib b/library/SubcircuitLibrary/LOG101/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/LOG101/README.md b/library/SubcircuitLibrary/LOG101/README.md new file mode 100644 index 00000000..c8b85446 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/README.md @@ -0,0 +1,16 @@ + +# IC_LOG101 IC + +LOG101 is a LOGARITHMIC AND LOG RATIO AMPLIFIER IC. + + +## Documentation + +To know the details of LOG101 IC please go through with the documentation : [LOG101_datasheet](https://www.ti.com/lit/ds/symlink/log101.pdf?ts=1690187676813&ref_url=https%253A%252F%252Fwww.google.co.in%252F) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/LOG101/analysis b/library/SubcircuitLibrary/LOG101/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/LOG101/lm_741-cache.lib b/library/SubcircuitLibrary/LOG101/lm_741-cache.lib new file mode 100644 index 00000000..6e908886 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741-cache.lib @@ -0,0 +1,119 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LOG101/lm_741-rescue.lib b/library/SubcircuitLibrary/LOG101/lm_741-rescue.lib new file mode 100644 index 00000000..bf8e4bd7 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741-rescue.lib @@ -0,0 +1,42 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# eSim_NPN-RESCUE-lm_741
+#
+DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP-RESCUE-lm_741
+#
+DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.cir b/library/SubcircuitLibrary/LOG101/lm_741.cir new file mode 100644 index 00000000..b7989199 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741.cir @@ -0,0 +1,43 @@ +* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+Q2 Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN
+Q6 Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP
+Q5 Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP
+Q3 Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN
+Q4 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q9 Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q8 Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN
+Q7 Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN
+R1 Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k
+R2 Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k
+R3 Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k
+Q12 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN
+Q13 Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN
+R4 Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k
+R11 Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k
+Q10 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q11 Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q14 Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN
+R8 Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k
+R7 Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30p
+Q16 Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN
+Q15 Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN
+R5 Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k
+R6 Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50
+Q17 Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN
+Q18 Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN
+Q20 Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN
+R9 Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25
+R10 Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50
+Q19 Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP
+U1 Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT
+
+.end
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.cir.out b/library/SubcircuitLibrary/LOG101/lm_741.cir.out new file mode 100644 index 00000000..01ede7ab --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741.cir.out @@ -0,0 +1,46 @@ +* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* u1 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.pro b/library/SubcircuitLibrary/LOG101/lm_741.pro new file mode 100644 index 00000000..222fb5cb --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741.pro @@ -0,0 +1,45 @@ +update=02/07/23 21:24:54
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=lm_741-rescue
+LibName2=power
+LibName3=eSim_Analog
+LibName4=eSim_Devices
+LibName5=eSim_Digital
+LibName6=eSim_Hybrid
+LibName7=eSim_Miscellaneous
+LibName8=eSim_Plot
+LibName9=eSim_Power
+LibName10=eSim_User
+LibName11=eSim_Sources
+LibName12=eSim_Subckt
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.sch b/library/SubcircuitLibrary/LOG101/lm_741.sch new file mode 100644 index 00000000..6a74cf22 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741.sch @@ -0,0 +1,697 @@ +EESchema Schematic File Version 2
+LIBS:power
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:lm_741-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 5CE90A7B
+P 2650 2700
+F 0 "Q1" H 2550 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 2600 2850 50 0000 R CNN
+F 2 "" H 2850 2800 29 0000 C CNN
+F 3 "" H 2650 2700 60 0000 C CNN
+ 1 2650 2700
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 5CE90A7C
+P 4300 2700
+F 0 "Q2" H 4200 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 4250 2850 50 0000 R CNN
+F 2 "" H 4500 2800 29 0000 C CNN
+F 3 "" H 4300 2700 60 0000 C CNN
+ 1 4300 2700
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 5CE90A7D
+P 3000 3200
+F 0 "Q6" H 2900 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 2950 3350 50 0000 R CNN
+F 2 "" H 3200 3300 29 0000 C CNN
+F 3 "" H 3000 3200 60 0000 C CNN
+ 1 3000 3200
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 5CE90A7E
+P 3950 3200
+F 0 "Q5" H 3850 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 3900 3350 50 0000 R CNN
+F 2 "" H 4150 3300 29 0000 C CNN
+F 3 "" H 3950 3200 60 0000 C CNN
+ 1 3950 3200
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 5CE90A7F
+P 3300 4000
+F 0 "Q3" H 3200 4050 50 0000 R CNN
+F 1 "eSim_NPN" H 3250 4150 50 0000 R CNN
+F 2 "" H 3500 4100 29 0000 C CNN
+F 3 "" H 3300 4000 60 0000 C CNN
+ 1 3300 4000
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 5CE90A80
+P 3850 2000
+F 0 "Q4" H 3750 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 3800 2150 50 0000 R CNN
+F 2 "" H 4050 2100 29 0000 C CNN
+F 3 "" H 3850 2000 60 0000 C CNN
+ 1 3850 2000
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q9
+U 1 1 5CE90A81
+P 5200 2000
+F 0 "Q9" H 5100 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 5150 2150 50 0000 R CNN
+F 2 "" H 5400 2100 29 0000 C CNN
+F 3 "" H 5200 2000 60 0000 C CNN
+ 1 5200 2000
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 5CE90A82
+P 3950 4600
+F 0 "Q8" H 3850 4650 50 0000 R CNN
+F 1 "eSim_NPN" H 3900 4750 50 0000 R CNN
+F 2 "" H 4150 4700 29 0000 C CNN
+F 3 "" H 3950 4600 60 0000 C CNN
+ 1 3950 4600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 5CE90A83
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diff --git a/library/SubcircuitLibrary/LOG101/lm_741.sub b/library/SubcircuitLibrary/LOG101/lm_741.sub new file mode 100644 index 00000000..4e4feca4 --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741.sub @@ -0,0 +1,40 @@ +* Subcircuit lm_741
+.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ?
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* Control Statements
+
+.ends lm_741
\ No newline at end of file diff --git a/library/SubcircuitLibrary/LOG101/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/LOG101/lm_741_Previous_Values.xml new file mode 100644 index 00000000..228572ce --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/lm_741_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><q1><field /></q1><q2><field /></q2><q6><field /></q6><q5><field /></q5><q3><field /></q3><q4><field /></q4><q9><field /></q9><q8><field /></q8><q7><field /></q7><q12><field /></q12><q13><field /></q13><q10><field /></q10><q11><field /></q11><q14><field /></q14><q16><field /></q16><q15><field /></q15><q17><field /></q17><q18><field /></q18><q20><field /></q20><q19><field /></q19></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/LOG101/npn_1.lib b/library/SubcircuitLibrary/LOG101/npn_1.lib new file mode 100644 index 00000000..4a863e3e --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/npn_1.lib @@ -0,0 +1,29 @@ +.model npn_1 NPN(
++ Vtf=1.7
++ Cjc=0.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.5p
++ Isc=0
++ Xtb=1.5
++ Rb=500
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=125
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+)
\ No newline at end of file diff --git a/library/SubcircuitLibrary/LOG101/pnp_1.lib b/library/SubcircuitLibrary/LOG101/pnp_1.lib new file mode 100644 index 00000000..c486429f --- /dev/null +++ b/library/SubcircuitLibrary/LOG101/pnp_1.lib @@ -0,0 +1,29 @@ +.model pnp_1 PNP(
++ Vtf=1.7
++ Cjc=1.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.3p
++ Isc=0
++ Xtb=1.5
++ Rb=250
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=25
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+)
\ No newline at end of file |