diff options
| author | Sunil Shetye | 2019-03-11 12:11:24 +0530 |
|---|---|---|
| committer | Sunil Shetye | 2019-07-01 17:41:27 +0530 |
| commit | 5e116a4676854289fabeb6cce57f3d01ae8f5709 (patch) | |
| tree | 317985a949497440e3bb98ac07ab0e2a0d5a9a1c | |
| parent | e9064e423b586c2a31926fb5a1e582e8d1f626f8 (diff) | |
| download | eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.tar.gz eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.tar.bz2 eSim-5e116a4676854289fabeb6cce57f3d01ae8f5709.zip | |
remove temporary files
127 files changed, 9 insertions, 13434 deletions
@@ -1,8 +1,16 @@ +*.bak +*.cir.ckt +*.log *.orig -*.py.bak +*.net *.pyc *.rej +_saved_* +*.swp +*~ esim-start.sh esim.desktop nghdl tags +build/ +dist/ diff --git a/Examples/4_bit_JK_ff/4_bit_JK_ff.bak b/Examples/4_bit_JK_ff/4_bit_JK_ff.bak deleted file mode 100644 index 36be9ab8..00000000 --- a/Examples/4_bit_JK_ff/4_bit_JK_ff.bak +++ /dev/null @@ -1,767 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:4_bit_JK_ff-rescue -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:4_bit_JK_ff-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L d_jkff U3 -U 1 1 5548DDEE -P 2750 3650 -F 0 "U3" H 2750 3650 60 0000 C CNN -F 1 "d_jkff" H 2800 3800 60 0000 C CNN -F 2 "" H 2750 3650 60 0000 C CNN -F 3 "" H 2750 3650 60 0000 C CNN - 1 2750 3650 - 1 0 0 -1 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v1 -U 1 1 5548DFB1 -P 1100 5600 -F 0 "v1" H 900 5700 60 0000 C CNN -F 1 "dc" H 900 5550 60 0000 C CNN -F 2 "R1" H 800 5600 60 0000 C CNN -F 3 "" H 1100 5600 60 0000 C CNN - 1 1100 5600 - 0 1 1 0 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v3 -U 1 1 5548E056 -P 1100 6800 -F 0 "v3" H 900 6900 60 0000 C CNN -F 1 "dc" H 900 6750 60 0000 C CNN -F 2 "R1" H 800 6800 60 0000 C CNN -F 3 "" H 1100 6800 60 0000 C CNN - 1 1100 6800 - 0 1 1 0 -$EndComp -$Comp -L GND-RESCUE-4_bit_JK_ff #PWR01 -U 1 1 5548E561 -P 650 7300 -F 0 "#PWR01" H 650 7050 50 0001 C CNN -F 1 "GND" H 650 7150 50 0000 C CNN -F 2 "" H 650 7300 60 0000 C CNN -F 3 "" H 650 7300 60 0000 C CNN - 1 650 7300 - 1 0 0 -1 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v4 -U 1 1 554A0BE0 -P 3550 5950 -F 0 "v4" H 3350 6050 60 0000 C CNN -F 1 "0" H 3350 5900 60 0000 C CNN -F 2 "R1" H 3250 5950 60 0000 C CNN -F 3 "" H 3550 5950 60 0000 C CNN - 1 3550 5950 - 0 1 1 0 -$EndComp -$Comp -L pulse v2 -U 1 1 554B519B -P 1100 6300 -F 0 "v2" H 900 6400 60 0000 C CNN -F 1 "pulse" H 900 6250 60 0000 C CNN -F 2 "R1" H 800 6300 60 0000 C CNN -F 3 "" H 1100 6300 60 0000 C CNN - 1 1100 6300 - 0 1 1 0 -$EndComp -$Comp -L d_jkff U5 -U 1 1 554B6244 -P 5150 3650 -F 0 "U5" H 5150 3650 60 0000 C CNN -F 1 "d_jkff" H 5200 3800 60 0000 C CNN -F 2 "" H 5150 3650 60 0000 C CNN -F 3 "" H 5150 3650 60 0000 C CNN - 1 5150 3650 - 1 0 0 -1 -$EndComp -$Comp -L d_jkff U7 -U 1 1 554B6332 -P 7450 3650 -F 0 "U7" H 7450 3650 60 0000 C CNN -F 1 "d_jkff" H 7500 3800 60 0000 C CNN -F 2 "" H 7450 3650 60 0000 C CNN -F 3 "" H 7450 3650 60 0000 C CNN - 1 7450 3650 - 1 0 0 -1 -$EndComp -$Comp -L d_jkff U10 -U 1 1 554B6384 -P 9650 3650 -F 0 "U10" H 9650 3650 60 0000 C CNN -F 1 "d_jkff" H 9700 3800 60 0000 C CNN -F 2 "" H 9650 3650 60 0000 C CNN -F 3 "" H 9650 3650 60 0000 C CNN - 1 9650 3650 - 1 0 0 -1 -$EndComp -$Comp -L d_and U6 -U 1 1 554B66D8 -P 6550 4750 -F 0 "U6" H 6550 4750 60 0000 C CNN -F 1 "d_and" H 6600 4850 60 0000 C CNN -F 2 "" H 6550 4750 60 0000 C CNN -F 3 "" H 6550 4750 60 0000 C CNN - 1 6550 4750 - 1 0 0 -1 -$EndComp -$Comp -L d_and U8 -U 1 1 554B6711 -P 8500 4800 -F 0 "U8" H 8500 4800 60 0000 C CNN -F 1 "d_and" H 8550 4900 60 0000 C CNN -F 2 "" H 8500 4800 60 0000 C CNN -F 3 "" H 8500 4800 60 0000 C CNN - 1 8500 4800 - 1 0 0 -1 -$EndComp -$Comp -L adc_bridge_4 U4 -U 1 1 554B701C -P 4900 6150 -F 0 "U4" H 4900 6150 60 0000 C CNN -F 1 "adc_bridge_4" H 4900 6450 60 0000 C CNN -F 2 "" H 4900 6150 60 0000 C CNN -F 3 "" H 4900 6150 60 0000 C CNN - 1 4900 6150 - 1 0 0 -1 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v10 -U 1 1 554B724D -P 3500 6400 -F 0 "v10" H 3300 6500 60 0000 C CNN -F 1 "0" H 3300 6350 60 0000 C CNN -F 2 "R1" H 3200 6400 60 0000 C CNN -F 3 "" H 3500 6400 60 0000 C CNN - 1 3500 6400 - 0 1 1 0 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v11 -U 1 1 554B72DB -P 3500 6700 -F 0 "v11" H 3300 6800 60 0000 C CNN -F 1 "0" H 3300 6650 60 0000 C CNN -F 2 "R1" H 3200 6700 60 0000 C CNN -F 3 "" H 3500 6700 60 0000 C CNN - 1 3500 6700 - 0 1 1 0 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v9 -U 1 1 554B7321 -P 3500 5450 -F 0 "v9" H 3300 5550 60 0000 C CNN -F 1 "0" H 3300 5400 60 0000 C CNN -F 2 "R1" H 3200 5450 60 0000 C CNN -F 3 "" H 3500 5450 60 0000 C CNN - 1 3500 5450 - 0 1 1 0 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v8 -U 1 1 554B79B1 -P 2200 1200 -F 0 "v8" H 2000 1300 60 0000 C CNN -F 1 "0" H 2000 1150 60 0000 C CNN -F 2 "R1" H 1900 1200 60 0000 C CNN -F 3 "" H 2200 1200 60 0000 C CNN - 1 2200 1200 - 0 1 1 0 -$EndComp -$Comp -L adc_bridge_4 U2 -U 1 1 554B79B7 -P 3550 1400 -F 0 "U2" H 3550 1400 60 0000 C CNN -F 1 "adc_bridge_4" H 3550 1700 60 0000 C CNN -F 2 "" H 3550 1400 60 0000 C CNN -F 3 "" H 3550 1400 60 0000 C CNN - 1 3550 1400 - 1 0 0 -1 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v6 -U 1 1 554B79BD -P 2150 1650 -F 0 "v6" H 1950 1750 60 0000 C CNN -F 1 "0" H 1950 1600 60 0000 C CNN -F 2 "R1" H 1850 1650 60 0000 C CNN -F 3 "" H 2150 1650 60 0000 C CNN - 1 2150 1650 - 0 1 1 0 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v7 -U 1 1 554B79C3 -P 2150 1950 -F 0 "v7" H 1950 2050 60 0000 C CNN -F 1 "0" H 1950 1900 60 0000 C CNN -F 2 "R1" H 1850 1950 60 0000 C CNN -F 3 "" H 2150 1950 60 0000 C CNN - 1 2150 1950 - 0 1 1 0 -$EndComp -$Comp -L dc-RESCUE-4_bit_JK_ff v5 -U 1 1 554B79C9 -P 2150 700 -F 0 "v5" H 1950 800 60 0000 C CNN -F 1 "0" H 1950 650 60 0000 C CNN -F 2 "R1" H 1850 700 60 0000 C CNN -F 3 "" H 2150 700 60 0000 C CNN - 1 2150 700 - 0 1 1 0 -$EndComp -$Comp -L adc_bridge_3 U1 -U 1 1 554B96E5 -P 2050 5150 -F 0 "U1" H 2050 5150 60 0000 C CNN -F 1 "adc_bridge_3" H 2050 5300 60 0000 C CNN -F 2 "" H 2050 5150 60 0000 C CNN -F 3 "" H 2050 5150 60 0000 C CNN - 1 2050 5150 - 0 -1 -1 0 -$EndComp -$Comp -L dac_bridge_4 U9 -U 1 1 554BA2AA -P 8550 2150 -F 0 "U9" H 8550 2150 60 0000 C CNN -F 1 "dac_bridge_4" H 8550 2450 60 0000 C CNN -F 2 "" H 8550 2150 60 0000 C CNN -F 3 "" H 8550 2150 60 0000 C CNN - 1 8550 2150 - 1 0 0 -1 -$EndComp -$Comp -L GND-RESCUE-4_bit_JK_ff #PWR02 -U 1 1 554B90FC -P 10850 2400 -F 0 "#PWR02" H 10850 2150 50 0001 C CNN -F 1 "GND" H 10850 2250 50 0000 C CNN -F 2 "" H 10850 2400 60 0000 C CNN -F 3 "" H 10850 2400 60 0000 C CNN - 1 10850 2400 - 1 0 0 -1 -$EndComp -$Comp -L GND-RESCUE-4_bit_JK_ff #PWR03 -U 1 1 554B95B8 -P 2800 7050 -F 0 "#PWR03" H 2800 6800 50 0001 C CNN -F 1 "GND" H 2800 6900 50 0000 C CNN -F 2 "" H 2800 7050 60 0000 C CNN -F 3 "" H 2800 7050 60 0000 C CNN - 1 2800 7050 - 1 0 0 -1 -$EndComp -$Comp -L GND-RESCUE-4_bit_JK_ff #PWR04 -U 1 1 554B9C35 -P 1400 2200 -F 0 "#PWR04" H 1400 1950 50 0001 C CNN -F 1 "GND" H 1400 2050 50 0000 C CNN -F 2 "" H 1400 2200 60 0000 C CNN -F 3 "" H 1400 2200 60 0000 C CNN - 1 1400 2200 - 1 0 0 -1 -$EndComp -$Comp -L GND-RESCUE-4_bit_JK_ff #PWR05 -U 1 1 554BA1F1 -P 10650 5500 -F 0 "#PWR05" H 10650 5250 50 0001 C CNN -F 1 "GND" H 10650 5350 50 0000 C CNN -F 2 "" H 10650 5500 60 0000 C CNN -F 3 "" H 10650 5500 60 0000 C CNN - 1 10650 5500 - 1 0 0 -1 -$EndComp -Text GLabel 1650 6150 1 60 Input ~ 0 -IN -Wire Wire Line - 650 5600 550 5600 -Wire Wire Line - 550 5600 550 7150 -Wire Wire Line - 550 7150 650 7150 -Wire Wire Line - 650 7150 650 7300 -Wire Wire Line - 650 6300 550 6300 -Connection ~ 550 6300 -Wire Wire Line - 650 6800 550 6800 -Connection ~ 550 6800 -Wire Wire Line - 5950 4100 6050 4100 -Wire Wire Line - 6050 4100 6050 4650 -Wire Wire Line - 6050 4650 6100 4650 -Wire Wire Line - 8250 4100 8300 4100 -Wire Wire Line - 8300 4100 8300 4500 -Wire Wire Line - 8300 4500 8050 4500 -Wire Wire Line - 8050 4500 8050 4700 -Wire Wire Line - 7000 4700 7850 4700 -Wire Wire Line - 7850 4700 7850 4800 -Wire Wire Line - 7850 4800 8050 4800 -Wire Wire Line - 6550 3250 6550 4500 -Wire Wire Line - 6550 4500 7300 4500 -Wire Wire Line - 7300 4500 7300 4700 -Connection ~ 7300 4700 -Wire Wire Line - 4200 3250 4200 4750 -Wire Wire Line - 4200 4750 6100 4750 -Wire Wire Line - 8650 3250 8650 4500 -Wire Wire Line - 8650 4500 8950 4500 -Wire Wire Line - 8950 4500 8950 4750 -Wire Wire Line - 8850 4100 8650 4100 -Connection ~ 8650 4100 -Wire Wire Line - 6650 4100 6550 4100 -Connection ~ 6550 4100 -Wire Wire Line - 3550 4100 4350 4100 -Connection ~ 4200 4100 -Wire Wire Line - 4350 3250 4200 3250 -Wire Wire Line - 6650 3250 6550 3250 -Wire Wire Line - 8850 3250 8650 3250 -Wire Wire Line - 3950 5450 4350 5450 -Wire Wire Line - 4350 5450 4350 5950 -Wire Wire Line - 4000 5950 4300 5950 -Wire Wire Line - 4300 5950 4300 6050 -Wire Wire Line - 4300 6050 4350 6050 -Wire Wire Line - 3950 6400 3950 6150 -Wire Wire Line - 3950 6150 4350 6150 -Wire Wire Line - 3950 6700 4100 6700 -Wire Wire Line - 4100 6700 4100 6250 -Wire Wire Line - 4100 6250 4350 6250 -Wire Wire Line - 5450 5950 5450 5000 -Wire Wire Line - 5450 5000 2750 5000 -Wire Wire Line - 2750 5000 2750 4450 -Wire Wire Line - 5450 6050 5700 6050 -Wire Wire Line - 5700 6050 5700 4450 -Wire Wire Line - 5700 4450 5150 4450 -Wire Wire Line - 5450 6150 7450 6150 -Wire Wire Line - 7450 6150 7450 4450 -Wire Wire Line - 5450 6250 9650 6250 -Wire Wire Line - 9650 6250 9650 4450 -Wire Wire Line - 2600 700 3000 700 -Wire Wire Line - 3000 700 3000 1200 -Wire Wire Line - 2650 1200 2850 1200 -Wire Wire Line - 2850 1200 2850 1300 -Wire Wire Line - 2850 1300 3000 1300 -Wire Wire Line - 2600 1650 2600 1400 -Wire Wire Line - 2600 1400 3000 1400 -Wire Wire Line - 2600 1950 3000 1950 -Wire Wire Line - 3000 1950 3000 1500 -Wire Wire Line - 4100 1500 4100 1750 -Wire Wire Line - 4100 1750 3100 1750 -Wire Wire Line - 3100 1750 3100 2750 -Wire Wire Line - 3100 2750 2750 2750 -Wire Wire Line - 2750 2750 2750 2900 -Wire Wire Line - 4100 1400 5150 1400 -Wire Wire Line - 5150 1400 5150 2900 -Wire Wire Line - 4100 1300 7450 1300 -Wire Wire Line - 7450 1300 7450 2900 -Wire Wire Line - 4100 1200 9650 1200 -Wire Wire Line - 9650 1200 9650 2900 -Wire Wire Line - 2100 4600 2100 4450 -Wire Wire Line - 1650 4450 2500 4450 -Wire Wire Line - 2500 4450 2500 5150 -Wire Wire Line - 2500 5150 8500 5150 -Wire Wire Line - 8500 5150 8500 3650 -Wire Wire Line - 8500 3650 8850 3650 -Wire Wire Line - 1950 3650 1650 3650 -Wire Wire Line - 1650 3650 1650 4450 -Connection ~ 2100 4450 -Wire Wire Line - 4350 3650 4100 3650 -Wire Wire Line - 4100 3650 4100 5150 -Connection ~ 4100 5150 -Wire Wire Line - 6650 3650 6400 3650 -Wire Wire Line - 6400 3650 6400 5150 -Connection ~ 6400 5150 -Wire Wire Line - 1550 6300 2100 6300 -Wire Wire Line - 2100 6300 2100 5750 -Wire Wire Line - 1550 5600 1550 5850 -Wire Wire Line - 1550 5850 2000 5850 -Wire Wire Line - 2000 5850 2000 5750 -Wire Wire Line - 1550 6800 2200 6800 -Wire Wire Line - 2200 6800 2200 5750 -Wire Wire Line - 2000 4600 1550 4600 -Wire Wire Line - 1550 4600 1550 3250 -Wire Wire Line - 1550 3250 1950 3250 -Wire Wire Line - 2200 4600 2200 4350 -Wire Wire Line - 2200 4350 1800 4350 -Wire Wire Line - 1800 4350 1800 4100 -Wire Wire Line - 1800 4100 1950 4100 -Wire Wire Line - 3550 3250 3850 3250 -Wire Wire Line - 3850 3250 3850 1950 -Wire Wire Line - 3850 1950 8000 1950 -Wire Wire Line - 6300 3250 5950 3250 -Wire Wire Line - 6300 2050 6300 3250 -Wire Wire Line - 6300 2050 8000 2050 -Wire Wire Line - 8250 3250 8250 2500 -Wire Wire Line - 8250 2500 6600 2500 -Wire Wire Line - 6600 2500 6600 2150 -Wire Wire Line - 6600 2150 8000 2150 -Wire Wire Line - 10450 3250 10450 2650 -Wire Wire Line - 10450 2650 7800 2650 -Wire Wire Line - 7800 2650 7800 2250 -Wire Wire Line - 7800 2250 8000 2250 -Wire Wire Line - 9100 1950 9300 1950 -Wire Wire Line - 9300 1950 9300 1800 -Wire Wire Line - 9300 1800 10200 1800 -Wire Wire Line - 9100 2050 9500 2050 -Wire Wire Line - 9500 2050 9500 1950 -Wire Wire Line - 9500 1950 10200 1950 -Wire Wire Line - 9100 2150 9700 2150 -Wire Wire Line - 9700 2150 9700 2100 -Wire Wire Line - 9700 2100 10200 2100 -Wire Wire Line - 9100 2250 10200 2250 -Wire Wire Line - 10500 1800 10850 1800 -Wire Wire Line - 10850 1800 10850 2400 -Wire Wire Line - 10500 1950 10850 1950 -Connection ~ 10850 1950 -Wire Wire Line - 10500 2100 10850 2100 -Connection ~ 10850 2100 -Wire Wire Line - 10500 2250 10850 2250 -Connection ~ 10850 2250 -Wire Wire Line - 3050 5450 2800 5450 -Wire Wire Line - 2800 5450 2800 7050 -Wire Wire Line - 3100 5950 2800 5950 -Connection ~ 2800 5950 -Wire Wire Line - 3050 6400 2800 6400 -Connection ~ 2800 6400 -Wire Wire Line - 3050 6700 2800 6700 -Connection ~ 2800 6700 -Wire Wire Line - 1700 700 1400 700 -Wire Wire Line - 1400 700 1400 2200 -Wire Wire Line - 1700 1950 1400 1950 -Connection ~ 1400 1950 -Wire Wire Line - 1700 1650 1400 1650 -Connection ~ 1400 1650 -Wire Wire Line - 1750 1200 1400 1200 -Connection ~ 1400 1200 -Wire Wire Line - 10450 4100 10650 4100 -Wire Wire Line - 10650 4100 10650 4200 -Wire Wire Line - 1650 6150 1650 6300 -Connection ~ 1650 6300 -Text GLabel 9150 1800 1 60 Input ~ 0 -D1 -Text GLabel 9400 2000 1 60 Input ~ 0 -D2 -Text GLabel 9200 2100 1 60 Input ~ 0 -D3 -Text GLabel 9400 2300 3 60 Input ~ 0 -D4 -Wire Wire Line - 9150 1800 9150 1950 -Connection ~ 9150 1950 -Wire Wire Line - 9400 2000 9400 2050 -Connection ~ 9400 2050 -Wire Wire Line - 9200 2100 9200 2150 -Connection ~ 9200 2150 -Wire Wire Line - 9400 2300 9400 2250 -Connection ~ 9400 2250 -$Comp -L R R1 -U 1 1 55D466F5 -P 10300 1850 -F 0 "R1" H 10350 1980 50 0000 C CNN -F 1 "1k" H 10350 1900 50 0000 C CNN -F 2 "" H 10350 1830 30 0000 C CNN -F 3 "" V 10350 1900 30 0000 C CNN - 1 10300 1850 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 55D46764 -P 10300 2000 -F 0 "R2" H 10350 2130 50 0000 C CNN -F 1 "1k" H 10350 2050 50 0000 C CNN -F 2 "" H 10350 1980 30 0000 C CNN -F 3 "" V 10350 2050 30 0000 C CNN - 1 10300 2000 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 55D467C3 -P 10300 2150 -F 0 "R3" H 10350 2280 50 0000 C CNN -F 1 "1k" H 10350 2200 50 0000 C CNN -F 2 "" H 10350 2130 30 0000 C CNN -F 3 "" V 10350 2200 30 0000 C CNN - 1 10300 2150 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 55D4681D -P 10300 2300 -F 0 "R4" H 10350 2430 50 0000 C CNN -F 1 "1k" H 10350 2350 50 0000 C CNN -F 2 "" H 10350 2280 30 0000 C CNN -F 3 "" V 10350 2350 30 0000 C CNN - 1 10300 2300 - 1 0 0 -1 -$EndComp -$Comp -L dac_bridge_1 U11 -U 1 1 55D45D81 -P 10600 4800 -F 0 "U11" H 10600 4800 60 0000 C CNN -F 1 "dac_bridge_1" H 10600 4950 60 0000 C CNN -F 2 "" H 10600 4800 60 0000 C CNN -F 3 "" H 10600 4800 60 0000 C CNN - 1 10600 4800 - 0 1 1 0 -$EndComp -Wire Wire Line - 10650 5350 10650 5500 -$Comp -L plot_v1 U12 -U 1 1 56D836F6 -P 9400 1900 -F 0 "U12" H 9400 2400 60 0000 C CNN -F 1 "plot_v1" H 9600 2250 60 0000 C CNN -F 2 "" H 9400 1900 60 0000 C CNN -F 3 "" H 9400 1900 60 0000 C CNN - 1 9400 1900 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U14 -U 1 1 56D837A6 -P 9950 2050 -F 0 "U14" H 9950 2550 60 0000 C CNN -F 1 "plot_v1" H 10150 2400 60 0000 C CNN -F 2 "" H 9950 2050 60 0000 C CNN -F 3 "" H 9950 2050 60 0000 C CNN - 1 9950 2050 - 1 0 0 1 -$EndComp -$Comp -L plot_v1 U15 -U 1 1 56D84035 -P 10000 2300 -F 0 "U15" H 10000 2800 60 0000 C CNN -F 1 "plot_v1" H 10200 2650 60 0000 C CNN -F 2 "" H 10000 2300 60 0000 C CNN -F 3 "" H 10000 2300 60 0000 C CNN - 1 10000 2300 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U13 -U 1 1 56D840C8 -P 9700 2150 -F 0 "U13" H 9700 2650 60 0000 C CNN -F 1 "plot_v1" H 9900 2500 60 0000 C CNN -F 2 "" H 9700 2150 60 0000 C CNN -F 3 "" H 9700 2150 60 0000 C CNN - 1 9700 2150 - 1 0 0 -1 -$EndComp -Wire Wire Line - 9400 1700 9400 1800 -Connection ~ 9400 1800 -Connection ~ 9700 1950 -Connection ~ 10000 2100 -Connection ~ 9950 2250 -$EndSCHEMATC diff --git a/Examples/BJT_Biascircuit/BJT_Biascircuit.bak b/Examples/BJT_Biascircuit/BJT_Biascircuit.bak deleted file mode 100644 index 56b6dc99..00000000 --- a/Examples/BJT_Biascircuit/BJT_Biascircuit.bak +++ /dev/null @@ -1,168 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:BJT_Biascircuit-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L NPN Q1 -U 1 1 56A86C4C -P 5350 3200 -F 0 "Q1" H 5250 3250 50 0000 R CNN -F 1 "NPN" H 5300 3350 50 0000 R CNN -F 2 "" H 5550 3300 29 0000 C CNN -F 3 "" H 5350 3200 60 0000 C CNN - 1 5350 3200 - 1 0 0 -1 -$EndComp -$Comp -L idc IDC1 -U 1 1 56A86C91 -P 4150 3800 -F 0 "IDC1" H 3950 3900 60 0000 C CNN -F 1 "idc" H 3950 3750 60 0000 C CNN -F 2 "R1" H 3850 3800 60 0000 C CNN -F 3 "" H 4150 3800 60 0000 C CNN - 1 4150 3800 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 56A86D0E -P 6600 3050 -F 0 "v1" H 6400 3150 60 0000 C CNN -F 1 "DC" H 6400 3000 60 0000 C CNN -F 2 "R1" H 6300 3050 60 0000 C CNN -F 3 "" H 6600 3050 60 0000 C CNN - 1 6600 3050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56A86D80 -P 5450 4300 -F 0 "#PWR01" H 5450 4050 50 0001 C CNN -F 1 "GND" H 5450 4150 50 0000 C CNN -F 2 "" H 5450 4300 50 0000 C CNN -F 3 "" H 5450 4300 50 0000 C CNN - 1 5450 4300 - 1 0 0 -1 -$EndComp -Text GLabel 4150 3100 0 60 Input ~ 0 -ib -Text GLabel 6550 2350 2 60 Input ~ 0 -vce -$Comp -L DC vic2 -U 1 1 56C42073 -P 6000 2450 -F 0 "vic2" H 5800 2550 60 0000 C CNN -F 1 "0" H 5800 2400 60 0000 C CNN -F 2 "R1" H 5700 2450 60 0000 C CNN -F 3 "" H 6000 2450 60 0000 C CNN - 1 6000 2450 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 56C44AD7 -P 5400 2650 -F 0 "R1" H 5450 2780 50 0000 C CNN -F 1 "1k" H 5450 2700 50 0000 C CNN -F 2 "" H 5450 2630 30 0000 C CNN -F 3 "" V 5450 2700 30 0000 C CNN - 1 5400 2650 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 56C44C4B -P 4800 3150 -F 0 "R2" H 4850 3280 50 0000 C CNN -F 1 "1k" H 4850 3200 50 0000 C CNN -F 2 "" H 4850 3130 30 0000 C CNN -F 3 "" V 4850 3200 30 0000 C CNN - 1 4800 3150 - -1 0 0 1 -$EndComp -Wire Wire Line - 4150 3200 4150 3350 -Wire Wire Line - 5450 3400 5450 4300 -Wire Wire Line - 4150 4250 6600 4250 -Connection ~ 5450 4250 -Wire Wire Line - 6600 2450 6600 2600 -Wire Wire Line - 6600 4250 6600 3500 -Wire Wire Line - 6550 2350 6500 2350 -Wire Wire Line - 6500 2350 6500 2450 -Connection ~ 6500 2450 -Wire Wire Line - 4150 3100 4300 3100 -Wire Wire Line - 4300 3100 4300 3200 -Connection ~ 4300 3200 -Wire Wire Line - 6450 2450 6600 2450 -Wire Wire Line - 5450 2450 5550 2450 -Wire Wire Line - 5450 2550 5450 2450 -Wire Wire Line - 5450 2850 5450 3000 -Wire Wire Line - 5150 3200 4900 3200 -Wire Wire Line - 4150 3200 4600 3200 -$EndSCHEMATC diff --git a/Examples/BJT_CB_config/BJT_CB_config.bak b/Examples/BJT_CB_config/BJT_CB_config.bak deleted file mode 100644 index 78bffc62..00000000 --- a/Examples/BJT_CB_config/BJT_CB_config.bak +++ /dev/null @@ -1,171 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:BJT_CB_config-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L NPN Q1 -U 1 1 56A86C4C -P 5450 3200 -F 0 "Q1" H 5350 3250 50 0000 R CNN -F 1 "NPN" H 5400 3350 50 0000 R CNN -F 2 "" H 5650 3300 29 0000 C CNN -F 3 "" H 5450 3200 60 0000 C CNN - 1 5450 3200 - 0 1 -1 0 -$EndComp -$Comp -L DC v1 -U 1 1 56A86D0E -P 6600 3050 -F 0 "v1" H 6400 3150 60 0000 C CNN -F 1 "DC" H 6400 3000 60 0000 C CNN -F 2 "R1" H 6300 3050 60 0000 C CNN -F 3 "" H 6600 3050 60 0000 C CNN - 1 6600 3050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56A86D80 -P 5450 4300 -F 0 "#PWR01" H 5450 4050 50 0001 C CNN -F 1 "GND" H 5450 4150 50 0000 C CNN -F 2 "" H 5450 4300 50 0000 C CNN -F 3 "" H 5450 4300 50 0000 C CNN - 1 5450 4300 - 1 0 0 -1 -$EndComp -Text GLabel 4250 3000 0 60 Input ~ 0 -ib -Text GLabel 6750 2300 2 60 Input ~ 0 -vce -$Comp -L R R1 -U 1 1 56C44AD7 -P 5600 2750 -F 0 "R1" H 5650 2880 50 0000 C CNN -F 1 "1k" H 5650 2800 50 0000 C CNN -F 2 "" H 5650 2730 30 0000 C CNN -F 3 "" V 5650 2800 30 0000 C CNN - 1 5600 2750 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 56C44C4B -P 4900 3050 -F 0 "R2" H 4950 3180 50 0000 C CNN -F 1 "1k" H 4950 3100 50 0000 C CNN -F 2 "" H 4950 3030 30 0000 C CNN -F 3 "" V 4950 3100 30 0000 C CNN - 1 4900 3050 - -1 0 0 1 -$EndComp -Wire Wire Line - 5450 3400 5450 4300 -Wire Wire Line - 4150 4250 6600 4250 -Connection ~ 5450 4250 -Wire Wire Line - 6600 4250 6600 3500 -Wire Wire Line - 6750 2300 6700 2300 -Wire Wire Line - 4250 3000 4400 3000 -Wire Wire Line - 4400 3000 4400 3100 -Connection ~ 4400 3100 -Wire Wire Line - 5650 2450 5650 2650 -Wire Wire Line - 5650 2950 5650 3100 -Wire Wire Line - 5250 3100 5000 3100 -Wire Wire Line - 4150 3100 4700 3100 -Wire Wire Line - 6550 2450 6600 2450 -Wire Wire Line - 6600 2450 6600 2600 -Wire Wire Line - 6700 2300 6700 2500 -Wire Wire Line - 6700 2500 6600 2500 -Connection ~ 6600 2500 -Wire Wire Line - 4150 3350 4150 3100 -$Comp -L plot_i2 U_ic1 -U 1 1 56CC385D -P 6250 2200 -F 0 "U_ic1" H 6250 2600 60 0000 C CNN -F 1 "plot_i2" H 6250 2300 60 0000 C CNN -F 2 "" H 6250 2200 60 0000 C CNN -F 3 "" H 6250 2200 60 0000 C CNN - 1 6250 2200 - -1 0 0 1 -$EndComp -Wire Wire Line - 5650 2450 5950 2450 -$Comp -L dc I1 -U 1 1 56CC3A22 -P 4150 3800 -F 0 "I1" H 3950 3900 60 0000 C CNN -F 1 "dc" H 3950 3750 60 0000 C CNN -F 2 "R1" H 3850 3800 60 0000 C CNN -F 3 "" H 4150 3800 60 0000 C CNN - 1 4150 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/BJT_CE_config/BJT_CE_config.bak b/Examples/BJT_CE_config/BJT_CE_config.bak deleted file mode 100644 index db6cd27d..00000000 --- a/Examples/BJT_CE_config/BJT_CE_config.bak +++ /dev/null @@ -1,167 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L NPN Q1 -U 1 1 56A86C4C -P 5350 3200 -F 0 "Q1" H 5250 3250 50 0000 R CNN -F 1 "NPN" H 5300 3350 50 0000 R CNN -F 2 "" H 5550 3300 29 0000 C CNN -F 3 "" H 5350 3200 60 0000 C CNN - 1 5350 3200 - 1 0 0 -1 -$EndComp -$Comp -L idc IDC1 -U 1 1 56A86C91 -P 4150 3800 -F 0 "IDC1" H 3950 3900 60 0000 C CNN -F 1 "idc" H 3950 3750 60 0000 C CNN -F 2 "R1" H 3850 3800 60 0000 C CNN -F 3 "" H 4150 3800 60 0000 C CNN - 1 4150 3800 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 56A86D0E -P 6600 3050 -F 0 "v1" H 6400 3150 60 0000 C CNN -F 1 "DC" H 6400 3000 60 0000 C CNN -F 2 "R1" H 6300 3050 60 0000 C CNN -F 3 "" H 6600 3050 60 0000 C CNN - 1 6600 3050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56A86D80 -P 5450 4300 -F 0 "#PWR01" H 5450 4050 50 0001 C CNN -F 1 "GND" H 5450 4150 50 0000 C CNN -F 2 "" H 5450 4300 50 0000 C CNN -F 3 "" H 5450 4300 50 0000 C CNN - 1 5450 4300 - 1 0 0 -1 -$EndComp -Text GLabel 4150 3100 0 60 Input ~ 0 -ib -Text GLabel 6550 2350 2 60 Input ~ 0 -vce -$Comp -L DC vic2 -U 1 1 56C42073 -P 6000 2450 -F 0 "vic2" H 5800 2550 60 0000 C CNN -F 1 "0" H 5800 2400 60 0000 C CNN -F 2 "R1" H 5700 2450 60 0000 C CNN -F 3 "" H 6000 2450 60 0000 C CNN - 1 6000 2450 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 56C44AD7 -P 5400 2650 -F 0 "R1" H 5450 2780 50 0000 C CNN -F 1 "1k" H 5450 2700 50 0000 C CNN -F 2 "" H 5450 2630 30 0000 C CNN -F 3 "" V 5450 2700 30 0000 C CNN - 1 5400 2650 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 56C44C4B -P 4800 3150 -F 0 "R2" H 4850 3280 50 0000 C CNN -F 1 "1k" H 4850 3200 50 0000 C CNN -F 2 "" H 4850 3130 30 0000 C CNN -F 3 "" V 4850 3200 30 0000 C CNN - 1 4800 3150 - -1 0 0 1 -$EndComp -Wire Wire Line - 4150 3200 4150 3350 -Wire Wire Line - 5450 3400 5450 4300 -Wire Wire Line - 4150 4250 6600 4250 -Connection ~ 5450 4250 -Wire Wire Line - 6600 2450 6600 2600 -Wire Wire Line - 6600 4250 6600 3500 -Wire Wire Line - 6550 2350 6500 2350 -Wire Wire Line - 6500 2350 6500 2450 -Connection ~ 6500 2450 -Wire Wire Line - 4150 3100 4300 3100 -Wire Wire Line - 4300 3100 4300 3200 -Connection ~ 4300 3200 -Wire Wire Line - 6450 2450 6600 2450 -Wire Wire Line - 5450 2450 5550 2450 -Wire Wire Line - 5450 2550 5450 2450 -Wire Wire Line - 5450 2850 5450 3000 -Wire Wire Line - 5150 3200 4900 3200 -Wire Wire Line - 4150 3200 4600 3200 -$EndSCHEMATC diff --git a/Examples/BJT_Frequency_Response/BJT_Frequency_Response.net b/Examples/BJT_Frequency_Response/BJT_Frequency_Response.net deleted file mode 100644 index 8108d16b..00000000 --- a/Examples/BJT_Frequency_Response/BJT_Frequency_Response.net +++ /dev/null @@ -1,211 +0,0 @@ -(export (version D) - (design - (source /home/fossee/eSim-Workspace/BJT_Frequency_Response/BJT_Frequency_Response.sch) - (date "Thu Feb 25 20:59:25 2016") - (tool "Eeschema 4.0.2-4+6225~38~ubuntu14.04.1-stable") - (sheet (number 1) (name /) (tstamps /) - (title_block - (title) - (company) - (rev) - (date "6 jun 2013") - (source BJT_Frequency_Response.sch) - (comment (number 1) (value "")) - (comment (number 2) (value "")) - (comment (number 3) (value "")) - (comment (number 4) (value ""))))) - (components - (comp (ref v1) - (value DC) - (footprint R1) - (libsource (lib eSim_Sources) (part DC)) - (sheetpath (names /) (tstamps /)) - (tstamp 51A5D97E)) - (comp (ref v2) - (value AC) - (footprint R1) - (libsource (lib eSim_Sources) (part AC)) - (sheetpath (names /) (tstamps /)) - (tstamp 51A486A5)) - (comp (ref C1) - (value 40u) - (libsource (lib eSim_Devices) (part C)) - (sheetpath (names /) (tstamps /)) - (tstamp 51A47FA0)) - (comp (ref C2) - (value 100u) - (libsource (lib eSim_Devices) (part C)) - (sheetpath (names /) (tstamps /)) - (tstamp 51A47F80)) - (comp (ref C3) - (value 40u) - (libsource (lib eSim_Devices) (part C)) - (sheetpath (names /) (tstamps /)) - (tstamp 51A47F75)) - (comp (ref Q1) - (value NPN) - (libsource (lib eSim_Devices) (part NPN)) - (sheetpath (names /) (tstamps /)) - (tstamp 557583B4)) - (comp (ref R3) - (value 50k) - (libsource (lib eSim_Devices) (part R)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C1B05C)) - (comp (ref R4) - (value 1.5k) - (libsource (lib eSim_Devices) (part R)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C1B119)) - (comp (ref R6) - (value 1k) - (libsource (lib eSim_Devices) (part R)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C1B187)) - (comp (ref R5) - (value 2k) - (libsource (lib eSim_Devices) (part R)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C1B28B)) - (comp (ref R2) - (value 200k) - (libsource (lib eSim_Devices) (part R)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C1B323)) - (comp (ref R1) - (value 50) - (libsource (lib eSim_Devices) (part R)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C1B3CB)) - (comp (ref U3) - (value plot_log) - (libsource (lib eSim_Plot) (part plot_log)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C56A02)) - (comp (ref U2) - (value plot_phase) - (libsource (lib eSim_Plot) (part plot_phase)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C56AB2)) - (comp (ref U1) - (value plot_v1) - (libsource (lib eSim_Plot) (part plot_v1)) - (sheetpath (names /) (tstamps /)) - (tstamp 56C56E8A))) - (libparts - (libpart (lib eSim_Sources) (part AC) - (footprints - (fp 1_pin)) - (fields - (field (name Reference) v) - (field (name Value) AC) - (field (name Footprint) R1)) - (pins - (pin (num 1) (name +) (type input)) - (pin (num 2) (name -) (type input)))) - (libpart (lib eSim_Devices) (part C) - (description "Unpolarized capacitor") - (footprints - (fp C?) - (fp C_????_*) - (fp C_????) - (fp SMD*_c) - (fp Capacitor*)) - (fields - (field (name Reference) C) - (field (name Value) C)) - (pins - (pin (num 1) (name ~) (type passive)) - (pin (num 2) (name ~) (type passive)))) - (libpart (lib eSim_Sources) (part DC) - (footprints - (fp 1_pin)) - (fields - (field (name Reference) v) - (field (name Value) DC) - (field (name Footprint) R1)) - (pins - (pin (num 1) (name +) (type passive)) - (pin (num 2) (name -) (type passive)))) - (libpart (lib eSim_Devices) (part NPN) - (description "Transistor NPN (general)") - (fields - (field (name Reference) Q) - (field (name Value) NPN)) - (pins - (pin (num 1) (name C) (type openCol)) - (pin (num 2) (name B) (type input)) - (pin (num 3) (name E) (type openEm)))) - (libpart (lib eSim_Devices) (part R) - (description Resistor) - (footprints - (fp R_*) - (fp Resistor_*)) - (fields - (field (name Reference) R) - (field (name Value) R)) - (pins - (pin (num 1) (name ~) (type passive)) - (pin (num 2) (name ~) (type passive)))) - (libpart (lib eSim_Plot) (part plot_log) - (fields - (field (name Reference) U) - (field (name Value) plot_log)) - (pins - (pin (num ~) (name ~) (type input)))) - (libpart (lib eSim_Plot) (part plot_phase) - (fields - (field (name Reference) U) - (field (name Value) plot_phase)) - (pins - (pin (num ~) (name ~) (type input)))) - (libpart (lib eSim_Plot) (part plot_v1) - (fields - (field (name Reference) U) - (field (name Value) plot_v1)) - (pins - (pin (num ~) (name ~) (type input))))) - (libraries - (library (logical eSim_Devices) - (uri /usr/share/kicad/library/eSim_Devices.lib)) - (library (logical eSim_Sources) - (uri /usr/share/kicad/library/eSim_Sources.lib)) - (library (logical eSim_Plot) - (uri /usr/share/kicad/library/eSim_Plot.lib))) - (nets - (net (code 1) (name out) - (node (ref R6) (pin 1)) - (node (ref U3) (pin ~)) - (node (ref U2) (pin ~)) - (node (ref C3) (pin 1))) - (net (code 2) (name in) - (node (ref v2) (pin 1)) - (node (ref U1) (pin ~)) - (node (ref R1) (pin 2))) - (net (code 3) (name "Net-(C1-Pad1)") - (node (ref R1) (pin 1)) - (node (ref C1) (pin 1))) - (net (code 4) (name "Net-(C2-Pad2)") - (node (ref Q1) (pin 3)) - (node (ref C2) (pin 2)) - (node (ref R4) (pin 1))) - (net (code 5) (name "Net-(C3-Pad2)") - (node (ref Q1) (pin 1)) - (node (ref C3) (pin 2)) - (node (ref R5) (pin 2))) - (net (code 6) (name "Net-(C1-Pad2)") - (node (ref Q1) (pin 2)) - (node (ref C1) (pin 2)) - (node (ref R2) (pin 2)) - (node (ref R3) (pin 1))) - (net (code 7) (name GND) - (node (ref v1) (pin 2)) - (node (ref C2) (pin 1)) - (node (ref R3) (pin 2)) - (node (ref R4) (pin 2)) - (node (ref R6) (pin 2)) - (node (ref v2) (pin 2))) - (net (code 8) (name "Net-(R2-Pad1)") - (node (ref R2) (pin 1)) - (node (ref R5) (pin 1)) - (node (ref v1) (pin 1)))))
\ No newline at end of file diff --git a/Examples/BJT_amplifier/BJT_amplifier b/Examples/BJT_amplifier/BJT_amplifier deleted file mode 100644 index e69de29b..00000000 --- a/Examples/BJT_amplifier/BJT_amplifier +++ /dev/null diff --git a/Examples/BJT_amplifier/BJT_amplifier-cache.bak b/Examples/BJT_amplifier/BJT_amplifier-cache.bak deleted file mode 100644 index a2c30517..00000000 --- a/Examples/BJT_amplifier/BJT_amplifier-cache.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 04 June 2013 10:39:51 PM IST -#encoding utf-8 -# -# AC -# -DEF AC v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - 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R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/BJT_amplifier/BJT_amplifier.bak b/Examples/BJT_amplifier/BJT_amplifier.bak deleted file mode 100644 index ec5aa4fc..00000000 --- a/Examples/BJT_amplifier/BJT_amplifier.bak +++ /dev/null @@ -1,306 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:BJT_amplifier-rescue -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:BJT_amplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "6 jun 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7050 4450 -Wire Wire Line - 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1 6100 3050 - 1 0 0 -1 -$EndComp -$Comp -L R-RESCUE-BJT_amplifier R4 -U 1 1 51A47F50 -P 5850 4200 -F 0 "R4" V 5930 4200 50 0000 C CNN -F 1 "1.5k" V 5850 4200 50 0000 C CNN -F 2 "" H 5850 4200 60 0001 C CNN -F 3 "" H 5850 4200 60 0001 C CNN - 1 5850 4200 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 557583B4 -P 5750 3600 -F 0 "Q1" H 5650 3650 50 0000 R CNN -F 1 "NPN" H 5700 3750 50 0000 R CNN -F 2 "" H 5950 3700 29 0000 C CNN -F 3 "" H 5750 3600 60 0000 C CNN - 1 5750 3600 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6100 2900 6100 2800 -Wire Wire Line - 6100 3200 6100 3300 -Wire Wire Line - 5850 4350 5850 4450 -Wire Wire Line - 6300 4400 6300 4450 -Wire Wire Line - 7050 4350 7050 4450 -Wire Wire Line - 5100 2900 5100 2800 -Text GLabel 7000 3250 2 60 Input ~ 0 -out -Wire Wire Line - 7000 3250 6950 3250 -Wire Wire Line - 6950 3200 6950 3300 -Connection ~ 6950 3300 -Text GLabel 3700 3450 0 60 Input ~ 0 -in -Wire Wire Line - 3700 3450 3800 3450 -Wire Wire Line - 3800 3350 3800 3600 -Connection ~ 3800 3600 -$Comp -L plot_v1 U1 -U 1 1 56D444F7 -P 3800 3550 -F 0 "U1" H 3800 4050 60 0000 C CNN -F 1 "plot_v1" H 4000 3900 60 0000 C CNN -F 2 "" H 3800 3550 60 0000 C CNN -F 3 "" H 3800 3550 60 0000 C CNN - 1 3800 3550 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U2 -U 1 1 56D4460A -P 6950 3400 -F 0 "U2" H 6950 3900 60 0000 C CNN -F 1 "plot_v1" H 7150 3750 60 0000 C CNN -F 2 "" H 6950 3400 60 0000 C CNN -F 3 "" H 6950 3400 60 0000 C CNN - 1 6950 3400 - 1 0 0 -1 -$EndComp -Connection ~ 6950 3250 -Connection ~ 3800 3450 -$Comp -L sine v2 -U 1 1 56D44890 -P 3700 4050 -F 0 "v2" H 3500 4150 60 0000 C CNN -F 1 "sine" H 3500 4000 60 0000 C CNN -F 2 "R1" H 3400 4050 60 0000 C CNN -F 3 "" H 3700 4050 60 0000 C CNN - 1 3700 4050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/BJT_amplifier/BJT_amplifier.cir.ckt b/Examples/BJT_amplifier/BJT_amplifier.cir.ckt deleted file mode 100644 index 281db0e7..00000000 --- a/Examples/BJT_amplifier/BJT_amplifier.cir.ckt +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 29 may 2013 04:04:50 pm ist
-.include npn.lib
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-$Comp -L d_nand U5 -U 1 1 5575A3E6 -P 6450 2450 -F 0 "U5" H 6450 2450 60 0000 C CNN -F 1 "d_nand" H 6500 2550 60 0000 C CNN -F 2 "" H 6450 2450 60 0000 C CNN -F 3 "" H 6450 2450 60 0000 C CNN - 1 6450 2450 - 1 0 0 -1 -$EndComp -$Comp -L d_inverter U6 -U 1 1 5575A56B -P 7400 3400 -F 0 "U6" H 7400 3300 60 0000 C CNN -F 1 "d_inverter" H 7400 3550 60 0000 C CNN -F 2 "" H 7450 3350 60 0000 C CNN -F 3 "" H 7450 3350 60 0000 C CNN - 1 7400 3400 - 1 0 0 -1 -$EndComp -$Comp -L d_xor U7 -U 1 1 5575A5B8 -P 8600 3050 -F 0 "U7" H 8600 3050 60 0000 C CNN -F 1 "d_xor" H 8650 3150 47 0000 C CNN -F 2 "" H 8600 3050 60 0000 C CNN -F 3 "" H 8600 3050 60 0000 C CNN - 1 8600 3050 - 1 0 0 -1 -$EndComp -$Comp -L dac_bridge_1 U8 -U 1 1 5575A633 -P 9800 3050 -F 0 "U8" H 9800 3050 60 0000 C CNN -F 1 "dac_bridge_1" H 9800 3200 60 0000 C CNN -F 2 "" H 9800 3050 60 0000 C CNN -F 3 "" H 9800 3050 60 0000 C CNN - 1 9800 3050 - 1 0 0 -1 -$EndComp -$Comp -L adc_bridge_2 U1 -U 1 1 5575A8EB -P 2850 3200 -F 0 "U1" H 2850 3200 60 0000 C CNN -F 1 "adc_bridge_2" H 2850 3350 60 0000 C CNN -F 2 "" H 2850 3200 60 0000 C CNN -F 3 "" H 2850 3200 60 0000 C CNN - 1 2850 3200 - 1 0 0 -1 -$EndComp -$Comp -L pulse v2 -U 1 1 5575AD50 -P 2050 2150 -F 0 "v2" H 1850 2250 60 0000 C CNN -F 1 "pulse" H 1850 2100 60 0000 C CNN -F 2 "R1" H 1750 2150 60 0000 C CNN -F 3 "" H 2050 2150 60 0000 C CNN - 1 2050 2150 - -1 0 0 1 -$EndComp -$Comp -L pulse v1 -U 1 1 5575AE1A -P 1650 5100 -F 0 "v1" H 1450 5200 60 0000 C CNN -F 1 "pulse" H 1450 5050 60 0000 C CNN -F 2 "R1" H 1350 5100 60 0000 C CNN -F 3 "" H 1650 5100 60 0000 C CNN - 1 1650 5100 - 1 0 0 -1 -$EndComp -Text GLabel 2200 2950 2 60 Input ~ 0 -IN2 -Text GLabel 2250 3450 2 60 Input ~ 0 -IN1 -Wire Wire Line - 1650 4500 2200 4500 -Wire Wire Line - 3500 3800 3750 3800 -Wire Wire Line - 7900 3100 7850 3100 -Wire Wire Line - 7850 3100 7850 3400 -Wire Wire Line - 7850 3400 7700 3400 -Connection ~ 5300 2300 -Wire Wire Line - 5300 2300 5300 3300 -Wire Wire Line - 5300 3300 5500 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- -* Plotting option vplot8_1 -* 74hc86 -* 74ls32 -* 74ls08 -* 74hc02 -* 74hc04 -* 7400 -r3 8 0 1000 -v2 8 0 pulse(0 5 0 0 0 2 20) -r2 9 0 1000 -r1 4 0 1000 -v1 4 0 pulse(5 0 0 0 0 2 20) -a1 [5] [5_in] u12adc -a2 [6] [6_in] u12adc -a3 [5_in 6_in] 9_out u12 -a4 [9_out] [9] u12dac -.model u12 d_xor -.model u12adc adc_bridge(in_low=0.8 in_high=2.0) -.model u12dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a5 [8] [8_in] u8adc -a6 [4] [4_in] u8adc -a7 [8_in 4_in] 10_out u8 -a8 [10_out] [10] u8dac -.model u8 d_or -.model u8adc adc_bridge(in_low=0.8 in_high=2.0) -.model u8dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a9 [8] [8_in] u7adc -a10 [4] [4_in] u7adc -a11 [8_in 4_in] 2_out u7 -a12 [2_out] [2] u7dac -.model u7 d_and -.model u7adc adc_bridge(in_low=0.8 in_high=2.0) -.model u7dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a13 [2] [2_in] u9adc -a14 [10] [10_in] u9adc -a15 [2_in 10_in] 7_out u9 -a16 [7_out] [7] u9dac -.model u9 d_nor -.model u9adc adc_bridge(in_low=0.8 in_high=2.0) -.model u9dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a17 [7] [7_in] u11adc -a18 7_in 6_out u11 -a19 [6_out] [6] u11dac -.model u11 d_inverter -.model u11adc adc_bridge(in_low=0.8 in_high=2.0) -.model u11dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a20 [2] [2_in] u10adc -a21 [10] [10_in] u10adc -a22 [2_in 10_in] 5_out u10 -a23 [5_out] [5] u10dac -.model u10 d_nand -.model u10adc adc_bridge(in_low=0.8 in_high=2.0) -.model u10dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot v(8) v(4) v(9) -.end diff --git a/Examples/CMOS_Inverter/.CMOS_Inverter.cir.out.swp b/Examples/CMOS_Inverter/.CMOS_Inverter.cir.out.swp Binary files differdeleted file mode 100644 index f2abf69d..00000000 --- a/Examples/CMOS_Inverter/.CMOS_Inverter.cir.out.swp +++ /dev/null diff --git a/Examples/CMOS_Inverter/CMOS_Inverter-cache.bak b/Examples/CMOS_Inverter/CMOS_Inverter-cache.bak deleted file mode 100644 index 40de879d..00000000 --- a/Examples/CMOS_Inverter/CMOS_Inverter-cache.bak +++ /dev/null @@ -1,118 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 28 April 2015 10:53:44 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# MOS_N -# -DEF MOS_N Q 0 0 N Y 1 F N -F0 "Q" 10 170 60 H V R CNN -F1 "MOS_N" 10 -150 60 H V R CNN -ALIAS MOSFET_N -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 8 100 -100 100 0 50 0 N -P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# MOS_P -# -DEF MOS_P Q 0 40 Y N 1 F N -F0 "Q" 0 190 60 H V R CNN -F1 "MOS_P" 0 -180 60 H V R CNN -ALIAS MOSFET_P -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 8 30 0 0 0 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 0 80 0 100 0 100 -100 N -P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.bak b/Examples/CMOS_Inverter/CMOS_Inverter.bak deleted file mode 100644 index 5d83811f..00000000 --- a/Examples/CMOS_Inverter/CMOS_Inverter.bak +++ /dev/null @@ -1,257 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:CMOS_Inverter-rescue -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:CMOS_Inverter-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "29 apr 2015" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5800 2400 -Wire Wire Line - 5900 2400 5800 2400 -Connection ~ 4200 3350 -Wire Wire Line - 4200 3000 4200 3350 -Wire Wire Line - 6550 3300 6550 3550 -Wire Wire Line - 5800 2500 5800 2300 -Connection ~ 2900 3350 -Wire Wire Line - 2900 3100 2900 3550 -Wire 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3550 3350 -F 0 "v1" H 3350 3450 60 0000 C CNN -F 1 "DC" H 3350 3300 60 0000 C CNN -F 2 "R1" H 3250 3350 60 0000 C CNN -F 3 "" H 3550 3350 60 0000 C CNN - 1 3550 3350 - 0 1 1 0 -$EndComp -$Comp -L dc-RESCUE-CMOS_Inverter v2 -U 1 1 556C4BA7 -P 5800 1850 -F 0 "v2" H 5600 1950 60 0000 C CNN -F 1 "5" H 5600 1800 60 0000 C CNN -F 2 "R1" H 5500 1850 60 0000 C CNN -F 3 "" H 5800 1850 60 0000 C CNN - 1 5800 1850 - -1 0 0 1 -$EndComp -Wire Wire Line - 6300 3050 6300 3300 -Wire Wire Line - 5800 3300 6550 3300 -$Comp -L MOS_N M1 -U 1 1 556F0E6F -P 5600 3650 -F 0 "M1" H 5600 3500 50 0000 R CNN -F 1 "MOS_N" H 5700 3600 50 0000 R CNN -F 2 "" H 5900 3350 29 0000 C CNN -F 3 "" H 5700 3450 60 0000 C CNN - 1 5600 3650 - 1 0 0 -1 -$EndComp -$Comp -L MOS_P M2 -U 1 1 556F0EE6 -P 5650 2700 -F 0 "M2" H 5600 2750 50 0000 R CNN -F 1 "MOS_P" H 5700 2850 50 0000 R CNN -F 2 "" H 5900 2800 29 0000 C CNN -F 3 "" H 5700 2700 60 0000 C CNN - 1 5650 2700 - 1 0 0 1 -$EndComp -Wire Wire Line - 5800 4050 5800 4700 -Wire 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Wire Line - 6500 3150 6300 3150 -Connection ~ 6300 3150 -Wire Wire Line - 4350 3150 4200 3150 -Connection ~ 4200 3150 -Wire Wire Line - 5800 1300 5800 1400 -$Comp -L GND #PWR03 -U 1 1 56D85765 -P 5800 1300 -F 0 "#PWR03" H 5800 1050 50 0001 C CNN -F 1 "GND" H 5800 1150 50 0000 C CNN -F 2 "" H 5800 1300 50 0000 C CNN -F 3 "" H 5800 1300 50 0000 C CNN - 1 5800 1300 - -1 0 0 1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 56D857A1 -P 5800 4700 -F 0 "#PWR04" H 5800 4450 50 0001 C CNN -F 1 "GND" H 5800 4550 50 0000 C CNN -F 2 "" H 5800 4700 50 0000 C CNN -F 3 "" H 5800 4700 50 0000 C CNN - 1 5800 4700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR05 -U 1 1 56D8585B -P 2900 3550 -F 0 "#PWR05" H 2900 3300 50 0001 C CNN -F 1 "GND" H 2900 3400 50 0000 C CNN -F 2 "" H 2900 3550 50 0000 C CNN -F 3 "" H 2900 3550 50 0000 C CNN - 1 2900 3550 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6550 3850 6550 4400 -$EndSCHEMATC diff --git a/Examples/CMOS_Inverter/NMOS-180nm.lib b/Examples/CMOS_Inverter/NMOS-180nm.lib deleted file mode 100644 index 51e9b119..00000000 --- a/Examples/CMOS_Inverter/NMOS-180nm.lib +++ /dev/null @@ -1,13 +0,0 @@ -.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 -+ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 -+ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 -+ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 -+ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 -+ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 -+ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 -+ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 -+ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 -+ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 -+ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 -+ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 -+ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/Examples/CMOS_Inverter/PMOS-180nm.lib b/Examples/CMOS_Inverter/PMOS-180nm.lib deleted file mode 100644 index 032b5b95..00000000 --- a/Examples/CMOS_Inverter/PMOS-180nm.lib +++ /dev/null @@ -1,11 +0,0 @@ -.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 -+ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 -+ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 -+ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 -+ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 -+ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 -+ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 -+ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 -+ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 -+ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 -+ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/Examples/CMOS_Inverter/b3v32check.log b/Examples/CMOS_Inverter/b3v32check.log deleted file mode 100644 index b08de179..00000000 --- a/Examples/CMOS_Inverter/b3v32check.log +++ /dev/null @@ -1,6 +0,0 @@ -BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4) -Parameter Checking. -Model = cmosn -W = 0.0001, L = 0.0001, M = 1 -Warning: Pd = 0 is less than W. -Warning: Ps = 0 is less than W. diff --git a/Examples/Clampercircuit/Clampercircuit.bak b/Examples/Clampercircuit/Clampercircuit.bak deleted file mode 100644 index 9469e648..00000000 --- a/Examples/Clampercircuit/Clampercircuit.bak +++ /dev/null @@ -1,207 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L sine v1 -U 1 1 56A864A1 -P 3750 3550 -F 0 "v1" H 3550 3650 60 0000 C CNN -F 1 "sine" H 3550 3500 60 0000 C CNN -F 2 "R1" H 3450 3550 60 0000 C CNN -F 3 "" H 3750 3550 60 0000 C CNN - 1 3750 3550 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 56A86522 -P 4300 2900 -F 0 "C1" H 4325 3000 50 0000 L CNN -F 1 "1n" H 4325 2800 50 0000 L CNN -F 2 "" H 4338 2750 30 0000 C CNN -F 3 "" H 4300 2900 60 0000 C CNN - 1 4300 2900 - 0 1 1 0 -$EndComp -$Comp -L D D1 -U 1 1 56A86555 -P 5100 3400 -F 0 "D1" H 5100 3500 50 0000 C CNN -F 1 "D" H 5100 3300 50 0000 C CNN -F 2 "" H 5100 3400 60 0000 C CNN -F 3 "" H 5100 3400 60 0000 C CNN - 1 5100 3400 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56A86578 -P 4550 4150 -F 0 "#PWR01" H 4550 3900 50 0001 C CNN -F 1 "GND" H 4550 4000 50 0000 C CNN -F 2 "" H 4550 4150 50 0000 C CNN -F 3 "" H 4550 4150 50 0000 C CNN - 1 4550 4150 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4150 2900 3750 2900 -Wire Wire Line - 3750 2900 3750 3100 -Wire Wire Line - 4450 2900 5100 2900 -Wire Wire Line - 5100 2900 5100 3250 -Wire Wire Line - 3750 4000 3750 4100 -Wire Wire Line - 3750 4100 5100 4100 -Wire Wire Line - 5100 4100 5100 3550 -Text GLabel 3700 2800 0 60 Input ~ 0 -in_neg -Text GLabel 5000 2750 2 60 Input ~ 0 -out_neg -Wire Wire Line - 3700 2800 3800 2800 -Wire Wire Line - 3800 2800 3800 2900 -Connection ~ 3800 2900 -Wire Wire Line - 5000 2750 4950 2750 -Wire Wire Line - 4950 2750 4950 2900 -Connection ~ 4950 2900 -Wire Wire Line - 4550 4150 4550 4100 -Connection ~ 4550 4100 -$Comp -L sine v2 -U 1 1 56A86723 -P 6950 3550 -F 0 "v2" H 6750 3650 60 0000 C CNN -F 1 "sine" H 6750 3500 60 0000 C CNN -F 2 "R1" H 6650 3550 60 0000 C CNN -F 3 "" H 6950 3550 60 0000 C CNN - 1 6950 3550 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 56A86783 -P 7600 2900 -F 0 "C2" H 7625 3000 50 0000 L CNN -F 1 "1n" H 7625 2800 50 0000 L CNN -F 2 "" H 7638 2750 30 0000 C CNN -F 3 "" H 7600 2900 60 0000 C CNN - 1 7600 2900 - 0 1 1 0 -$EndComp -$Comp -L D D2 -U 1 1 56A867F1 -P 8500 3400 -F 0 "D2" H 8500 3500 50 0000 C CNN -F 1 "D" H 8500 3300 50 0000 C CNN -F 2 "" H 8500 3400 60 0000 C CNN -F 3 "" H 8500 3400 60 0000 C CNN - 1 8500 3400 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 56A868AB -P 7850 4150 -F 0 "#PWR02" H 7850 3900 50 0001 C CNN -F 1 "GND" H 7850 4000 50 0000 C CNN -F 2 "" H 7850 4150 50 0000 C CNN -F 3 "" H 7850 4150 50 0000 C CNN - 1 7850 4150 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6950 3100 6950 2900 -Wire Wire Line - 6950 2900 7450 2900 -Wire Wire Line - 7750 2900 8500 2900 -Wire Wire Line - 8500 2900 8500 3250 -Wire Wire Line - 6950 4000 6950 4050 -Wire Wire Line - 6950 4050 8500 4050 -Wire Wire Line - 8500 4050 8500 3550 -Wire Wire Line - 7850 4150 7850 4050 -Connection ~ 7850 4050 -Text GLabel 7000 2800 0 60 Input ~ 0 -in_pos -Text GLabel 8450 2750 2 60 Input ~ 0 -out_pos -Wire Wire Line - 7000 2800 7050 2800 -Wire Wire Line - 7050 2800 7050 2900 -Connection ~ 7050 2900 -Wire Wire Line - 8450 2750 8400 2750 -Wire Wire Line - 8400 2750 8400 2900 -Connection ~ 8400 2900 -Text Notes 4150 4750 0 60 ~ 0 -Negative Clamper\n\n -Text Notes 7600 4650 0 60 ~ 0 -Positive Clamper\n -$EndSCHEMATC diff --git a/Examples/Clippercircuit/Clippercircuit.bak b/Examples/Clippercircuit/Clippercircuit.bak deleted file mode 100644 index 775858a6..00000000 --- a/Examples/Clippercircuit/Clippercircuit.bak +++ /dev/null @@ -1,145 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User 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~ 5550 3000 -Wire Wire Line - 5550 3600 5550 4050 -Connection ~ 5550 4050 -Wire Wire Line - 5350 4100 5350 4050 -Connection ~ 5350 4050 -Text GLabel 6350 2900 2 60 Input ~ 0 -out -Text GLabel 4100 2850 0 60 Input ~ 0 -in -Wire Wire Line - 4100 2850 4200 2850 -Wire Wire Line - 4200 2850 4200 3000 -Connection ~ 4200 3000 -Wire Wire Line - 6350 2900 6200 2900 -Wire Wire Line - 6200 2900 6200 3000 -Connection ~ 6200 3000 -$EndSCHEMATC diff --git a/Examples/Diac_Triac/.triac.s.swp b/Examples/Diac_Triac/.triac.s.swp Binary files differdeleted file mode 100644 index 1a4c2d0e..00000000 --- a/Examples/Diac_Triac/.triac.s.swp +++ /dev/null diff --git a/Examples/Diac_Triac/.triac.sub.swp b/Examples/Diac_Triac/.triac.sub.swp Binary files differdeleted file mode 100644 index 521ce758..00000000 --- a/Examples/Diac_Triac/.triac.sub.swp +++ /dev/null diff --git a/Examples/Diac_Triac/diac-cache.lib b/Examples/Diac_Triac/diac-cache.lib deleted file mode 100644 index b15fdeec..00000000 --- a/Examples/Diac_Triac/diac-cache.lib +++ /dev/null @@ -1,67 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 95 50 H I C CNN -F1 "PWR_FLAG" 0 180 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N -ENDDRAW -ENDDEF -# -# aswitch -# -DEF aswitch U 0 40 Y Y 1 F N -F0 "U" 450 300 60 H V C CNN -F1 "aswitch" 450 200 60 H V C CNN -F2 "" 450 100 60 H V C CNN -F3 "" 450 100 60 H V C CNN -DRAW -S 200 250 650 100 0 1 0 N -X ~ 2 0 150 200 R 50 50 1 1 O -X ~ 3 850 150 200 L 50 50 1 1 O -X ~ 1_IN 450 -100 200 U 50 20 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/Diac_Triac/diac.bak b/Examples/Diac_Triac/diac.bak deleted file mode 100644 index 16009984..00000000 --- a/Examples/Diac_Triac/diac.bak +++ /dev/null @@ -1,138 +0,0 @@ -EESchema Schematic File Version 2 date 09/22/14 16:36:31
-LIBS:power
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-P 4900 3400
-F 0 "U1" H 4700 3450 30 0000 C CNN
-F 1 "ANALOGSWITCH" H 4900 3400 30 0000 C CNN
- 1 4900 3400
- 1 0 0 -1
-$EndComp
-$EndSCHEMATC
diff --git a/Examples/Diac_Triac/diac.cir.ckt b/Examples/Diac_Triac/diac.cir.ckt deleted file mode 100644 index e89f9cfb..00000000 --- a/Examples/Diac_Triac/diac.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 09/22/14 16:36:23
-
-u3 1 2 port
-* Analog Switch analogswitch
-* Analog Switch analogswitch
-a1 1 (1 2) u2
-.model u2 aswitch(cntl_on=-25 cntl_off=-0.1 r_on=0.0125 r_off=1000000)
-a2 1 (1 2) u1
-.model u1 aswitch(cntl_on=25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/Examples/Diac_Triac/diac.cir.out~ b/Examples/Diac_Triac/diac.cir.out~ deleted file mode 100644 index 89cc8142..00000000 --- a/Examples/Diac_Triac/diac.cir.out~ +++ /dev/null @@ -1,24 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/diac/diac.cir - -* u3 1 2 port -* u1 1 1 2 aswitch -* u2 1 1 2 aswitch -a1 1 [1 2 ] u1 -a2 1 [1 2 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/Diac_Triac/diac.sub~ b/Examples/Diac_Triac/diac.sub~ deleted file mode 100644 index 43c2d279..00000000 --- a/Examples/Diac_Triac/diac.sub~ +++ /dev/null @@ -1,18 +0,0 @@ -* Subcircuit diac -.subckt diac 1 2 -* /opt/esim/src/subcircuitlibrary/diac/diac.cir -* u1 1 1 2 aswitch -* u2 1 1 2 aswitch -a1 1 [1 2 ] u1 -a2 1 [1 2 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Control Statements - -.ends diac
\ No newline at end of file diff --git a/Examples/Diac_Triac/diac_Previous_Values.xml b/Examples/Diac_Triac/diac_Previous_Values.xml deleted file mode 100644 index 96df431c..00000000 --- a/Examples/Diac_Triac/diac_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -<KicadtoNgspice><source /><model><u1 name="type">aswitch<field1 name="Enter Log (default=TRUE)" /><field2 name="Enter Control OFF value (default=0.0)">0.1</field2><field3 name="Enter OFF Resistance (default=1.0e12)">1000000</field3><field4 name="Enter ON Resistance (default=1.0)">0.0125</field4><field5 name="Enter Control ON value(default=1.0)">25</field5></u1><u2 name="type">aswitch<field6 name="Enter Log (default=TRUE)" /><field7 name="Enter Control OFF value (default=0.0)">-0.1</field7><field8 name="Enter OFF Resistance (default=1.0e12)">1000000</field8><field9 name="Enter ON Resistance (default=1.0)">0.0125</field9><field10 name="Enter Control ON value(default=1.0)">-25</field10></u2></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/Diac_Triac/triac.bak b/Examples/Diac_Triac/triac.bak deleted file mode 100644 index f30533a0..00000000 --- a/Examples/Diac_Triac/triac.bak +++ /dev/null @@ -1,308 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:triac-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 sep 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U3 -U 3 1 541D1606 -P 1250 1750 -F 0 "U3" H 1250 1700 30 0000 C CNN -F 1 "PORT" H 1250 1750 30 0000 C CNN -F 2 "" H 1250 1750 60 0001 C CNN -F 3 "" H 1250 1750 60 0001 C CNN - 3 1250 1750 - 1 0 0 -1 -$EndComp -$Comp -L PORT U3 -U 2 1 541D1601 -P 1300 900 -F 0 "U3" H 1300 850 30 0000 C CNN -F 1 "PORT" H 1300 900 30 0000 C CNN -F 2 "" H 1300 900 60 0001 C CNN -F 3 "" H 1300 900 60 0001 C CNN - 2 1300 900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U3 -U 1 1 541D15F6 -P 1150 4050 -F 0 "U3" H 1150 4000 30 0000 C CNN -F 1 "PORT" H 1150 4050 30 0000 C CNN -F 2 "" H 1150 4050 60 0001 C CNN -F 3 "" H 1150 4050 60 0001 C CNN - 1 1150 4050 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F3 -U 1 1 541D1417 -P 6250 3100 -F 0 "F3" H 6050 3200 50 0000 C CNN -F 1 "10" H 6050 3050 50 0000 C CNN -F 2 "" H 6250 3100 60 0001 C CNN -F 3 "" H 6250 3100 60 0001 C CNN - 1 6250 3100 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 541D13FB -P 6050 1950 -F 0 "v3" H 5850 2050 60 0000 C CNN -F 1 "DC" H 5850 1900 60 0000 C CNN -F 2 "R1" H 5750 1950 60 0000 C CNN -F 3 "" H 6050 1950 60 0001 C CNN - 1 6050 1950 - -1 0 0 1 -$EndComp -$Comp -L CCCS F2 -U 1 1 541D13A3 -P 3900 2550 -F 0 "F2" H 3700 2650 50 0000 C CNN -F 1 "10" H 3700 2500 50 0000 C CNN -F 2 "" H 3900 2550 60 0001 C CNN -F 3 "" H 3900 2550 60 0001 C CNN - 1 3900 2550 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 541D1398 -P 3700 1850 -F 0 "v2" H 3500 1950 60 0000 C CNN -F 1 "DC" H 3500 1800 60 0000 C CNN -F 2 "R1" H 3400 1850 60 0000 C CNN -F 3 "" H 3700 1850 60 0001 C CNN - 1 3700 1850 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 541D137C -P 3300 4350 -F 0 "C1" H 3350 4450 50 0000 L CNN -F 1 "10u" H 3350 4250 50 0000 L CNN -F 2 "" H 3300 4350 60 0001 C CNN -F 3 "" H 3300 4350 60 0001 C CNN - 1 3300 4350 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F1 -U 1 1 541D1363 -P 2100 3600 -F 0 "F1" H 1900 3700 50 0000 C CNN -F 1 "100" H 1900 3550 50 0000 C CNN -F 2 "" H 2100 3600 60 0001 C CNN -F 3 "" H 2100 3600 60 0001 C CNN - 1 2100 3600 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 541D1357 -P 1900 2900 -F 0 "v1" H 1700 3000 60 0000 C CNN -F 1 "DC" H 1700 2850 60 0000 C CNN -F 2 "R1" H 1600 2900 60 0000 C CNN -F 3 "" H 1900 2900 60 0001 C CNN - 1 1900 2900 - 1 0 0 -1 -$EndComp -$Comp -L aswitch U1 -U 1 1 56669B8A -P 4600 1100 -F 0 "U1" H 5050 1400 60 0000 C CNN -F 1 "aswitch" H 5050 1300 60 0000 C CNN -F 2 "" H 5050 1200 60 0000 C CNN -F 3 "" H 5050 1200 60 0000 C CNN - 1 4600 1100 - -1 0 0 1 -$EndComp -$Comp -L aswitch U2 -U 1 1 56669DB5 -P 6400 1350 -F 0 "U2" H 6850 1650 60 0000 C CNN -F 1 "aswitch" H 6850 1550 60 0000 C CNN -F 2 "" H 6850 1450 60 0000 C CNN -F 3 "" H 6850 1450 60 0000 C CNN - 1 6400 1350 - 1 0 0 -1 -$EndComp -Connection ~ 4600 900 -Wire Wire Line - 4600 1250 4600 900 -Wire Wire Line - 1900 1750 1500 1750 -Connection ~ 6300 4900 -Wire Wire Line - 6300 3400 6300 4900 -Connection ~ 3950 4900 -Wire Wire Line - 3950 2850 3950 4900 -Connection ~ 2700 4050 -Wire Wire Line - 2700 3300 2700 4050 -Wire Wire Line - 2150 3300 2700 3300 -Connection ~ 3300 4900 -Wire Wire Line - 7450 4900 7450 700 -Connection ~ 3700 4050 -Wire Wire Line - 6050 4050 6050 3150 -Wire Wire Line - 6050 2400 6050 2500 -Wire Wire Line - 3700 1250 3750 1250 -Wire Wire Line - 3700 1400 3700 1250 -Wire Wire Line - 3700 2850 3700 2600 -Connection ~ 2750 4050 -Wire Wire Line - 2750 4050 2750 4150 -Wire Wire Line - 1900 3350 1900 3550 -Wire Wire Line - 1900 2450 1900 1750 -Wire Wire Line - 1900 4050 1900 3650 -Wire Wire Line - 3300 4050 3300 4200 -Wire Wire Line - 3700 3150 3700 4050 -Connection ~ 3300 4050 -Wire Wire Line - 3700 2500 3700 2300 -Wire Wire Line - 6050 1200 6050 1500 -Wire Wire Line - 6400 1200 6050 1200 -Wire Wire Line - 6050 2800 6050 3050 -Wire Wire Line - 2750 4450 2750 4900 -Wire Wire Line - 3300 4500 3300 4900 -Connection ~ 7450 1400 -Wire Wire Line - 2150 4900 2150 3900 -Wire Wire Line - 2150 4900 7450 4900 -Connection ~ 2750 4900 -Wire Wire Line - 4450 2250 3950 2250 -Wire Wire Line - 4450 4050 4450 2250 -Connection ~ 4450 4050 -Wire Wire Line - 6650 2800 6300 2800 -Wire Wire Line - 6650 4050 6650 2800 -Connection ~ 6050 4050 -Wire Wire Line - 1550 900 7250 900 -Wire Wire Line - 1400 4050 6650 4050 -Connection ~ 1900 4050 -Wire Wire Line - 7450 700 4150 700 -Wire Wire Line - 4150 700 4150 1000 -Wire Wire Line - 6850 1450 7350 1450 -Wire Wire Line - 7350 1450 7350 1400 -Wire Wire Line - 7350 1400 7450 1400 -Wire Wire Line - 7250 900 7250 1200 -$Comp -L R R1 -U 1 1 5666A886 -P 2700 4250 -F 0 "R1" H 2750 4380 50 0000 C CNN -F 1 "1" H 2750 4300 50 0000 C CNN -F 2 "" H 2750 4230 30 0000 C CNN -F 3 "" V 2750 4300 30 0000 C CNN - 1 2700 4250 - 0 1 1 0 -$EndComp -$Comp -L D D1 -U 1 1 5666A9A7 -P 3700 3000 -F 0 "D1" H 3700 3100 50 0000 C CNN -F 1 "D" H 3700 2900 50 0000 C CNN -F 2 "" H 3700 3000 60 0000 C CNN -F 3 "" H 3700 3000 60 0000 C CNN - 1 3700 3000 - 0 1 1 0 -$EndComp -$Comp -L D D2 -U 1 1 5666A9E4 -P 6050 2650 -F 0 "D2" H 6050 2750 50 0000 C CNN -F 1 "D" H 6050 2550 50 0000 C CNN -F 2 "" H 6050 2650 60 0000 C CNN -F 3 "" H 6050 2650 60 0000 C CNN - 1 6050 2650 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/Examples/Diac_Triac/triac.cir.ckt b/Examples/Diac_Triac/triac.cir.ckt deleted file mode 100644 index 821b417b..00000000 --- a/Examples/Diac_Triac/triac.cir.ckt +++ /dev/null @@ -1,26 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 09/20/14 11:23:24
-.include diode.lib
-
-u3 7 4 5 port
-* f3
-d2 3 2 diode
-v3 2 1 dc 0
-* Analog Switch analogswitch
-d1 11 7 diode
-* f2
-v2 8 10 dc 0
-* Analog Switch analogswitch
-c1 7 9 10u
-r1 7 9 1
-* f1
-v1 5 6 dc 0
-Vf3 3 7 0
-f3 7 9 Vf3 10
-Vf2 10 11 0
-f2 7 9 Vf2 10
-Vf1 6 7 0
-f1 7 9 Vf1 100
-a1 9 (1 4) u2
-.model u2 aswitch(cntl_on=-1 cntl_off=-0.1 r_on=0.0125 r_off=1000000)
-a2 9 (4 8) u1
-.model u1 aswitch(cntl_on=1 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/Examples/Diac_Triac/triac.cir.out~ b/Examples/Diac_Triac/triac.cir.out~ deleted file mode 100644 index 7bd15a7b..00000000 --- a/Examples/Diac_Triac/triac.cir.out~ +++ /dev/null @@ -1,41 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/triac/triac.cir - -.include PowerDiode.lib -* u3 8 11 10 port -* f3 -v3 7 2 dc 0 -* f2 -v2 6 3 dc 0 -c1 8 9 10u -* f1 -v1 10 4 dc 0 -* u1 9 11 6 aswitch -* u2 9 2 11 aswitch -r1 8 9 1 -d1 5 8 PowerDiode -d2 1 7 PowerDiode -Vf3 1 8 0 -f3 8 9 Vf3 10 -Vf2 3 5 0 -f2 8 9 Vf2 10 -Vf1 4 8 0 -f1 8 9 Vf1 100 -a1 9 [11 6 ] u1 -a2 9 [2 11 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/Diac_Triac/triac.sub~ b/Examples/Diac_Triac/triac.sub~ deleted file mode 100644 index ebbed05e..00000000 --- a/Examples/Diac_Triac/triac.sub~ +++ /dev/null @@ -1,35 +0,0 @@ -* Subcircuit triac -.subckt triac 8 11 10 -* /opt/esim/src/subcircuitlibrary/triac/triac.cir -.include PowerDiode.lib -* f3 -v3 7 2 dc 0 -* f2 -v2 6 3 dc 0 -c1 8 9 10u -* f1 -v1 10 4 dc 0 -* u1 9 11 6 aswitch -* u2 9 2 11 aswitch -r1 8 9 1 -d1 5 8 PowerDiode -d2 1 7 PowerDiode -Vf3 1 8 0 -f3 8 9 Vf3 10 -Vf2 3 5 0 -f2 8 9 Vf2 10 -Vf1 4 8 0 -f1 8 9 Vf1 100 -a1 9 [11 6 ] u1 -a2 9 [2 11 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Control Statements - -.ends triac
\ No newline at end of file diff --git a/Examples/Diac_Triac/triac_Previous_Values.xml b/Examples/Diac_Triac/triac_Previous_Values.xml deleted file mode 100644 index 80da52b3..00000000 --- a/Examples/Diac_Triac/triac_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -<KicadtoNgspice><source><v3 name="Source type">dc<field1 name="Value">0</field1></v3><v2 name="Source type">dc<field1 name="Value">0</field1></v2><v1 name="Source type">dc<field1 name="Value">0</field1></v1></source><model><u1 name="type">aswitch<field1 name="Enter Log (default=TRUE)" /><field2 name="Enter Control OFF value (default=0.0)">0.1</field2><field3 name="Enter OFF Resistance (default=1.0e12)">1000000</field3><field4 name="Enter ON Resistance (default=1.0)">0.0125</field4><field5 name="Enter Control ON value(default=1.0)">1</field5></u1><u2 name="type">aswitch<field6 name="Enter Log (default=TRUE)" /><field7 name="Enter Control OFF value (default=0.0)">-0.1</field7><field8 name="Enter OFF Resistance (default=1.0e12)">1000000</field8><field9 name="Enter ON Resistance (default=1.0)">0.0125</field9><field10 name="Enter Control ON value(default=1.0)">-1</field10></u2></model><devicemodel><d2><field>/opt/eSim/src/deviceModelLibrary/Diode/PowerDiode.lib</field></d2><d1><field>/opt/eSim/src/deviceModelLibrary/Diode/PowerDiode.lib</field></d1></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/Differentiator/Differentiator.bak b/Examples/Differentiator/Differentiator.bak deleted file mode 100644 index 8a17ece6..00000000 --- a/Examples/Differentiator/Differentiator.bak +++ /dev/null @@ -1,197 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L UA741 X1 -U 1 1 56B85B7E -P 6050 2950 -F 0 "X1" H 6200 2950 60 0000 C CNN -F 1 "UA741" H 6300 2800 60 0000 C CNN -F 2 "" H 6050 2950 60 0000 C CNN -F 3 "" H 6050 2950 60 0000 C CNN - 1 6050 2950 - 1 0 0 1 -$EndComp -$Comp -L R R3 -U 1 1 56B85BC9 -P 6150 2350 -F 0 "R3" H 6200 2480 50 0000 C CNN -F 1 "10k" H 6200 2400 50 0000 C CNN -F 2 "" H 6200 2330 30 0000 C CNN -F 3 "" V 6200 2400 30 0000 C CNN - 1 6150 2350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 56B85C04 -P 4900 2900 -F 0 "R1" H 4950 3030 50 0000 C CNN -F 1 "100k" H 4950 2950 50 0000 C CNN -F 2 "" H 4950 2880 30 0000 C CNN -F 3 "" V 4950 2950 30 0000 C CNN - 1 4900 2900 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 56B85C6B -P 5500 3150 -F 0 "R2" H 5550 3280 50 0000 C CNN -F 1 "1k" H 5550 3200 50 0000 C CNN -F 2 "" H 5550 3130 30 0000 C CNN -F 3 "" V 5550 3200 30 0000 C CNN - 1 5500 3150 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 56B85CD1 -P 7150 3000 -F 0 "R4" H 7200 3130 50 0000 C CNN -F 1 "1k" H 7200 3050 50 0000 C CNN -F 2 "" H 7200 2980 30 0000 C CNN -F 3 "" V 7200 3050 30 0000 C CNN - 1 7150 3000 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 56B85D7C -P 5550 2850 -F 0 "C1" H 5575 2950 50 0000 L CNN -F 1 "20n" H 5575 2750 50 0000 L CNN -F 2 "" H 5588 2700 30 0000 C CNN -F 3 "" H 5550 2850 60 0000 C CNN - 1 5550 2850 - 0 -1 -1 0 -$EndComp -$Comp -L pwl v1 -U 1 1 56B85E24 -P 4500 3300 -F 0 "v1" H 4300 3400 60 0000 C CNN -F 1 "pwl" H 4250 3250 60 0000 C CNN -F 2 "R1" H 4200 3300 60 0000 C CNN -F 3 "" H 4500 3300 60 0000 C CNN - 1 4500 3300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56B85ECF -P 4500 3750 -F 0 "#PWR01" H 4500 3500 50 0001 C CNN -F 1 "GND" H 4500 3600 50 0000 C CNN -F 2 "" H 4500 3750 50 0000 C CNN -F 3 "" H 4500 3750 50 0000 C CNN - 1 4500 3750 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 56B85EF6 -P 5550 3350 -F 0 "#PWR02" H 5550 3100 50 0001 C CNN -F 1 "GND" H 5550 3200 50 0000 C CNN -F 2 "" H 5550 3350 50 0000 C CNN -F 3 "" H 5550 3350 50 0000 C CNN - 1 5550 3350 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 56B85F16 -P 7350 2950 -F 0 "#PWR03" H 7350 2700 50 0001 C CNN -F 1 "GND" H 7350 2800 50 0000 C CNN -F 2 "" H 7350 2950 50 0000 C CNN -F 3 "" H 7350 2950 50 0000 C CNN - 1 7350 2950 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4500 2850 4800 2850 -Wire Wire Line - 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\ No newline at end of file diff --git a/Examples/Diode_characteristics/Diode_characteristics.bak b/Examples/Diode_characteristics/Diode_characteristics.bak deleted file mode 100644 index 96591d7f..00000000 --- a/Examples/Diode_characteristics/Diode_characteristics.bak +++ /dev/null @@ -1,142 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:Diode_characteristics-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L DC v1 -U 1 1 562485DC -P 4350 3150 -F 0 "v1" H 4150 3250 60 0000 C CNN -F 1 "DC" H 4150 3100 60 0000 C CNN -F 2 "R1" H 4050 3150 60 0000 C CNN -F 3 "" H 4350 3150 60 0000 C CNN - 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1 6250 2550 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 55D44EE5 -P 5200 4350 -F 0 "R2" H 5250 4480 50 0000 C CNN -F 1 "1Meg" H 5250 4400 50 0000 C CNN -F 2 "" H 5250 4330 30 0000 C CNN -F 3 "" V 5250 4400 30 0000 C CNN - 1 5200 4350 - 0 -1 -1 0 -$EndComp -$Comp -L R R4 -U 1 1 55D44F9D -P 6350 4450 -F 0 "R4" H 6400 4580 50 0000 C CNN -F 1 "470" H 6400 4500 50 0000 C CNN -F 2 "" H 6400 4430 30 0000 C CNN -F 3 "" V 6400 4500 30 0000 C CNN - 1 6350 4450 - 0 -1 -1 0 -$EndComp -Text GLabel 3550 3400 1 60 Input ~ 0 -in -Wire Wire Line - 6300 2250 8600 2250 -Wire Wire Line - 8600 2250 8600 3200 -Wire Wire Line - 8600 4800 8600 4100 -Text GLabel 6750 3100 2 60 Input ~ 0 -out -Wire Wire Line - 6750 3100 6300 3100 -$EndSCHEMATC diff --git a/Examples/FET_Characteristic/FET_Characteristic.bak b/Examples/FET_Characteristic/FET_Characteristic.bak deleted file mode 100644 index 71a25dc9..00000000 --- a/Examples/FET_Characteristic/FET_Characteristic.bak +++ /dev/null @@ -1,127 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L NJF J1 -U 1 1 56C45BB2 -P 5700 3300 -F 0 "J1" H 5600 3350 50 0000 R CNN -F 1 "NJF" H 5650 3450 50 0000 R CNN -F 2 "" H 5900 3400 29 0000 C CNN -F 3 "" H 5700 3300 60 0000 C CNN - 1 5700 3300 - 1 0 0 -1 -$EndComp -$Comp -L DC vds1 -U 1 1 56C45C58 -P 7200 3300 -F 0 "vds1" H 7000 3400 60 0000 C CNN -F 1 "DC" H 7000 3250 60 0000 C CNN -F 2 "R1" H 6900 3300 60 0000 C CNN -F 3 "" H 7200 3300 60 0000 C CNN - 1 7200 3300 - 1 0 0 -1 -$EndComp -$Comp -L DC vgs1 -U 1 1 56C45CAD -P 4450 3800 -F 0 "vgs1" H 4250 3900 60 0000 C CNN -F 1 "DC" H 4250 3750 60 0000 C CNN -F 2 "R1" H 4150 3800 60 0000 C CNN -F 3 "" H 4450 3800 60 0000 C CNN - 1 4450 3800 - 1 0 0 -1 -$EndComp -$Comp -L DC v_id1 -U 1 1 56C45D36 -P 6600 2200 -F 0 "v_id1" H 6400 2300 60 0000 C CNN -F 1 "0" H 6400 2150 60 0000 C CNN -F 2 "R1" H 6300 2200 60 0000 C CNN -F 3 "" H 6600 2200 60 0000 C CNN - 1 6600 2200 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56C45DD7 -P 5800 4300 -F 0 "#PWR01" H 5800 4050 50 0001 C CNN -F 1 "GND" H 5800 4150 50 0000 C CNN -F 2 "" H 5800 4300 50 0000 C CNN -F 3 "" H 5800 4300 50 0000 C CNN - 1 5800 4300 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5500 3300 4450 3300 -Wire Wire Line - 4450 3300 4450 3350 -Wire Wire Line - 4450 4250 7200 4250 -Wire Wire Line - 7200 4250 7200 3750 -Wire Wire Line - 5800 3500 5800 4300 -Connection ~ 5800 4250 -Wire Wire Line - 5800 3100 5800 2200 -Wire Wire Line - 5800 2200 6150 2200 -Wire Wire Line - 7050 2200 7200 2200 -Wire Wire Line - 7200 2200 7200 2850 -$EndSCHEMATC diff --git a/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET b/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET deleted file mode 100644 index e69de29b..00000000 --- a/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET +++ /dev/null diff --git a/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET.bak b/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET.bak deleted file mode 100644 index 3af42406..00000000 --- a/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET.bak +++ /dev/null @@ -1,231 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:FrequencyResponse_JFET-rescue -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:FrequencyResponse_JFET-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L C C1 -U 1 1 554CCDF0 -P 4650 3500 -F 0 "C1" H 4675 3600 50 0000 L CNN -F 1 "1u" H 4675 3400 50 0000 L CNN -F 2 "" H 4688 3350 30 0000 C CNN -F 3 "" H 4650 3500 60 0000 C CNN - 1 4650 3500 - 0 1 1 0 -$EndComp -$Comp -L C C6 -U 1 1 554CD166 -P 6750 4350 -F 0 "C6" H 6775 4450 50 0000 L CNN -F 1 "0.1u" H 6775 4250 50 0000 L CNN -F 2 "" H 6788 4200 30 0000 C CNN -F 3 "" H 6750 4350 60 0000 C CNN - 1 6750 4350 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 554CD6B0 -P 6300 4850 -F 0 "#PWR01" H 6300 4600 50 0001 C CNN -F 1 "GND" H 6300 4700 50 0000 C CNN -F 2 "" H 6300 4850 60 0000 C CNN -F 3 "" H 6300 4850 60 0000 C CNN - 1 6300 4850 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 554CD920 -P 8600 3650 -F 0 "v2" H 8400 3750 60 0000 C CNN -F 1 "DC" H 8400 3600 60 0000 C CNN -F 2 "R1" H 8300 3650 60 0000 C CNN -F 3 "" H 8600 3650 60 0000 C CNN - 1 8600 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6300 2750 6300 3300 -Wire Wire Line - 6300 3700 6300 4250 -Wire Wire Line - 4800 3500 6000 3500 -Wire Wire Line - 5150 4150 5150 3500 -Connection ~ 5150 3500 -Connection ~ 6300 3100 -Wire Wire Line - 6750 4200 6750 4100 -Wire Wire Line - 6750 4100 6300 4100 -Connection ~ 6300 4100 -Wire Wire Line - 6300 4550 6300 4850 -Wire Wire Line - 3550 3500 4500 3500 -Wire Wire Line - 5150 4450 5150 4800 -Wire Wire Line - 3550 4800 8600 4800 -Connection ~ 6300 4800 -Wire Wire Line - 6750 4500 6750 4800 -Connection ~ 6750 4800 -Wire Wire Line - 6300 2250 6300 2450 -Wire Wire Line - 3550 4750 3550 4800 -Connection ~ 5150 4800 -$Comp -L NJF J1 -U 1 1 557065CE -P 6200 3500 -F 0 "J1" H 6100 3550 50 0000 R CNN -F 1 "NJF" H 6150 3650 50 0000 R CNN -F 2 "" H 6400 3600 29 0000 C CNN -F 3 "" H 6200 3500 60 0000 C CNN - 1 6200 3500 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 55D44D80 -P 6250 2550 -F 0 "R3" H 6300 2680 50 0000 C CNN -F 1 "3k" H 6300 2600 50 0000 C CNN -F 2 "" H 6300 2530 30 0000 C CNN -F 3 "" V 6300 2600 30 0000 C CNN - 1 6250 2550 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 55D44EE5 -P 5200 4350 -F 0 "R2" H 5250 4480 50 0000 C CNN -F 1 "1Meg" H 5250 4400 50 0000 C CNN -F 2 "" H 5250 4330 30 0000 C CNN -F 3 "" V 5250 4400 30 0000 C CNN - 1 5200 4350 - 0 -1 -1 0 -$EndComp -$Comp -L R R4 -U 1 1 55D44F9D -P 6350 4450 -F 0 "R4" H 6400 4580 50 0000 C CNN -F 1 "470" H 6400 4500 50 0000 C CNN -F 2 "" H 6400 4430 30 0000 C CNN -F 3 "" V 6400 4500 30 0000 C CNN - 1 6350 4450 - 0 -1 -1 0 -$EndComp -Text GLabel 3350 3350 0 60 Input ~ 0 -in -Wire Wire Line - 6300 2250 8600 2250 -Wire Wire Line - 8600 2250 8600 3200 -Wire Wire Line - 8600 4800 8600 4100 -Text GLabel 6750 3100 2 60 Input ~ 0 -out -Wire Wire Line - 6750 3100 6300 3100 -$Comp -L plot_v1 U1 -U 1 1 56D858F3 -P 3550 3400 -F 0 "U1" H 3550 3900 60 0000 C CNN -F 1 "plot_v1" H 3750 3750 60 0000 C CNN -F 2 "" H 3550 3400 60 0000 C CNN -F 3 "" H 3550 3400 60 0000 C CNN - 1 3550 3400 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U2 -U 1 1 56D85985 -P 6600 3250 -F 0 "U2" H 6600 3750 60 0000 C CNN -F 1 "plot_v1" H 6800 3600 60 0000 C CNN -F 2 "" H 6600 3250 60 0000 C CNN -F 3 "" H 6600 3250 60 0000 C CNN - 1 6600 3250 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6600 3050 6600 3100 -Connection ~ 6600 3100 -Wire Wire Line - 3550 3200 3550 3850 -Connection ~ 3550 3500 -Wire Wire Line - 3350 3350 3550 3350 -Connection ~ 3550 3350 -$Comp -L AC v1 -U 1 1 56D85DA9 -P 3550 4300 -F 0 "v1" H 3350 4400 60 0000 C CNN -F 1 "AC" H 3350 4250 60 0000 C CNN -F 2 "R1" H 3250 4300 60 0000 C CNN -F 3 "" H 3550 4300 60 0000 C CNN - 1 3550 4300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET.cir (copy).out b/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET.cir (copy).out deleted file mode 100644 index be918003..00000000 --- a/Examples/FrequencyResponse_JFET/FrequencyResponse_JFET.cir (copy).out +++ /dev/null @@ -1,30 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: fri may 8 15:00:52 2015 - -.include NJF.lib -j1 6 8 7 J2N3819 -r3 5 6 0.7k -r4 7 0 1k -r1 1 3 10k -c1 8 1 0.01u -r2 0 8 1meg -c2 0 8 5p -c3 8 7 0p -c4 8 6 2p -c5 6 7 0.5p -c6 7 0 2u -c7 6 2 5u -c8 2 0 6p -r5 2 0 2.2k -v2 5 0 dc 20 -v1 3 0 ac 0.1m -.ac lin 100 10Hz 10Meg - -* Control Statements -.control -run -Plot v(3) -plot v(2) -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/FullAdder/FullAdder-cache.lib b/Examples/FullAdder/FullAdder-cache.lib deleted file mode 100644 index 5669fdaf..00000000 --- a/Examples/FullAdder/FullAdder-cache.lib +++ /dev/null @@ -1,116 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# DC -# -DEF DC v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "DC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 50 130 50 H V C CNN -F1 "R" 50 50 50 H V C CNN -F2 "" 50 -20 30 H V C CNN -F3 "" 50 50 30 V V C CNN -$FPLIST - R_* - Resistor_* -$ENDFPLIST -DRAW -S 150 10 -50 90 0 1 10 N -X ~ 1 -100 50 50 R 60 60 1 1 P -X ~ 2 200 50 50 L 60 60 1 1 P -ENDDRAW -ENDDEF -# -# adc_bridge_3 -# -DEF adc_bridge_3 U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "adc_bridge_3" 0 150 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -S -400 200 350 -200 0 1 0 N -X IN1 1 -600 50 200 R 50 50 1 1 I -X IN2 2 -600 -50 200 R 50 50 1 1 I -X IN3 3 -600 -150 200 R 50 50 1 1 I -X OUT1 4 550 50 200 L 50 50 1 1 O -X OUT2 5 550 -50 200 L 50 50 1 1 O -X OUT3 6 550 -150 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# dac_bridge_2 -# -DEF dac_bridge_2 U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "dac_bridge_2" 50 150 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -S -250 200 350 -100 0 1 0 N -X IN1 1 -450 50 200 R 50 50 1 1 I -X IN2 2 -450 -50 200 R 50 50 1 1 I -X OUT1 3 550 50 200 L 50 50 1 1 O -X OUT4 4 550 -50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# full_adder -# -DEF full_adder X 0 40 Y Y 1 F N -F0 "X" 1400 700 60 H V C CNN -F1 "full_adder" 1400 600 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -S 800 1150 1950 0 0 1 0 N -X IN1 1 600 950 200 R 50 50 1 1 I -X IN2 2 600 550 200 R 50 50 1 1 I -X CIN 3 600 150 200 R 50 50 1 1 I -X SUM 4 2150 950 200 L 50 50 1 1 O -X COUT 5 2150 150 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# plot_v1 -# -DEF plot_v1 U 0 40 Y Y 1 F N -F0 "U" 0 500 60 H V C CNN -F1 "plot_v1" 200 350 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -C 0 500 100 0 1 0 N -X ~ ~ 0 200 200 U 50 50 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/FullAdder/FullAdder.bak b/Examples/FullAdder/FullAdder.bak deleted file mode 100644 index fb0b6864..00000000 --- a/Examples/FullAdder/FullAdder.bak +++ /dev/null @@ -1,328 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:eSim_Plot -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L full_adder X1 -U 1 1 56D58C2E -P 4350 4050 -F 0 "X1" H 5750 4750 60 0000 C CNN -F 1 "full_adder" H 5750 4650 60 0000 C CNN -F 2 "" H 4350 4050 60 0000 C CNN -F 3 "" H 4350 4050 60 0000 C CNN - 1 4350 4050 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 56D58CB2 -P 1300 3550 -F 0 "v1" H 1100 3650 60 0000 C CNN -F 1 "DC" H 1100 3500 60 0000 C CNN -F 2 "R1" H 1000 3550 60 0000 C CNN -F 3 "" H 1300 3550 60 0000 C CNN - 1 1300 3550 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 56D58D3D -P 1950 3950 -F 0 "v2" H 1750 4050 60 0000 C CNN -F 1 "DC" H 1750 3900 60 0000 C CNN -F 2 "R1" H 1650 3950 60 0000 C CNN -F 3 "" H 1950 3950 60 0000 C CNN - 1 1950 3950 - 1 0 0 -1 -$EndComp -$Comp -L DC v3 -U 1 1 56D58D84 -P 2700 4350 -F 0 "v3" H 2500 4450 60 0000 C CNN -F 1 "DC" H 2500 4300 60 0000 C CNN -F 2 "R1" H 2400 4350 60 0000 C CNN -F 3 "" H 2700 4350 60 0000 C CNN - 1 2700 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 56D58F73 -P 8200 3200 -F 0 "R1" H 8250 3330 50 0000 C CNN -F 1 "1k" H 8250 3250 50 0000 C CNN -F 2 "" H 8250 3180 30 0000 C CNN -F 3 "" V 8250 3250 30 0000 C CNN - 1 8200 3200 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 56D58FBB -P 8200 4000 -F 0 "R2" H 8250 4130 50 0000 C CNN -F 1 "1k" H 8250 4050 50 0000 C CNN -F 2 "" H 8250 3980 30 0000 C CNN -F 3 "" V 8250 4050 30 0000 C CNN - 1 8200 4000 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56D59061 -P 8400 3150 -F 0 "#PWR01" H 8400 2900 50 0001 C CNN -F 1 "GND" H 8400 3000 50 0000 C CNN -F 2 "" H 8400 3150 50 0000 C CNN -F 3 "" H 8400 3150 50 0000 C CNN - 1 8400 3150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 56D590A3 -P 8400 3950 -F 0 "#PWR02" H 8400 3700 50 0001 C CNN -F 1 "GND" H 8400 3800 50 0000 C CNN -F 2 "" H 8400 3950 50 0000 C CNN -F 3 "" H 8400 3950 50 0000 C CNN - 1 8400 3950 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 56D590F0 -P 2700 4800 -F 0 "#PWR03" H 2700 4550 50 0001 C CNN -F 1 "GND" H 2700 4650 50 0000 C CNN -F 2 "" H 2700 4800 50 0000 C CNN -F 3 "" H 2700 4800 50 0000 C CNN - 1 2700 4800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 56D59137 -P 1950 4450 -F 0 "#PWR04" H 1950 4200 50 0001 C CNN -F 1 "GND" H 1950 4300 50 0000 C CNN -F 2 "" H 1950 4450 50 0000 C CNN -F 3 "" H 1950 4450 50 0000 C CNN - 1 1950 4450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR05 -U 1 1 56D59154 -P 1300 4000 -F 0 "#PWR05" H 1300 3750 50 0001 C CNN -F 1 "GND" H 1300 3850 50 0000 C CNN -F 2 "" H 1300 4000 50 0000 C CNN -F 3 "" H 1300 4000 50 0000 C CNN - 1 1300 4000 - 1 0 0 -1 -$EndComp -Wire Wire Line - 1300 3100 3300 3100 -Wire Wire Line - 1950 3500 3300 3500 -Wire Wire Line - 2700 3900 3300 3900 -$Comp -L plot_v1 U2 -U 1 1 56D59201 -P 2800 3250 -F 0 "U2" H 2800 3750 60 0000 C CNN -F 1 "plot_v1" H 3000 3600 60 0000 C CNN -F 2 "" H 2800 3250 60 0000 C CNN -F 3 "" H 2800 3250 60 0000 C CNN - 1 2800 3250 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U1 -U 1 1 56D59261 -P 2700 3700 -F 0 "U1" H 2700 4200 60 0000 C CNN -F 1 "plot_v1" H 2900 4050 60 0000 C CNN -F 2 "" H 2700 3700 60 0000 C CNN -F 3 "" H 2700 3700 60 0000 C CNN - 1 2700 3700 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U3 -U 1 1 56D592AF -P 3050 4100 -F 0 "U3" H 3050 4600 60 0000 C CNN -F 1 "plot_v1" H 3250 4450 60 0000 C CNN -F 2 "" H 3050 4100 60 0000 C CNN -F 3 "" H 3050 4100 60 0000 C CNN - 1 3050 4100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 2800 3050 2800 3100 -Connection ~ 2800 3100 -Connection ~ 2700 3500 -Connection ~ 3050 3900 -Wire Wire Line - 7850 3150 8100 3150 -Wire Wire Line - 7850 3950 8100 3950 -$Comp -L plot_v1 U4 -U 1 1 56D59437 -P 7900 3300 -F 0 "U4" H 7900 3800 60 0000 C CNN -F 1 "plot_v1" H 8100 3650 60 0000 C CNN -F 2 "" H 7900 3300 60 0000 C CNN -F 3 "" H 7900 3300 60 0000 C CNN - 1 7900 3300 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U5 -U 1 1 56D59491 -P 7950 4100 -F 0 "U5" H 7950 4600 60 0000 C CNN -F 1 "plot_v1" H 8150 4450 60 0000 C CNN -F 2 "" H 7950 4100 60 0000 C CNN -F 3 "" H 7950 4100 60 0000 C CNN - 1 7950 4100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7950 3900 7950 3950 -Connection ~ 7950 3950 -Text GLabel 1900 3050 1 60 Input ~ 0 -in1 -Text GLabel 2150 3450 1 60 Input ~ 0 -in2 -Text GLabel 2850 3850 1 60 Input ~ 0 -cin -Text GLabel 8050 3200 3 60 Input ~ 0 -sum -Text GLabel 8050 4050 3 60 Input ~ 0 -cout -Wire Wire Line - 8050 3200 8050 3150 -Connection ~ 8050 3150 -Wire Wire Line - 8050 4050 8050 3950 -Connection ~ 8050 3950 -Wire Wire Line - 2850 3850 2850 3900 -Connection ~ 2850 3900 -Wire Wire Line - 2150 3450 2150 3500 -Connection ~ 2150 3500 -Wire Wire Line - 1900 3050 1900 3100 -Connection ~ 1900 3100 -$Comp -L adc_bridge_3 U6 -U 1 1 56D59BD2 -P 3900 3450 -F 0 "U6" H 3900 3450 60 0000 C CNN -F 1 "adc_bridge_3" H 3900 3600 60 0000 C CNN -F 2 "" H 3900 3450 60 0000 C CNN -F 3 "" H 3900 3450 60 0000 C CNN - 1 3900 3450 - 1 0 0 -1 -$EndComp -$Comp -L dac_bridge_2 U7 -U 1 1 56D5AD2F -P 7150 3450 -F 0 "U7" H 7150 3450 60 0000 C CNN -F 1 "dac_bridge_2" H 7200 3600 60 0000 C CNN -F 2 "" H 7150 3450 60 0000 C CNN -F 3 "" H 7150 3450 60 0000 C CNN - 1 7150 3450 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6500 3100 6700 3100 -Wire Wire Line - 6700 3100 6700 3400 -Wire Wire Line - 6500 3900 6700 3900 -Wire Wire Line - 6700 3900 6700 3500 -Wire Wire Line - 7700 3400 7850 3400 -Wire Wire Line - 7850 3400 7850 3150 -Wire Wire Line - 7900 3100 7900 3150 -Connection ~ 7900 3150 -Wire Wire Line - 7700 3500 7850 3500 -Wire Wire Line - 7850 3500 7850 3950 -Wire Wire Line - 3300 3900 3300 3600 -Wire Wire Line - 3300 3100 3300 3400 -Wire Wire Line - 4450 3500 4950 3500 -Wire Wire Line - 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\ No newline at end of file diff --git a/Examples/FullAdder/half_adder-cache.lib b/Examples/FullAdder/half_adder-cache.lib deleted file mode 100644 index 68785220..00000000 --- a/Examples/FullAdder/half_adder-cache.lib +++ /dev/null @@ -1,63 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# d_and -# -DEF d_and U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_and" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 -A 150 49 100 6 900 0 1 0 N 250 50 150 150 -P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N -X IN1 1 -450 100 200 R 50 50 1 1 I -X IN2 2 -450 0 200 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# d_xor -# -DEF d_xor U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_xor" 50 100 47 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 -A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150 -A -25 -124 325 574 323 0 1 0 N 150 150 250 50 -A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 -P 2 0 1 0 150 -50 -200 -50 N -P 2 0 1 0 150 150 -200 150 N -X IN1 1 -450 100 215 R 50 43 1 1 I -X IN2 2 -450 0 215 R 50 43 1 1 I -X OUT 3 450 50 200 L 50 39 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/FullAdder/half_adder_Previous_Values.xml b/Examples/FullAdder/half_adder_Previous_Values.xml deleted file mode 100644 index b915f0da..00000000 --- a/Examples/FullAdder/half_adder_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u2 name="type">d_xor<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/FullwaveRectifier_SCR/FullwaveRectifier_SCR-cache.lib b/Examples/FullwaveRectifier_SCR/FullwaveRectifier_SCR-cache.lib deleted file mode 100644 index b4195e35..00000000 --- a/Examples/FullwaveRectifier_SCR/FullwaveRectifier_SCR-cache.lib +++ /dev/null @@ -1,156 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# D -# -DEF D D 0 40 N N 1 F N -F0 "D" 0 100 50 H V C CNN -F1 "D" 0 -100 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - Diode_* - D-Pak_TO252AA - *SingleDiode - *_Diode_* - *SingleDiode* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -150 0 100 R 40 40 1 1 P -X K 2 150 0 100 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 95 50 H I C CNN -F1 "PWR_FLAG" 0 180 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -X pwr 1 0 0 0 U 50 50 0 0 w -P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 50 130 50 H V C CNN -F1 "R" 50 50 50 H V C CNN -F2 "" 50 -20 30 H V C CNN -F3 "" 50 50 30 V V C CNN -$FPLIST - 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1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/FullwaveRectifier_SCR/FullwaveRectifier_SCR.bak b/Examples/FullwaveRectifier_SCR/FullwaveRectifier_SCR.bak deleted file mode 100644 index 997e75df..00000000 --- a/Examples/FullwaveRectifier_SCR/FullwaveRectifier_SCR.bak +++ /dev/null @@ -1,280 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:fullwaverec-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 aug 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 2150 4800 -Wire Wire Line - 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1700 3850 3000 3850 -Connection ~ 2150 3850 -$Comp -L PWR_FLAG #FLG01 -U 1 1 53F57BC9 -P 4400 5900 -F 0 "#FLG01" H 4400 6170 30 0001 C CNN -F 1 "PWR_FLAG" H 4400 6130 30 0000 C CNN -F 2 "" H 4400 5900 60 0001 C CNN -F 3 "" H 4400 5900 60 0001 C CNN - 1 4400 5900 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 53F57B8F -P 4400 5900 -F 0 "#PWR02" H 4400 5900 30 0001 C CNN -F 1 "GND" H 4400 5830 30 0001 C CNN -F 2 "" H 4400 5900 60 0001 C CNN -F 3 "" H 4400 5900 60 0001 C CNN - 1 4400 5900 - 1 0 0 -1 -$EndComp -$Comp -L SCR x1 -U 1 1 53F57A75 -P 4950 3800 -F 0 "x1" H 5100 4050 70 0000 C CNN -F 1 "SCR" H 5100 3450 70 0000 C CNN -F 2 "" H 4950 3800 60 0001 C CNN -F 3 "" H 4950 3800 60 0001 C CNN - 1 4950 3800 - 1 0 0 -1 -$EndComp -$Comp -L sine v1 -U 1 1 566163B6 -P 1700 4350 -F 0 "v1" H 1500 4450 60 0000 C CNN -F 1 "sine" H 1500 4300 60 0000 C CNN -F 2 "R1" H 1400 4350 60 0000 C CNN -F 3 "" H 1700 4350 60 0000 C CNN - 1 1700 4350 - 1 0 0 -1 -$EndComp -$Comp -L pulse v2 -U 1 1 5661641A -P 4400 4850 -F 0 "v2" H 4200 4950 60 0000 C CNN -F 1 "pulse" H 4200 4800 60 0000 C CNN -F 2 "R1" H 4100 4850 60 0000 C CNN -F 3 "" H 4400 4850 60 0000 C CNN - 1 4400 4850 - 1 0 0 -1 -$EndComp -$Comp -L D D1 -U 1 1 566164AF -P 3000 3400 -F 0 "D1" H 3000 3500 50 0000 C CNN -F 1 "D" H 3000 3300 50 0000 C CNN -F 2 "" H 3000 3400 60 0000 C CNN -F 3 "" H 3000 3400 60 0000 C CNN - 1 3000 3400 - 0 -1 -1 0 -$EndComp -$Comp -L D D3 -U 1 1 566164F1 -P 3700 3400 -F 0 "D3" H 3700 3500 50 0000 C CNN -F 1 "D" H 3700 3300 50 0000 C CNN -F 2 "" H 3700 3400 60 0000 C CNN -F 3 "" H 3700 3400 60 0000 C CNN - 1 3700 3400 - 0 -1 -1 0 -$EndComp -$Comp -L D D2 -U 1 1 56616559 -P 3000 4150 -F 0 "D2" H 3000 4250 50 0000 C CNN -F 1 "D" H 3000 4050 50 0000 C CNN -F 2 "" H 3000 4150 60 0000 C CNN -F 3 "" H 3000 4150 60 0000 C CNN - 1 3000 4150 - 0 -1 -1 0 -$EndComp -$Comp -L D D4 -U 1 1 566165C2 -P 3700 4200 -F 0 "D4" H 3700 4300 50 0000 C CNN -F 1 "D" H 3700 4100 50 0000 C CNN -F 2 "" H 3700 4200 60 0000 C CNN -F 3 "" H 3700 4200 60 0000 C CNN - 1 3700 4200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 56616736 -P 4350 3100 -F 0 "R1" H 4400 3230 50 0000 C CNN -F 1 "100" H 4400 3150 50 0000 C CNN -F 2 "" H 4400 3080 30 0000 C CNN -F 3 "" V 4400 3150 30 0000 C CNN - 1 4350 3100 - 1 0 0 -1 -$EndComp -Text GLabel 2150 3650 1 60 Input ~ 0 -in1 -Text GLabel 2150 5000 3 60 Input ~ 0 -in2 -Text GLabel 4100 2550 1 60 Input ~ 0 -out1 -Text GLabel 4700 2550 1 60 Input ~ 0 -out2 -Wire Wire Line - 1700 3850 1700 3900 -Wire Wire Line - 2150 4600 2150 5000 -Wire Wire Line - 4250 3050 4150 3050 -Text GLabel 4350 4100 0 60 Input ~ 0 -pulse -Wire Wire Line - 4350 4100 4450 4100 -Wire Wire Line - 4450 4100 4450 4200 -Connection ~ 4450 4200 -$Comp -L plot_v2 U1 -U 1 1 56D85F3A -P 1900 4300 -F 0 "U1" H 1900 4700 60 0000 C CNN -F 1 "plot_v2" H 1900 4400 60 0000 C CNN -F 2 "" H 1900 4300 60 0000 C CNN -F 3 "" H 1900 4300 60 0000 C CNN - 1 1900 4300 - 0 1 1 0 -$EndComp -$Comp -L plot_v1 U3 -U 1 1 56D860A5 -P 4400 4250 -F 0 "U3" H 4400 4750 60 0000 C CNN -F 1 "plot_v1" H 4600 4600 60 0000 C CNN -F 2 "" H 4400 4250 60 0000 C CNN -F 3 "" H 4400 4250 60 0000 C CNN - 1 4400 4250 - 1 0 0 -1 -$EndComp -$Comp -L plot_v2 U2 -U 1 1 56D860FE -P 4400 2400 -F 0 "U2" H 4400 2800 60 0000 C CNN -F 1 "plot_v2" H 4400 2500 60 0000 C CNN -F 2 "" H 4400 2400 60 0000 C CNN -F 3 "" H 4400 2400 60 0000 C CNN - 1 4400 2400 - 1 0 0 1 -$EndComp -Connection ~ 4100 2650 -Connection ~ 4700 2650 -Wire Wire Line - 4400 4050 4400 4100 -Connection ~ 4400 4100 -$EndSCHEMATC diff --git a/Examples/FullwaveRectifier_SCR/scr.bak b/Examples/FullwaveRectifier_SCR/scr.bak deleted file mode 100644 index 58b985d9..00000000 --- a/Examples/FullwaveRectifier_SCR/scr.bak +++ /dev/null @@ -1,243 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:scr-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 aug 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 3600 3250 3600 3150 -Connection ~ 5550 4950 -Wire Wire Line - 5800 3900 5800 3850 -Wire Wire Line - 5800 3850 6150 3850 -Wire Wire Line - 6150 3850 6150 4950 -Wire Wire Line - 6150 4950 3600 4950 -Connection ~ 4300 4950 -Wire Wire Line - 4300 4950 4300 4050 -Wire Wire Line - 4300 4050 3850 4050 -Wire Wire Line - 4700 5950 4700 5450 -Wire Wire Line - 4250 5950 4250 5500 -Connection ~ 4250 4950 -Wire Wire Line - 4250 5000 4250 4950 -Wire Wire Line - 5550 3600 5550 3450 -Wire Wire Line - 5550 4950 5550 4250 -Wire Wire Line - 3600 4950 3600 4400 -Wire Wire Line - 3600 2650 3600 2300 -Wire Wire Line - 3600 2300 3150 2300 -Wire Wire Line - 3600 4150 3600 4300 -Wire Wire Line - 5550 4150 5550 4000 -Wire Wire Line - 5550 2550 5550 2250 -Wire Wire Line - 4700 5050 4700 4950 -Connection ~ 4700 4950 -Wire Wire Line - 6650 2000 6650 5950 -Connection ~ 4700 5950 -Wire Wire Line - 3850 4650 3850 5950 -Wire Wire Line - 3850 5950 6650 5950 -Connection ~ 4250 5950 -Wire Wire Line - 5800 4500 5800 5950 -Connection ~ 5800 5950 -$Comp -L PORT U2 -U 3 1 53F4C93D -P 6650 2250 -F 0 "U2" H 6650 2200 30 0000 C CNN -F 1 "PORT" H 6650 2250 30 0000 C CNN -F 2 "" H 6650 2250 60 0001 C CNN -F 3 "" H 6650 2250 60 0001 C CNN - 3 6650 2250 - -1 0 0 1 -$EndComp -$Comp -L PORT U2 -U 2 1 53F4C934 -P 2900 2300 -F 0 "U2" H 2900 2250 30 0000 C CNN -F 1 "PORT" H 2900 2300 30 0000 C CNN -F 2 "" H 2900 2300 60 0001 C CNN -F 3 "" H 2900 2300 60 0001 C CNN - 2 2900 2300 - 1 0 0 -1 -$EndComp -$Comp -L PORT U2 -U 1 1 53F4C92A -P 6400 4950 -F 0 "U2" H 6400 4900 30 0000 C CNN -F 1 "PORT" H 6400 4950 30 0000 C CNN -F 2 "" H 6400 4950 60 0001 C CNN -F 3 "" H 6400 4950 60 0001 C CNN - 1 6400 4950 - -1 0 0 1 -$EndComp -$Comp -L CCCS F2 -U 1 1 53F4C735 -P 5750 4200 -F 0 "F2" H 5550 4300 50 0000 C CNN -F 1 "100" H 5550 4150 50 0000 C CNN -F 2 "" H 5750 4200 60 0001 C CNN -F 3 "" H 5750 4200 60 0001 C CNN - 1 5750 4200 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 53F4C6D9 -P 5550 3800 -F 0 "D1" H 5550 3900 40 0000 C CNN -F 1 "D" H 5550 3700 40 0000 C CNN -F 2 "" H 5550 3800 60 0001 C CNN -F 3 "" H 5550 3800 60 0001 C CNN - 1 5550 3800 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 53F4C6C2 -P 4700 5250 -F 0 "C1" H 4750 5350 50 0000 L CNN -F 1 "10u" H 4750 5150 50 0000 L CNN -F 2 "" H 4700 5250 60 0001 C CNN -F 3 "" H 4700 5250 60 0001 C CNN - 1 4700 5250 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 53F4C6BB -P 4250 5250 -F 0 "R2" V 4330 5250 50 0000 C CNN -F 1 "1" V 4250 5250 50 0000 C CNN -F 2 "" H 4250 5250 60 0001 C CNN -F 3 "" H 4250 5250 60 0001 C CNN - 1 4250 5250 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F1 -U 1 1 53F4C67F -P 3800 4350 -F 0 "F1" H 3600 4450 50 0000 C CNN -F 1 "10" H 3600 4300 50 0000 C CNN -F 2 "" H 3800 4350 60 0001 C CNN -F 3 "" H 3800 4350 60 0001 C CNN - 1 3800 4350 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 53F4C5C9 -P 3600 2900 -F 0 "R1" V 3680 2900 50 0000 C CNN -F 1 "50" V 3600 2900 50 0000 C CNN -F 2 "" H 3600 2900 60 0001 C CNN -F 3 "" H 3600 2900 60 0001 C CNN - 1 3600 2900 - 1 0 0 -1 -$EndComp -$Comp -L dc v1 -U 1 1 565DBF58 -P 3600 3700 -F 0 "v1" H 3400 3800 60 0000 C CNN -F 1 "dc" H 3400 3650 60 0000 C CNN -F 2 "R1" H 3300 3700 60 0000 C CNN -F 3 "" H 3600 3700 60 0000 C CNN - 1 3600 3700 - 1 0 0 -1 -$EndComp -$Comp -L dc v2 -U 1 1 565DC066 -P 5550 3000 -F 0 "v2" H 5350 3100 60 0000 C CNN -F 1 "dc" H 5350 2950 60 0000 C CNN -F 2 "R1" H 5250 3000 60 0000 C CNN -F 3 "" H 5550 3000 60 0000 C CNN - 1 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L aswitch U1 -U 1 1 565DC87E -P 6400 2100 -F 0 "U1" H 6850 2400 60 0000 C CNN -F 1 "aswitch" H 6850 2300 60 0000 C CNN -F 2 "" H 6850 2200 60 0000 C CNN -F 3 "" H 6850 2200 60 0000 C CNN - 1 6400 2100 - -1 0 0 1 -$EndComp -Wire Wire Line - 5950 2000 6650 2000 -$EndSCHEMATC diff --git a/Examples/FullwaveRectifier_SCR/scr.cir.ckt b/Examples/FullwaveRectifier_SCR/scr.cir.ckt deleted file mode 100644 index b0e218fd..00000000 --- a/Examples/FullwaveRectifier_SCR/scr.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 08/21/14 11:07:22
-.include diode.lib
-
-u2 5 8 1 port
-* f2
-* Analog Switch analogswitch
-d1 4 2 diode
-v2 3 4 dc 0
-c1 5 6 10u
-r2 5 6 1
-* f1
-v1 9 7 dc 0
-r1 8 9 50
-Vf2 2 5 0
-f2 5 6 Vf2 100
-Vf1 7 5 0
-f1 5 6 Vf1 10
-a1 6 (1 3) u1
-.model u1 aswitch(cntl_on=0.25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/Examples/FullwaveRectifier_SCR/scr.cir.out~ b/Examples/FullwaveRectifier_SCR/scr.cir.out~ deleted file mode 100644 index d600f25d..00000000 --- a/Examples/FullwaveRectifier_SCR/scr.cir.out~ +++ /dev/null @@ -1,29 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/scr/scr.cir - -.include PowerDiode.lib -* u2 3 7 1 port -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 (1 6) u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -.tran 0e-12 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/FullwaveRectifier_SCR/scr.sub~ b/Examples/FullwaveRectifier_SCR/scr.sub~ deleted file mode 100644 index 0fdddbf4..00000000 --- a/Examples/FullwaveRectifier_SCR/scr.sub~ +++ /dev/null @@ -1,23 +0,0 @@ -* Subcircuit scr -.subckt scr 3 7 1 -* /opt/esim/src/subcircuitlibrary/scr/scr.cir -.include PowerDiode.lib -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 [1 6 ] u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -* Control Statements - -.ends scr
\ No newline at end of file diff --git a/Examples/FullwaveRectifier_SCR/scr_Previous_Values.xml b/Examples/FullwaveRectifier_SCR/scr_Previous_Values.xml deleted file mode 100644 index 8ff6e8d3..00000000 --- a/Examples/FullwaveRectifier_SCR/scr_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -<KicadtoNgspice><source><v1 name="Source type">dc<field1 name="Value">0</field1></v1><v2 name="Source type">dc<field1 name="Value">0</field1></v2></source><model><u1 name="type">aswitch<field1 name="Enter Log (default=TRUE)" /><field2 name="Enter Control OFF value (default=0.0)" /><field3 name="Enter OFF Resistance (default=1.0e12)" /><field4 name="Enter ON Resistance (default=1.0)" /><field5 name="Enter Control ON value(default=1.0)" /></u1></model><devicemodel><d1><field>/opt/eSim/src/deviceModelLibrary/Diode/PowerDiode.lib</field></d1></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ps</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/Fullwavebridgerectifier/Fullwavebridgerectifier.bak b/Examples/Fullwavebridgerectifier/Fullwavebridgerectifier.bak deleted file mode 100644 index 31e618c6..00000000 --- a/Examples/Fullwavebridgerectifier/Fullwavebridgerectifier.bak +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:eSim_Plot -LIBS:Fullwavebridgerectifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L sine v1 -U 1 1 56A85DC5 -P 3400 3600 -F 0 "v1" H 3200 3700 60 0000 C CNN -F 1 "sine" H 3200 3550 60 0000 C CNN -F 2 "R1" H 3100 3600 60 0000 C CNN -F 3 "" H 3400 3600 60 0000 C CNN - 1 3400 3600 - 1 0 0 -1 -$EndComp -$Comp -L D D1 -U 1 1 56A85EED -P 4200 2900 -F 0 "D1" H 4200 3000 50 0000 C CNN -F 1 "D" H 4200 2800 50 0000 C CNN -F 2 "" H 4200 2900 60 0000 C CNN -F 3 "" H 4200 2900 60 0000 C CNN - 1 4200 2900 - 0 -1 -1 0 -$EndComp -$Comp -L D D3 -U 1 1 56A85F6E -P 5000 2900 -F 0 "D3" H 5000 3000 50 0000 C CNN -F 1 "D" H 5000 2800 50 0000 C CNN -F 2 "" H 5000 2900 60 0000 C CNN -F 3 "" H 5000 2900 60 0000 C CNN - 1 5000 2900 - 0 -1 -1 0 -$EndComp -$Comp -L D D2 -U 1 1 56A85FBD -P 4200 4250 -F 0 "D2" H 4200 4350 50 0000 C CNN -F 1 "D" H 4200 4150 50 0000 C CNN -F 2 "" H 4200 4250 60 0000 C CNN -F 3 "" H 4200 4250 60 0000 C CNN - 1 4200 4250 - 0 -1 -1 0 -$EndComp -$Comp -L D D4 -U 1 1 56A8602F -P 5000 4250 -F 0 "D4" H 5000 4350 50 0000 C CNN -F 1 "D" H 5000 4150 50 0000 C CNN -F 2 "" H 5000 4250 60 0000 C CNN -F 3 "" H 5000 4250 60 0000 C CNN - 1 5000 4250 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 56A860D7 -P 6050 3400 -F 0 "R1" H 6100 3530 50 0000 C CNN -F 1 "1k" H 6100 3450 50 0000 C CNN -F 2 "" H 6100 3380 30 0000 C CNN -F 3 "" V 6100 3450 30 0000 C CNN - 1 6050 3400 - 0 1 1 0 -$EndComp -Wire Wire Line - 4200 2750 4200 2650 -Wire Wire Line - 4200 2650 6100 2650 -Wire Wire Line - 5000 2650 5000 2750 -Wire Wire Line - 4200 4100 4200 3050 -Wire Wire Line - 5000 4100 5000 3050 -Wire Wire Line - 4200 4400 4200 4500 -Wire Wire Line - 4200 4500 6100 4500 -Wire Wire Line - 5000 4500 5000 4400 -Wire Wire Line - 6100 2650 6100 3300 -Connection ~ 5000 2650 -Wire Wire Line - 6100 4500 6100 3600 -Connection ~ 5000 4500 -Wire Wire Line - 3400 3150 3700 3150 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 3700 3400 4200 3400 -Connection ~ 4200 3400 -Wire Wire Line - 3400 4050 3700 4050 -Wire Wire Line - 3700 4050 3700 3600 -Wire Wire Line - 3700 3600 5000 3600 -Connection ~ 5000 3600 -$Comp -L GND #PWR1 -U 1 1 56A862E5 -P 5300 4650 -F 0 "#PWR1" H 5300 4400 50 0001 C CNN -F 1 "GND" H 5300 4500 50 0000 C CNN -F 2 "" H 5300 4650 50 0000 C CNN -F 3 "" H 5300 4650 50 0000 C CNN - 1 5300 4650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5300 4650 5300 4500 -Connection ~ 5300 4500 -Text GLabel 3550 3050 1 60 Input ~ 0 -in1 -Text GLabel 3550 4150 3 60 Input ~ 0 -in2 -Text GLabel 5800 2500 2 60 Input ~ 0 -out -Wire Wire Line - 3550 3050 3550 3150 -Connection ~ 3550 3150 -Wire Wire Line - 3550 4150 3550 4050 -Connection ~ 3550 4050 -Wire Wire Line - 5800 2500 5750 2500 -Wire Wire Line - 5750 2400 5750 2650 -Connection ~ 5750 2650 -Connection ~ 5750 2500 -Wire Wire Line - 2850 3250 2850 3100 -Wire Wire Line - 2850 3100 3550 3100 -Connection ~ 3550 3100 -Wire Wire Line - 2850 3850 2850 4100 -Wire Wire Line - 2850 4100 3550 4100 -Connection ~ 3550 4100 -$Comp -L plot_v1 U2 -U 1 1 56D43D75 -P 5750 2600 -F 0 "U2" H 5750 3100 60 0000 C CNN -F 1 "plot_v1" H 5950 2950 60 0000 C CNN -F 2 "" H 5750 2600 60 0000 C CNN -F 3 "" H 5750 2600 60 0000 C CNN - 1 5750 2600 - 1 0 0 -1 -$EndComp -$Comp -L plot_v2 U1 -U 1 1 56D43E45 -P 2600 3550 -F 0 "U1" H 2600 3950 60 0000 C CNN -F 1 "plot_v2" H 2600 3650 60 0000 C CNN -F 2 "" H 2600 3550 60 0000 C CNN -F 3 "" H 2600 3550 60 0000 C CNN - 1 2600 3550 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/Examples/Half_Adder/Half_Adder.bak b/Examples/Half_Adder/Half_Adder.bak deleted file mode 100644 index a40cbbbd..00000000 --- a/Examples/Half_Adder/Half_Adder.bak +++ /dev/null @@ -1,260 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:Half_Adder-rescue -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:Half_Adder-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L half_adder X1 -U 1 1 558A91C8 -P 5000 3900 -F 0 "X1" H 5900 4400 60 0000 C CNN -F 1 "half_adder" H 5900 4300 60 0000 C CNN -F 2 "" H 5000 3900 60 0000 C CNN -F 3 "" H 5000 3900 60 0000 C CNN - 1 5000 3900 - 1 0 0 -1 -$EndComp -$Comp -L adc_bridge_2 U1 -U 1 1 558A92C9 -P 4550 3500 -F 0 "U1" H 4550 3500 60 0000 C CNN -F 1 "adc_bridge_2" H 4550 3650 60 0000 C CNN -F 2 "" H 4550 3500 60 0000 C CNN -F 3 "" H 4550 3500 60 0000 C CNN - 1 4550 3500 - 1 0 0 -1 -$EndComp -$Comp -L dac_bridge_2 U2 -U 1 1 558A9300 -P 6950 3450 -F 0 "U2" H 6950 3450 60 0000 C CNN -F 1 "dac_bridge_2" H 7000 3600 60 0000 C CNN -F 2 "" H 6950 3450 60 0000 C CNN -F 3 "" H 6950 3450 60 0000 C CNN - 1 6950 3450 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 558A9345 -P 3450 3150 -F 0 "v1" H 3250 3250 60 0000 C CNN -F 1 "DC" H 3250 3100 60 0000 C CNN -F 2 "R1" H 3150 3150 60 0000 C CNN -F 3 "" H 3450 3150 60 0000 C CNN - 1 3450 3150 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 558A937C -P 3450 3800 -F 0 "v2" H 3250 3900 60 0000 C CNN -F 1 "DC" H 3250 3750 60 0000 C CNN -F 2 "R1" H 3150 3800 60 0000 C CNN -F 3 "" H 3450 3800 60 0000 C CNN - 1 3450 3800 - 0 1 1 0 -$EndComp -$Comp -L GND-RESCUE-Half_Adder #PWR01 -U 1 1 558A93BB -P 2950 4000 -F 0 "#PWR01" H 2950 4000 30 0001 C CNN -F 1 "GND" H 2950 3930 30 0001 C CNN -F 2 "" H 2950 4000 60 0000 C CNN -F 3 "" H 2950 4000 60 0000 C CNN - 1 2950 4000 - 1 0 0 -1 -$EndComp -$Comp -L GND-RESCUE-Half_Adder #PWR02 -U 1 1 558A93D7 -P 2950 3250 -F 0 "#PWR02" H 2950 3250 30 0001 C CNN -F 1 "GND" H 2950 3180 30 0001 C CNN -F 2 "" H 2950 3250 60 0000 C CNN -F 3 "" H 2950 3250 60 0000 C CNN - 1 2950 3250 - 1 0 0 -1 -$EndComp -$Comp -L GND-RESCUE-Half_Adder #PWR03 -U 1 1 558A9480 -P 8350 3650 -F 0 "#PWR03" H 8350 3650 30 0001 C CNN -F 1 "GND" H 8350 3580 30 0001 C CNN -F 2 "" H 8350 3650 60 0000 C CNN -F 3 "" H 8350 3650 60 0000 C CNN - 1 8350 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3000 3150 2950 3150 -Wire Wire Line - 2950 3150 2950 3250 -Wire Wire Line - 3000 3800 2950 3800 -Wire Wire Line - 2950 3800 2950 4000 -Wire Wire Line - 3900 3800 3950 3800 -Wire Wire Line - 3950 3800 3950 3550 -Wire Wire Line - 3950 3450 3950 3150 -Wire Wire Line - 3950 3150 3900 3150 -Wire Wire Line - 5100 3450 5300 3450 -Wire Wire Line - 5300 3450 5300 3200 -Wire Wire Line - 5100 3550 5300 3550 -Wire Wire Line - 5300 3550 5300 3800 -Wire Wire Line - 6450 3200 6450 3400 -Wire Wire Line - 6450 3400 6500 3400 -Wire Wire Line - 6500 3500 6450 3500 -Wire Wire Line - 6450 3500 6450 3800 -Wire Wire Line - 7500 3400 7600 3400 -Wire Wire Line - 7600 3400 7600 3300 -Wire Wire Line - 7600 3300 7700 3300 -Wire Wire Line - 7500 3500 7600 3500 -Wire Wire Line - 7600 3500 7600 3550 -Wire Wire Line - 7600 3550 7700 3550 -Wire Wire Line - 8000 3300 8350 3300 -Wire Wire Line - 8350 3300 8350 3650 -Wire Wire Line - 8000 3550 8350 3550 -Wire Wire Line - 8350 3550 8350 3500 -Connection ~ 8350 3500 -$Comp -L PWR_FLAG #FLG04 -U 1 1 558A96D4 -P 2850 3850 -F 0 "#FLG04" H 2850 3945 50 0001 C CNN -F 1 "PWR_FLAG" H 2850 4030 50 0000 C CNN -F 2 "" H 2850 3850 60 0000 C CNN -F 3 "" H 2850 3850 60 0000 C CNN - 1 2850 3850 - 1 0 0 -1 -$EndComp -Wire Wire Line - 2850 3850 2850 3900 -Wire Wire Line - 2850 3900 2950 3900 -Connection ~ 2950 3900 -Text GLabel 7600 3150 0 60 Input ~ 0 -sum -Text GLabel 7600 3750 0 60 Input ~ 0 -cout -Text GLabel 4050 3150 2 60 Input ~ 0 -A -Text GLabel 4100 3750 2 60 Input ~ 0 -B -Wire Wire Line - 4050 3150 4050 3250 -Wire Wire Line - 4050 3250 3950 3250 -Connection ~ 3950 3250 -Wire Wire Line - 4100 3750 3950 3750 -Connection ~ 3950 3750 -Wire Wire Line - 7600 3750 7650 3750 -Wire Wire Line - 7650 3750 7650 3550 -Connection ~ 7650 3550 -Wire Wire Line - 7600 3150 7650 3150 -Wire Wire Line - 7650 3150 7650 3300 -Connection ~ 7650 3300 -$Comp -L R R1 -U 1 1 55D44B20 -P 7800 3350 -F 0 "R1" H 7850 3480 50 0000 C CNN -F 1 "1k" H 7850 3400 50 0000 C CNN -F 2 "" H 7850 3330 30 0000 C CNN -F 3 "" V 7850 3400 30 0000 C CNN - 1 7800 3350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 55D44B67 -P 7800 3600 -F 0 "R2" H 7850 3730 50 0000 C CNN -F 1 "1k" H 7850 3650 50 0000 C CNN -F 2 "" H 7850 3580 30 0000 C CNN -F 3 "" V 7850 3650 30 0000 C CNN - 1 7800 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/Half_Adder/_saved_half_adder.sch b/Examples/Half_Adder/_saved_half_adder.sch deleted file mode 100644 index d66359c5..00000000 --- a/Examples/Half_Adder/_saved_half_adder.sch +++ /dev/null @@ -1,154 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:half_adder-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L d_xor U2 -U 1 1 558A946A -P 5650 3050 -F 0 "U2" H 5650 3050 60 0000 C CNN -F 1 "d_xor" H 5700 3150 47 0000 C CNN -F 2 "" H 5650 3050 60 0000 C CNN -F 3 "" H 5650 3050 60 0000 C CNN - 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5600 3600 6050 3600 -Wire Wire Line - 5450 3950 5450 4350 -Wire Wire Line - 5300 4150 5650 4150 -Connection ~ 5450 4150 -Wire Wire Line - 5450 5250 5450 5650 -Wire Wire Line - 6050 3600 6050 5650 -Wire Wire Line - 3100 3600 3950 3600 -Wire Wire Line - 4250 3600 4650 3600 -Wire Wire Line - 4450 3200 4450 3600 -Connection ~ 4450 3600 -Wire Wire Line - 4350 3200 4450 3200 -Wire Wire Line - 3750 3200 3450 3200 -Wire Wire Line - 3250 3500 3250 3600 -Connection ~ 3250 3600 -Wire Wire Line - 4550 3250 4450 3250 -Connection ~ 4450 3250 -$EndSCHEMATC diff --git a/Examples/HalfwaveRectifier_SCR/scr.bak b/Examples/HalfwaveRectifier_SCR/scr.bak deleted file mode 100644 index 58b985d9..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.bak +++ /dev/null @@ -1,243 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:scr-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 aug 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 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3 6650 2250 - -1 0 0 1 -$EndComp -$Comp -L PORT U2 -U 2 1 53F4C934 -P 2900 2300 -F 0 "U2" H 2900 2250 30 0000 C CNN -F 1 "PORT" H 2900 2300 30 0000 C CNN -F 2 "" H 2900 2300 60 0001 C CNN -F 3 "" H 2900 2300 60 0001 C CNN - 2 2900 2300 - 1 0 0 -1 -$EndComp -$Comp -L PORT U2 -U 1 1 53F4C92A -P 6400 4950 -F 0 "U2" H 6400 4900 30 0000 C CNN -F 1 "PORT" H 6400 4950 30 0000 C CNN -F 2 "" H 6400 4950 60 0001 C CNN -F 3 "" H 6400 4950 60 0001 C CNN - 1 6400 4950 - -1 0 0 1 -$EndComp -$Comp -L CCCS F2 -U 1 1 53F4C735 -P 5750 4200 -F 0 "F2" H 5550 4300 50 0000 C CNN -F 1 "100" H 5550 4150 50 0000 C CNN -F 2 "" H 5750 4200 60 0001 C CNN -F 3 "" H 5750 4200 60 0001 C CNN - 1 5750 4200 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 53F4C6D9 -P 5550 3800 -F 0 "D1" H 5550 3900 40 0000 C CNN -F 1 "D" H 5550 3700 40 0000 C CNN -F 2 "" H 5550 3800 60 0001 C CNN -F 3 "" H 5550 3800 60 0001 C CNN - 1 5550 3800 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 53F4C6C2 -P 4700 5250 -F 0 "C1" H 4750 5350 50 0000 L CNN -F 1 "10u" H 4750 5150 50 0000 L CNN -F 2 "" H 4700 5250 60 0001 C CNN -F 3 "" H 4700 5250 60 0001 C CNN - 1 4700 5250 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 53F4C6BB -P 4250 5250 -F 0 "R2" V 4330 5250 50 0000 C CNN -F 1 "1" V 4250 5250 50 0000 C CNN -F 2 "" H 4250 5250 60 0001 C CNN -F 3 "" H 4250 5250 60 0001 C CNN - 1 4250 5250 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F1 -U 1 1 53F4C67F -P 3800 4350 -F 0 "F1" H 3600 4450 50 0000 C CNN -F 1 "10" H 3600 4300 50 0000 C CNN -F 2 "" H 3800 4350 60 0001 C CNN -F 3 "" H 3800 4350 60 0001 C CNN - 1 3800 4350 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 53F4C5C9 -P 3600 2900 -F 0 "R1" V 3680 2900 50 0000 C CNN -F 1 "50" V 3600 2900 50 0000 C CNN -F 2 "" H 3600 2900 60 0001 C CNN -F 3 "" H 3600 2900 60 0001 C CNN - 1 3600 2900 - 1 0 0 -1 -$EndComp -$Comp -L dc v1 -U 1 1 565DBF58 -P 3600 3700 -F 0 "v1" H 3400 3800 60 0000 C CNN -F 1 "dc" H 3400 3650 60 0000 C CNN -F 2 "R1" H 3300 3700 60 0000 C CNN -F 3 "" H 3600 3700 60 0000 C CNN - 1 3600 3700 - 1 0 0 -1 -$EndComp -$Comp -L dc v2 -U 1 1 565DC066 -P 5550 3000 -F 0 "v2" H 5350 3100 60 0000 C CNN -F 1 "dc" H 5350 2950 60 0000 C CNN -F 2 "R1" H 5250 3000 60 0000 C CNN -F 3 "" H 5550 3000 60 0000 C CNN - 1 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L aswitch U1 -U 1 1 565DC87E -P 6400 2100 -F 0 "U1" H 6850 2400 60 0000 C CNN -F 1 "aswitch" H 6850 2300 60 0000 C CNN -F 2 "" H 6850 2200 60 0000 C CNN -F 3 "" H 6850 2200 60 0000 C CNN - 1 6400 2100 - -1 0 0 1 -$EndComp -Wire Wire Line - 5950 2000 6650 2000 -$EndSCHEMATC diff --git a/Examples/HalfwaveRectifier_SCR/scr.cir.ckt b/Examples/HalfwaveRectifier_SCR/scr.cir.ckt deleted file mode 100644 index b0e218fd..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 08/21/14 11:07:22
-.include diode.lib
-
-u2 5 8 1 port
-* f2
-* Analog Switch analogswitch
-d1 4 2 diode
-v2 3 4 dc 0
-c1 5 6 10u
-r2 5 6 1
-* f1
-v1 9 7 dc 0
-r1 8 9 50
-Vf2 2 5 0
-f2 5 6 Vf2 100
-Vf1 7 5 0
-f1 5 6 Vf1 10
-a1 6 (1 3) u1
-.model u1 aswitch(cntl_on=0.25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/Examples/HalfwaveRectifier_SCR/scr.cir.out~ b/Examples/HalfwaveRectifier_SCR/scr.cir.out~ deleted file mode 100644 index d600f25d..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.cir.out~ +++ /dev/null @@ -1,29 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/scr/scr.cir - -.include PowerDiode.lib -* u2 3 7 1 port -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 (1 6) u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -.tran 0e-12 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/HalfwaveRectifier_SCR/scr.sub~ b/Examples/HalfwaveRectifier_SCR/scr.sub~ deleted file mode 100644 index 0fdddbf4..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.sub~ +++ /dev/null @@ -1,23 +0,0 @@ -* Subcircuit scr -.subckt scr 3 7 1 -* /opt/esim/src/subcircuitlibrary/scr/scr.cir -.include PowerDiode.lib -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 [1 6 ] u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -* Control Statements - -.ends scr
\ No newline at end of file diff --git a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak deleted file mode 100644 index 78b51d36..00000000 --- a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak +++ /dev/null @@ -1,215 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:Halfwave_Rectifier-rescue -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:Halfwave_Rectifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D D1 -U 1 1 5593CBB8 -P 5700 2900 -F 0 "D1" H 5700 3000 50 0000 C CNN -F 1 "D" H 5700 2800 50 0000 C CNN -F 2 "" H 5700 2900 60 0000 C CNN -F 3 "" H 5700 2900 60 0000 C CNN - 1 5700 2900 - 1 0 0 -1 -$EndComp -$Comp -L R-RESCUE-Halfwave_Rectifier R1 -U 1 1 5593CC2C -P 6300 3350 -F 0 "R1" V 6380 3350 50 0000 C CNN -F 1 "1k" V 6300 3350 50 0000 C CNN -F 2 "" V 6230 3350 30 0000 C CNN -F 3 "" H 6300 3350 30 0000 C CNN - 1 6300 3350 - 1 0 0 -1 -$EndComp -$Comp -L sine v1 -U 1 1 5593CC81 -P 3800 3450 -F 0 "v1" H 3600 3550 60 0000 C CNN -F 1 "sine" H 3600 3400 60 0000 C CNN -F 2 "R1" H 3500 3450 60 0000 C CNN -F 3 "" H 3800 3450 60 0000 C CNN - 1 3800 3450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 5593CCF2 -P 5700 4050 -F 0 "#PWR01" H 5700 3800 50 0001 C CNN -F 1 "GND" H 5700 3900 50 0000 C CNN -F 2 "" H 5700 4050 60 0000 C CNN -F 3 "" H 5700 4050 60 0000 C CNN - 1 5700 4050 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5050 2900 5050 3200 -Wire Wire Line - 5050 2900 5550 2900 -Wire Wire Line - 5850 2900 6300 2900 -Wire Wire Line - 6300 2900 6300 3200 -Wire Wire Line - 6300 3500 6300 3900 -Wire Wire Line - 6300 3900 5050 3900 -Wire Wire Line - 5050 3900 5050 3600 -Wire Wire Line - 5700 3800 5700 4050 -Connection ~ 5700 3900 -$Comp -L PWR_FLAG #FLG02 -U 1 1 5593CD49 -P 5700 3800 -F 0 "#FLG02" H 5700 3895 50 0001 C CNN -F 1 "PWR_FLAG" H 5700 3980 50 0000 C CNN -F 2 "" H 5700 3800 60 0000 C CNN -F 3 "" H 5700 3800 60 0000 C CNN - 1 5700 3800 - 1 0 0 -1 -$EndComp -Text GLabel 5000 2750 0 60 Input ~ 0 -IN -Text GLabel 6400 2800 2 60 Input ~ 0 -OUT -Wire Wire Line - 5000 2750 5250 2750 -Wire Wire Line - 5250 2750 5250 2900 -Connection ~ 5250 2900 -Wire Wire Line - 6100 2800 6400 2800 -Wire Wire Line - 6100 2800 6100 2900 -Connection ~ 6100 2900 -$Comp -L plot_v1 U2 -U 1 1 56D86A9A -P 5100 2900 -F 0 "U2" H 5100 3400 60 0000 C CNN -F 1 "plot_v1" H 5300 3250 60 0000 C CNN -F 2 "" H 5100 2900 60 0000 C CNN -F 3 "" H 5100 2900 60 0000 C CNN - 1 5100 2900 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U3 -U 1 1 56D86ADF -P 6300 2950 -F 0 "U3" H 6300 3450 60 0000 C CNN -F 1 "plot_v1" H 6500 3300 60 0000 C CNN -F 2 "" H 6300 2950 60 0000 C CNN -F 3 "" H 6300 2950 60 0000 C CNN - 1 6300 2950 - 1 0 0 -1 -$EndComp -$Comp -L TRANSFO U1 -U 1 1 56D86BA7 -P 4650 3400 -F 0 "U1" H 4650 3650 50 0000 C CNN -F 1 "TRANSFO" H 4650 3100 50 0000 C CNN -F 2 "" H 4650 3400 50 0000 C CNN -F 3 "" H 4650 3400 50 0000 C CNN - 1 4650 3400 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4250 3600 4250 4000 -Wire Wire Line - 4250 4000 3800 4000 -Wire Wire Line - 3800 4000 3800 3900 -$Comp -L GND #PWR03 -U 1 1 56D86C55 -P 4050 4050 -F 0 "#PWR03" H 4050 3800 50 0001 C CNN -F 1 "GND" H 4050 3900 50 0000 C CNN -F 2 "" H 4050 4050 60 0000 C CNN -F 3 "" H 4050 4050 60 0000 C CNN - 1 4050 4050 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4050 4050 4050 4000 -Connection ~ 4050 4000 -Wire Wire Line - 4250 3200 4250 2950 -Wire Wire Line - 4250 2950 3800 2950 -Wire Wire Line - 3800 2950 3800 3000 -Wire Wire Line - 5100 2700 5100 2750 -Connection ~ 5100 2750 -Wire Wire Line - 6300 2750 6300 2800 -Connection ~ 6300 2800 -Text GLabel 3900 2700 0 60 Input ~ 0 -Supply -Wire Wire Line - 3900 2700 4000 2700 -Wire Wire Line - 4000 2700 4000 2950 -Connection ~ 4000 2950 -$EndSCHEMATC diff --git a/Examples/High_Pass_Filter/High_Pass_Filter.bak b/Examples/High_Pass_Filter/High_Pass_Filter.bak deleted file mode 100644 index 224d0c46..00000000 --- a/Examples/High_Pass_Filter/High_Pass_Filter.bak +++ /dev/null @@ -1,122 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L R R1 -U 1 1 56B86791 -P 6300 3200 -F 0 "R1" H 6350 3330 50 0000 C CNN -F 1 "1k" H 6350 3250 50 0000 C CNN -F 2 "" H 6350 3180 30 0000 C CNN -F 3 "" V 6350 3250 30 0000 C CNN - 1 6300 3200 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 56B8686C -P 5800 3000 -F 0 "C1" H 5825 3100 50 0000 L CNN -F 1 "10u" H 5825 2900 50 0000 L CNN -F 2 "" H 5838 2850 30 0000 C CNN -F 3 "" H 5800 3000 60 0000 C CNN - 1 5800 3000 - 0 1 1 0 -$EndComp -Wire Wire Line - 5250 3000 5650 3000 -Wire Wire Line - 5950 3000 6350 3000 -Wire Wire Line - 6350 2850 6350 3100 -Wire Wire Line - 5250 3900 6350 3900 -Wire Wire Line - 6350 3900 6350 3400 -$Comp -L GND #PWR01 -U 1 1 56B8692D -P 5800 4000 -F 0 "#PWR01" H 5800 3750 50 0001 C CNN -F 1 "GND" H 5800 3850 50 0000 C CNN -F 2 "" H 5800 4000 50 0000 C CNN -F 3 "" H 5800 4000 50 0000 C CNN - 1 5800 4000 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5800 4000 5800 3900 -Connection ~ 5800 3900 -Text GLabel 5200 2800 0 60 Input ~ 0 -in -Text GLabel 6400 2850 2 60 Input ~ 0 -out -Wire Wire Line - 5350 2800 5350 3000 -Connection ~ 5350 3000 -Wire Wire Line - 6400 2850 6350 2850 -Connection ~ 6350 3000 -Wire Wire Line - 5200 2800 5350 2800 -$Comp -L AC v1 -U 1 1 56C17BEF -P 5250 3450 -F 0 "v1" H 5050 3550 60 0000 C CNN -F 1 "AC" H 5050 3400 60 0000 C CNN -F 2 "R1" H 4950 3450 60 0000 C CNN -F 3 "" H 5250 3450 60 0000 C CNN - 1 5250 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/Integrator/.Integrator.cir.out.swp b/Examples/Integrator/.Integrator.cir.out.swp Binary files differdeleted file mode 100644 index f790e276..00000000 --- a/Examples/Integrator/.Integrator.cir.out.swp +++ /dev/null diff --git a/Examples/Integrator/D.lib b/Examples/Integrator/D.lib deleted file mode 100644 index ef18bb50..00000000 --- a/Examples/Integrator/D.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL D1N750 D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ Bv=8.1 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=880.5E-18 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/Integrator/Integrator.bak b/Examples/Integrator/Integrator.bak deleted file mode 100644 index 48c26f34..00000000 --- a/Examples/Integrator/Integrator.bak +++ /dev/null @@ -1,202 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:Integrator-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L UA741 X1 -U 1 1 56A9B5FD -P 5950 3200 -F 0 "X1" H 6100 3200 60 0000 C CNN -F 1 "UA741" H 6200 3050 60 0000 C CNN -F 2 "" H 5950 3200 60 0000 C CNN -F 3 "" H 5950 3200 60 0000 C CNN - 1 5950 3200 - 1 0 0 1 -$EndComp -$Comp -L R R1 -U 1 1 56A9B635 -P 5100 3150 -F 0 "R1" H 5150 3280 50 0000 C CNN -F 1 "10k" H 5150 3200 50 0000 C CNN -F 2 "" H 5150 3130 30 0000 C CNN -F 3 "" V 5150 3200 30 0000 C CNN - 1 5100 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 56A9B674 -P 5400 3400 -F 0 "R2" H 5450 3530 50 0000 C CNN -F 1 "1k" H 5450 3450 50 0000 C CNN -F 2 "" H 5450 3380 30 0000 C CNN -F 3 "" V 5450 3450 30 0000 C CNN - 1 5400 3400 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 56A9B6AE -P 6850 3300 -F 0 "R3" H 6900 3430 50 0000 C CNN -F 1 "1k" H 6900 3350 50 0000 C CNN -F 2 "" H 6900 3280 30 0000 C CNN -F 3 "" V 6900 3350 30 0000 C CNN - 1 6850 3300 - 0 1 1 0 -$EndComp -Wire Wire Line - 5300 3100 5750 3100 -Wire Wire Line - 5750 3300 5450 3300 -Wire Wire Line - 6500 3200 6900 3200 -$Comp -L C C1 -U 1 1 56A9B72C -P 6100 2700 -F 0 "C1" H 6125 2800 50 0000 L CNN -F 1 "100n" H 6125 2600 50 0000 L CNN -F 2 "" H 6138 2550 30 0000 C CNN -F 3 "" H 6100 2700 60 0000 C CNN - 1 6100 2700 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56A9B75D -P 5450 3600 -F 0 "#PWR01" H 5450 3350 50 0001 C CNN -F 1 "GND" H 5450 3450 50 0000 C CNN -F 2 "" H 5450 3600 50 0000 C CNN -F 3 "" H 5450 3600 50 0000 C CNN - 1 5450 3600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 56A9B7DC -P 4800 4000 -F 0 "#PWR02" H 4800 3750 50 0001 C CNN -F 1 "GND" H 4800 3850 50 0000 C CNN -F 2 "" H 4800 4000 50 0000 C CNN -F 3 "" H 4800 4000 50 0000 C CNN - 1 4800 4000 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 56A9B7F9 -P 6900 3500 -F 0 "#PWR03" H 6900 3250 50 0001 C CNN -F 1 "GND" H 6900 3350 50 0000 C CNN -F 2 "" H 6900 3500 50 0000 C CNN -F 3 "" H 6900 3500 50 0000 C CNN - 1 6900 3500 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5000 3100 4800 3100 -Wire Wire Line - 5950 2700 5600 2700 -Connection ~ 5600 3100 -Wire Wire Line - 6250 2700 6650 2700 -Connection ~ 6650 3200 -Text GLabel 4800 2950 0 60 Input ~ 0 -in -Text GLabel 6850 3050 2 60 Input ~ 0 -out -Wire Wire Line - 4800 2950 4850 2950 -Wire Wire Line - 4850 2950 4850 3100 -Connection ~ 4850 3100 -Wire Wire Line - 6850 3050 6800 3050 -Wire Wire Line - 6800 3050 6800 3200 -Connection ~ 6800 3200 -Wire Wire Line - 5600 2350 5600 3100 -Wire Wire Line - 6650 2350 6650 3200 -$Comp -L R R4 -U 1 1 56B2EBCB -P 6050 2400 -F 0 "R4" H 6100 2530 50 0000 C CNN -F 1 "100k" H 6100 2450 50 0000 C CNN -F 2 "" H 6100 2380 30 0000 C CNN -F 3 "" V 6100 2450 30 0000 C CNN - 1 6050 2400 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5950 2350 5600 2350 -Connection ~ 5600 2700 -Wire Wire Line - 6250 2350 6650 2350 -Connection ~ 6650 2700 -$Comp -L pwl v1 -U 1 1 56B835AC -P 4800 3550 -F 0 "v1" H 4600 3650 60 0000 C CNN -F 1 "pwl" H 4550 3500 60 0000 C CNN -F 2 "R1" H 4500 3550 60 0000 C CNN -F 3 "" H 4800 3550 60 0000 C CNN - 1 4800 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/Integrator/PowerDiode.lib b/Examples/Integrator/PowerDiode.lib deleted file mode 100644 index a2f61dce..00000000 --- a/Examples/Integrator/PowerDiode.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL PowerDiode D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ bv=1800 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=2.2E-15 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/Integrator/scr.cir.out~ b/Examples/Integrator/scr.cir.out~ deleted file mode 100644 index d600f25d..00000000 --- a/Examples/Integrator/scr.cir.out~ +++ /dev/null @@ -1,29 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/scr/scr.cir - -.include PowerDiode.lib -* u2 3 7 1 port -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 (1 6) u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -.tran 0e-12 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/Integrator/scr.sub~ b/Examples/Integrator/scr.sub~ deleted file mode 100644 index 0fdddbf4..00000000 --- a/Examples/Integrator/scr.sub~ +++ /dev/null @@ -1,23 +0,0 @@ -* Subcircuit scr -.subckt scr 3 7 1 -* /opt/esim/src/subcircuitlibrary/scr/scr.cir -.include PowerDiode.lib -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 [1 6 ] u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -* Control Statements - -.ends scr
\ No newline at end of file diff --git a/Examples/Integrator/ua741-cache.bak b/Examples/Integrator/ua741-cache.bak deleted file mode 100644 index eaad34ad..00000000 --- a/Examples/Integrator/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 I -X ~ 2 250 0 100 L 30 30 2 1 I -X ~ 3 250 0 100 L 30 30 3 1 I -X ~ 4 250 0 100 L 30 30 4 1 I -X ~ 5 250 0 100 L 30 30 5 1 I -X ~ 6 250 0 100 L 30 30 6 1 I -X ~ 7 250 0 100 L 30 30 7 1 I -X ~ 8 250 0 100 L 30 30 8 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/Integrator/ua741.bak b/Examples/Integrator/ua741.bak deleted file mode 100644 index 6be92803..00000000 --- a/Examples/Integrator/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/Integrator/ua741.cir.ckt b/Examples/Integrator/ua741.cir.ckt deleted file mode 100644 index 3661a9a2..00000000 --- a/Examples/Integrator/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/Examples/Integrator/ua741_Previous_Values.xml b/Examples/Integrator/ua741_Previous_Values.xml deleted file mode 100644 index 9c7bb530..00000000 --- a/Examples/Integrator/ua741_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -<KicadtoNgspice><source /><model /><devicemodel /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/D.lib b/Examples/InvertingAmplifier/D.lib deleted file mode 100644 index ef18bb50..00000000 --- a/Examples/InvertingAmplifier/D.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL D1N750 D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ Bv=8.1 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=880.5E-18 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/InvertingAmplifier.bak b/Examples/InvertingAmplifier/InvertingAmplifier.bak deleted file mode 100644 index 9b426999..00000000 --- a/Examples/InvertingAmplifier/InvertingAmplifier.bak +++ /dev/null @@ -1,184 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L UA741 X1 -U 1 1 56A88D40 -P 6000 3400 -F 0 "X1" H 6150 3400 60 0000 C CNN -F 1 "UA741" H 6250 3250 60 0000 C CNN -F 2 "" H 6000 3400 60 0000 C CNN -F 3 "" H 6000 3400 60 0000 C CNN - 1 6000 3400 - 1 0 0 1 -$EndComp -$Comp -L R R1 -U 1 1 56A88DB5 -P 5250 3350 -F 0 "R1" H 5300 3480 50 0000 C CNN -F 1 "1k" H 5300 3400 50 0000 C CNN -F 2 "" H 5300 3330 30 0000 C CNN -F 3 "" V 5300 3400 30 0000 C CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 56A88DD8 -P 6100 2850 -F 0 "R2" H 6150 2980 50 0000 C CNN -F 1 "5k" H 6150 2900 50 0000 C CNN -F 2 "" H 6150 2830 30 0000 C CNN -F 3 "" V 6150 2900 30 0000 C CNN - 1 6100 2850 - 1 0 0 -1 -$EndComp -$Comp -L sine v1 -U 1 1 56A88E30 -P 4850 3750 -F 0 "v1" H 4650 3850 60 0000 C CNN -F 1 "sine" H 4650 3700 60 0000 C CNN -F 2 "R1" H 4550 3750 60 0000 C CNN -F 3 "" H 4850 3750 60 0000 C CNN - 1 4850 3750 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 56A88EC6 -P 5600 3850 -F 0 "#PWR01" H 5600 3600 50 0001 C CNN -F 1 "GND" H 5600 3700 50 0000 C CNN -F 2 "" H 5600 3850 50 0000 C CNN -F 3 "" H 5600 3850 50 0000 C CNN - 1 5600 3850 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 56A88F10 -P 4850 4200 -F 0 "#PWR02" H 4850 3950 50 0001 C CNN -F 1 "GND" H 4850 4050 50 0000 C CNN -F 2 "" H 4850 4200 50 0000 C CNN -F 3 "" H 4850 4200 50 0000 C CNN - 1 4850 4200 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4850 3300 5150 3300 -Wire Wire Line - 5450 3300 5800 3300 -Wire Wire Line - 6000 2800 5650 2800 -Wire Wire Line - 5650 2800 5650 3300 -Connection ~ 5650 3300 -Wire Wire Line - 6550 3400 6900 3400 -Wire Wire Line - 6700 3400 6700 2800 -Wire Wire Line - 6700 2800 6300 2800 -Text GLabel 4900 3150 0 60 Input ~ 0 -in -Wire Wire Line - 4900 3150 4950 3150 -Wire Wire Line - 4950 3150 4950 3300 -Connection ~ 4950 3300 -Connection ~ 6700 3400 -$Comp -L R R3 -U 1 1 56A890CA -P 7000 3450 -F 0 "R3" H 7050 3580 50 0000 C CNN -F 1 "1k" H 7050 3500 50 0000 C CNN -F 2 "" H 7050 3430 30 0000 C CNN -F 3 "" V 7050 3500 30 0000 C CNN - 1 7000 3450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 56A89129 -P 7200 3400 -F 0 "#PWR03" H 7200 3150 50 0001 C CNN -F 1 "GND" H 7200 3250 50 0000 C CNN -F 2 "" H 7200 3400 50 0000 C CNN -F 3 "" H 7200 3400 50 0000 C CNN - 1 7200 3400 - 1 0 0 -1 -$EndComp -Text GLabel 6850 3250 1 60 Input ~ 0 -out -Wire Wire Line - 6850 3250 6850 3400 -Connection ~ 6850 3400 -$Comp -L R R4 -U 1 1 56A891BE -P 5550 3650 -F 0 "R4" H 5600 3780 50 0000 C CNN -F 1 "1k" H 5600 3700 50 0000 C CNN -F 2 "" H 5600 3630 30 0000 C CNN -F 3 "" V 5600 3700 30 0000 C CNN - 1 5550 3650 - 0 1 1 0 -$EndComp -Wire Wire Line - 5800 3500 5600 3500 -Wire Wire Line - 5600 3500 5600 3550 -$EndSCHEMATC diff --git a/Examples/InvertingAmplifier/PowerDiode.lib b/Examples/InvertingAmplifier/PowerDiode.lib deleted file mode 100644 index a2f61dce..00000000 --- a/Examples/InvertingAmplifier/PowerDiode.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL PowerDiode D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ bv=1800 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=2.2E-15 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/scr.cir.out~ b/Examples/InvertingAmplifier/scr.cir.out~ deleted file mode 100644 index d600f25d..00000000 --- a/Examples/InvertingAmplifier/scr.cir.out~ +++ /dev/null @@ -1,29 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/scr/scr.cir - -.include PowerDiode.lib -* u2 3 7 1 port -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 (1 6) u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -.tran 0e-12 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/InvertingAmplifier/scr.sub~ b/Examples/InvertingAmplifier/scr.sub~ deleted file mode 100644 index 0fdddbf4..00000000 --- a/Examples/InvertingAmplifier/scr.sub~ +++ /dev/null @@ -1,23 +0,0 @@ -* Subcircuit scr -.subckt scr 3 7 1 -* /opt/esim/src/subcircuitlibrary/scr/scr.cir -.include PowerDiode.lib -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 [1 6 ] u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -* Control Statements - -.ends scr
\ No newline at end of file diff --git a/Examples/InvertingAmplifier/ua741-cache.bak b/Examples/InvertingAmplifier/ua741-cache.bak deleted file mode 100644 index eaad34ad..00000000 --- a/Examples/InvertingAmplifier/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 I -X ~ 2 250 0 100 L 30 30 2 1 I -X ~ 3 250 0 100 L 30 30 3 1 I -X ~ 4 250 0 100 L 30 30 4 1 I -X ~ 5 250 0 100 L 30 30 5 1 I -X ~ 6 250 0 100 L 30 30 6 1 I -X ~ 7 250 0 100 L 30 30 7 1 I -X ~ 8 250 0 100 L 30 30 8 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/InvertingAmplifier/ua741.bak b/Examples/InvertingAmplifier/ua741.bak deleted file mode 100644 index 6be92803..00000000 --- a/Examples/InvertingAmplifier/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 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1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/InvertingAmplifier/ua741.cir.ckt b/Examples/InvertingAmplifier/ua741.cir.ckt deleted file mode 100644 index 3661a9a2..00000000 --- a/Examples/InvertingAmplifier/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - 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\ No newline at end of file diff --git a/Examples/JK_Flipflop/JK_Flipflop-cache.lib b/Examples/JK_Flipflop/JK_Flipflop-cache.lib deleted file mode 100644 index 77ff6600..00000000 --- a/Examples/JK_Flipflop/JK_Flipflop-cache.lib +++ /dev/null @@ -1,155 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# DC -# -DEF DC v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "DC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 50 130 50 H V C CNN -F1 "R" 50 50 50 H V C CNN -F2 "" 50 -20 30 H V C CNN -F3 "" 50 50 30 V V C CNN -$FPLIST - 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1 7950 4100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7950 3900 7950 3950 -Connection ~ 7950 3950 -Text GLabel 1900 3050 1 60 Input ~ 0 -J -Text GLabel 2150 3450 1 60 Input ~ 0 -Clk -Text GLabel 2850 3850 1 60 Input ~ 0 -K -Text GLabel 8050 3200 3 60 Input ~ 0 -out -Text GLabel 8050 4050 3 60 Input ~ 0 -nout -Wire Wire Line - 8050 3200 8050 3150 -Connection ~ 8050 3150 -Wire Wire Line - 8050 4050 8050 3950 -Connection ~ 8050 3950 -Wire Wire Line - 2850 3850 2850 3900 -Connection ~ 2850 3900 -Wire Wire Line - 2150 3450 2150 3500 -Connection ~ 2150 3500 -Wire Wire Line - 1900 3050 1900 3100 -Connection ~ 1900 3100 -$Comp -L adc_bridge_3 U6 -U 1 1 56D59BD2 -P 3900 3450 -F 0 "U6" H 3900 3450 60 0000 C CNN -F 1 "adc_bridge_3" H 3900 3600 60 0000 C CNN -F 2 "" H 3900 3450 60 0000 C CNN -F 3 "" H 3900 3450 60 0000 C CNN - 1 3900 3450 - 1 0 0 -1 -$EndComp -$Comp -L dac_bridge_2 U7 -U 1 1 56D5AD2F -P 7150 3450 -F 0 "U7" H 7150 3450 60 0000 C CNN -F 1 "dac_bridge_2" H 7200 3600 60 0000 C CNN -F 2 "" H 7150 3450 60 0000 C CNN -F 3 "" H 7150 3450 60 0000 C CNN - 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1 5700 2200 - 0 1 1 0 -$EndComp -$Comp -L adc_bridge_1 U10 -U 1 1 56D5960E -P 5800 4850 -F 0 "U10" H 5800 4850 60 0000 C CNN -F 1 "adc_bridge_1" H 5800 5000 60 0000 C CNN -F 2 "" H 5800 4850 60 0000 C CNN -F 3 "" H 5800 4850 60 0000 C CNN - 1 5800 4850 - 0 -1 -1 0 -$EndComp -$Comp -L DC v4 -U 1 1 56D5977A -P 6200 1600 -F 0 "v4" H 6000 1700 60 0000 C CNN -F 1 "0" H 6000 1550 60 0000 C CNN -F 2 "R1" H 5900 1600 60 0000 C CNN -F 3 "" H 6200 1600 60 0000 C CNN - 1 6200 1600 - 0 -1 -1 0 -$EndComp -$Comp -L DC v5 -U 1 1 56D59898 -P 6200 5450 -F 0 "v5" H 6000 5550 60 0000 C CNN -F 1 "0" H 6000 5400 60 0000 C CNN -F 2 "R1" H 5900 5450 60 0000 C CNN -F 3 "" H 6200 5450 60 0000 C CNN - 1 6200 5450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR06 -U 1 1 56D59B33 -P 6650 1600 -F 0 "#PWR06" H 6650 1350 50 0001 C CNN -F 1 "GND" H 6650 1450 50 0000 C CNN -F 2 "" H 6650 1600 50 0000 C CNN -F 3 "" H 6650 1600 50 0000 C CNN - 1 6650 1600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR07 -U 1 1 56D59BCD -P 6650 5450 -F 0 "#PWR07" H 6650 5200 50 0001 C CNN -F 1 "GND" H 6650 5300 50 0000 C CNN -F 2 "" H 6650 5450 50 0000 C CNN -F 3 "" H 6650 5450 50 0000 C CNN - 1 6650 5450 - 1 0 0 -1 -$EndComp -$Comp -L pulse v2 -U 1 1 56D59D94 -P 1950 3950 -F 0 "v2" H 1750 4050 60 0000 C CNN -F 1 "pulse" H 1750 3900 60 0000 C CNN -F 2 "R1" H 1650 3950 60 0000 C CNN -F 3 "" H 1950 3950 60 0000 C CNN - 1 1950 3950 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/Low_Pass_Filter/Low_Pass_Filter.bak b/Examples/Low_Pass_Filter/Low_Pass_Filter.bak deleted file mode 100644 index 09261d43..00000000 --- a/Examples/Low_Pass_Filter/Low_Pass_Filter.bak +++ /dev/null @@ -1,122 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L R R1 -U 1 1 56B86791 -P 5750 3050 -F 0 "R1" H 5800 3180 50 0000 C CNN -F 1 "1k" H 5800 3100 50 0000 C CNN -F 2 "" H 5800 3030 30 0000 C CNN -F 3 "" V 5800 3100 30 0000 C CNN - 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1 5250 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/Parallel_Resonance/Parallel_Resonance.bak b/Examples/Parallel_Resonance/Parallel_Resonance.bak deleted file mode 100644 index 57952a83..00000000 --- a/Examples/Parallel_Resonance/Parallel_Resonance.bak +++ /dev/null @@ -1,162 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L R R1 -U 1 1 56C172A1 -P 5100 3150 -F 0 "R1" H 5150 3280 50 0000 C CNN -F 1 "1" H 5150 3200 50 0000 C CNN -F 2 "" H 5150 3130 30 0000 C CNN -F 3 "" V 5150 3200 30 0000 C CNN - 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-$EndComp
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diff --git a/src/SubcircuitLibrary/diac/diac.cir.ckt b/src/SubcircuitLibrary/diac/diac.cir.ckt deleted file mode 100644 index e89f9cfb..00000000 --- a/src/SubcircuitLibrary/diac/diac.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 09/22/14 16:36:23
-
-u3 1 2 port
-* Analog Switch analogswitch
-* Analog Switch analogswitch
-a1 1 (1 2) u2
-.model u2 aswitch(cntl_on=-25 cntl_off=-0.1 r_on=0.0125 r_off=1000000)
-a2 1 (1 2) u1
-.model u1 aswitch(cntl_on=25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/src/SubcircuitLibrary/diac/diac.cir.out~ b/src/SubcircuitLibrary/diac/diac.cir.out~ deleted file mode 100644 index 89cc8142..00000000 --- a/src/SubcircuitLibrary/diac/diac.cir.out~ +++ /dev/null @@ -1,24 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/diac/diac.cir - -* u3 1 2 port -* u1 1 1 2 aswitch -* u2 1 1 2 aswitch -a1 1 [1 2 ] u1 -a2 1 [1 2 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/diac/diac.sub~ b/src/SubcircuitLibrary/diac/diac.sub~ deleted file mode 100644 index 43c2d279..00000000 --- a/src/SubcircuitLibrary/diac/diac.sub~ +++ /dev/null @@ -1,18 +0,0 @@ -* Subcircuit diac -.subckt diac 1 2 -* /opt/esim/src/subcircuitlibrary/diac/diac.cir -* u1 1 1 2 aswitch -* u2 1 1 2 aswitch -a1 1 [1 2 ] u1 -a2 1 [1 2 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Control Statements - -.ends diac
\ No newline at end of file diff --git a/src/SubcircuitLibrary/full_adder/full_adder-cache.lib b/src/SubcircuitLibrary/full_adder/full_adder-cache.lib deleted file mode 100644 index 623a7f41..00000000 --- a/src/SubcircuitLibrary/full_adder/full_adder-cache.lib +++ /dev/null @@ -1,61 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# d_or -# -DEF d_or U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_or" 0 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 -A -25 -124 325 574 323 0 1 0 N 150 150 250 50 -A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 -P 2 0 1 0 -250 -50 150 -50 N -P 2 0 1 0 -250 150 150 150 N -X IN1 1 -450 100 215 R 50 50 1 1 I -X IN2 2 -450 0 215 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# half_adder -# -DEF half_adder X 0 40 Y Y 1 F N -F0 "X" 900 500 60 H V C CNN -F1 "half_adder" 900 400 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -S 500 800 1250 0 0 1 0 N -X IN1 1 300 700 200 R 50 50 1 1 I -X IN2 2 300 100 200 R 50 50 1 1 I -X SUM 3 1450 700 200 L 50 50 1 1 O -X COUT 4 1450 100 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/full_adder/half_adder-cache.lib b/src/SubcircuitLibrary/full_adder/half_adder-cache.lib deleted file mode 100644 index 68785220..00000000 --- a/src/SubcircuitLibrary/full_adder/half_adder-cache.lib +++ /dev/null @@ -1,63 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# d_and -# -DEF d_and U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_and" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 -A 150 49 100 6 900 0 1 0 N 250 50 150 150 -P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N -X IN1 1 -450 100 200 R 50 50 1 1 I -X IN2 2 -450 0 200 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# d_xor -# -DEF d_xor U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_xor" 50 100 47 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 -A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150 -A -25 -124 325 574 323 0 1 0 N 150 150 250 50 -A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 -P 2 0 1 0 150 -50 -200 -50 N -P 2 0 1 0 150 150 -200 150 N -X IN1 1 -450 100 215 R 50 43 1 1 I -X IN2 2 -450 0 215 R 50 43 1 1 I -X OUT 3 450 50 200 L 50 39 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/half_adder/half_adder-cache.lib b/src/SubcircuitLibrary/half_adder/half_adder-cache.lib deleted file mode 100644 index 68785220..00000000 --- a/src/SubcircuitLibrary/half_adder/half_adder-cache.lib +++ /dev/null @@ -1,63 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# d_and -# -DEF d_and U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_and" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 -A 150 49 100 6 900 0 1 0 N 250 50 150 150 -P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N -X IN1 1 -450 100 200 R 50 50 1 1 I -X IN2 2 -450 0 200 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# d_xor -# -DEF d_xor U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_xor" 50 100 47 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 -A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150 -A -25 -124 325 574 323 0 1 0 N 150 150 250 50 -A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 -P 2 0 1 0 150 -50 -200 -50 N -P 2 0 1 0 150 150 -200 150 N -X IN1 1 -450 100 215 R 50 43 1 1 I -X IN2 2 -450 0 215 R 50 43 1 1 I -X OUT 3 450 50 200 L 50 39 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/lm555n/lm555n.bak b/src/SubcircuitLibrary/lm555n/lm555n.bak deleted file mode 100644 index 92d1f7a7..00000000 --- a/src/SubcircuitLibrary/lm555n/lm555n.bak +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 10:48:46 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 1 6700 4050 - 1 0 0 -1 -$EndComp -$Comp -L D_SRLATCH U6 -U 1 1 50CEA9AE -P 7100 3400 -F 0 "U6" H 6900 3650 60 0000 C CNN -F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN - 1 7100 3400 - 1 0 0 -1 -$EndComp -Text Notes 5750 3050 0 60 ~ 0 -IC 555 -Wire Wire Line - 4700 3000 4900 3000 -Wire Wire Line - 4700 4750 4700 4650 -Connection ~ 4400 3550 -Connection ~ 4400 4900 -Wire Wire Line - 4300 4900 7700 4900 -Wire Wire Line - 4400 4200 4400 4100 -Wire Wire Line - 7700 4900 7700 4800 -Wire Wire Line - 7700 3250 7850 3250 -Wire Wire Line - 7400 4600 7100 4600 -Wire Wire Line - 7100 4600 7100 4250 -Wire Wire Line - 7700 3650 7700 3550 -Wire Wire Line - 6350 4050 6450 4050 -Wire Wire Line - 6950 3900 6950 4000 -Wire Wire Line - 7150 4000 7150 4050 -Wire Wire Line - 7150 4050 6950 4050 -Wire Wire Line - 6500 3550 6200 3550 -Wire Wire Line - 6350 3250 6500 3250 -Wire Wire Line - 5400 3250 5100 3250 -Wire Wire Line - 5100 3250 5100 3750 -Wire Wire Line - 5550 4500 5550 4350 -Wire Wire Line - 5700 3550 5800 3550 -Wire Wire Line - 5900 3250 6000 3250 -Wire Wire Line - 6000 3850 6350 3850 -Wire Wire Line - 5800 4150 6200 4150 -Wire Wire Line - 5200 3550 5200 3700 -Wire Wire Line - 5200 3700 5550 3700 -Wire Wire Line - 5550 3700 5550 3750 -Connection ~ 5550 4450 -Wire Wire Line - 5750 4400 5750 4450 -Wire Wire Line - 5100 4350 5100 4450 -Wire Wire Line - 5100 4450 5750 4450 -Wire Wire Line - 6500 3400 6450 3400 -Wire Wire Line - 6450 3400 6450 4050 -Wire Wire Line - 6950 4000 7250 4000 -Wire Wire Line - 7250 4000 7250 3900 -Connection ~ 7150 4000 -Wire Wire Line - 7600 4250 7700 4250 -Wire Wire Line - 7700 4400 7700 4350 -Wire Wire Line - 7700 4350 7800 4350 -Wire Wire Line - 7850 3850 7900 3850 -Wire Wire Line - 4400 4900 4400 4700 -Wire Wire Line - 4400 3600 4400 3500 -Wire Wire Line - 4300 3000 4400 3000 -Wire Wire Line - 4400 4150 4700 4150 -Connection ~ 4400 4150 -Wire Wire Line - 4300 3550 4700 3550 -Wire Wire Line - 4700 3550 4700 3500 -Wire Wire Line - 6350 4750 6350 4650 -Text Label 4850 4100 0 60 ~ 0 -d -$Comp -L VCVS E2 -U 1 1 50AA12FF -P 5050 4050 -F 0 "E2" H 4850 4150 50 0000 C CNN -F 1 "10000" H 4850 4000 50 0000 C CNN - 1 5050 4050 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 2 1 50B4E21B -P 6000 3550 -F 0 "U4" H 6000 3650 30 0000 C CNN -F 1 "LIMIT8" H 6000 3550 30 0000 C CNN - 2 6000 3550 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 1 1 50B4E215 -P 5800 3850 -F 0 "U4" H 5800 3950 30 0000 C CNN -F 1 "LIMIT8" H 5800 3850 30 0000 C CNN - 1 5800 3850 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 2 1 50AAFCE7 -P 7700 3950 -F 0 "U3" H 7600 4050 40 0000 C CNN -F 1 "DAC8" H 7700 3950 40 0000 C CNN - 2 7700 3950 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 1 1 50AAFC9A -P 7850 3550 -F 0 "U3" H 7750 3650 40 0000 C CNN -F 1 "DAC8" H 7850 3550 40 0000 C CNN - 1 7850 3550 - 0 1 1 0 -$EndComp -$Comp -L ADC8 U2 -U 3 1 50AAFB76 -P 6350 4350 -F 0 "U2" H 6250 4450 40 0000 C CNN -F 1 "ADC8" H 6350 4350 40 0000 C CNN - 3 6350 4350 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 2 1 50AAFB64 -P 6350 3550 -F 0 "U2" H 6250 3650 40 0000 C CNN -F 1 "ADC8" H 6350 3550 40 0000 C CNN - 2 6350 3550 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 1 1 50AAFB55 -P 6200 3850 -F 0 "U2" H 6100 3950 40 0000 C CNN -F 1 "ADC8" H 6200 3850 40 0000 C CNN - 1 6200 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50AA39A3 -P 5750 4400 -F 0 "#FLG01" H 5750 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN - 1 5750 4400 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 50AA2210 -P 4050 3550 -F 0 "U1" H 4050 3500 30 0000 C CNN -F 1 "PORT" H 4050 3550 30 0000 C CNN - 5 4050 3550 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 50AA21C7 -P 4050 4900 -F 0 "U1" H 4050 4850 30 0000 C CNN -F 1 "PORT" H 4050 4900 30 0000 C CNN - 1 4050 4900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 50AA21BC -P 4700 5000 -F 0 "U1" H 4700 4950 30 0000 C CNN -F 1 "PORT" H 4700 5000 30 0000 C CNN - 2 4700 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 4 1 50AA21A9 -P 6350 5000 -F 0 "U1" H 6350 4950 30 0000 C CNN -F 1 "PORT" H 6350 5000 30 0000 C CNN - 4 6350 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 7 1 50AA21A0 -P 8050 4350 -F 0 "U1" H 8050 4300 30 0000 C CNN -F 1 "PORT" H 8050 4350 30 0000 C CNN - 7 8050 4350 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 3 1 50AA2181 -P 8150 3850 -F 0 "U1" H 8150 3800 30 0000 C CNN -F 1 "PORT" H 8150 3850 30 0000 C CNN - 3 8150 3850 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 6 1 50AA2171 -P 5150 3000 -F 0 "U1" H 5150 2950 30 0000 C CNN -F 1 "PORT" H 5150 3000 30 0000 C CNN - 6 5150 3000 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 8 1 50AA2162 -P 4050 3000 -F 0 "U1" H 4050 2950 30 0000 C CNN -F 1 "PORT" H 4050 3000 30 0000 C CNN - 8 4050 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 50AA20DA -P 7350 4250 -F 0 "R8" V 7430 4250 50 0000 C CNN -F 1 "1500" V 7350 4250 50 0000 C CNN - 1 7350 4250 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 50AA2050 -P 7600 4600 -F 0 "Q1" H 7600 4450 50 0000 R CNN -F 1 "QNOM" H 7600 4750 50 0000 R CNN - 1 7600 4600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50AA140C -P 5550 4500 -F 0 "#PWR02" H 5550 4500 30 0001 C CNN -F 1 "GND" H 5550 4430 30 0001 C CNN - 1 5550 4500 - 1 0 0 -1 -$EndComp -Text Label 4850 4000 0 60 ~ 0 -c -Text Label 4700 4650 0 60 ~ 0 -d -Text Label 4700 4150 0 60 ~ 0 -c -$Comp -L R R7 -U 1 1 50AA12F7 -P 5650 3250 -F 0 "R7" V 5730 3250 50 0000 C CNN -F 1 "25" V 5650 3250 50 0000 C CNN - 1 5650 3250 - 0 -1 -1 0 -$EndComp -$Comp -L R R6 -U 1 1 50AA12B0 -P 5450 3550 -F 0 "R6" V 5530 3550 50 0000 C CNN -F 1 "25" V 5450 3550 50 0000 C CNN - 1 5450 3550 - 0 -1 -1 0 -$EndComp -Text Label 5300 4000 0 60 ~ 0 -b -Text Label 5300 4100 0 60 ~ 0 -a -Text Label 4700 3000 0 60 ~ 0 -b -Text Label 4700 3500 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50AA11B6 -P 5500 4050 -F 0 "E1" H 5300 4150 50 0000 C CNN -F 1 "10000" H 5300 4000 50 0000 C CNN - 1 5500 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50A9E00B -P 4700 3250 -F 0 "R4" V 4780 3250 50 0000 C CNN -F 1 "2E6" V 4700 3250 50 0000 C CNN - 1 4700 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50A9E001 -P 4700 4400 -F 0 "R5" V 4780 4400 50 0000 C CNN -F 1 "2E6" V 4700 4400 50 0000 C CNN - 1 4700 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A9DF09 -P 4400 4450 -F 0 "R3" V 4480 4450 50 0000 C CNN -F 1 "5000" V 4400 4450 50 0000 C CNN - 1 4400 4450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A9DF03 -P 4400 3850 -F 0 "R2" V 4480 3850 50 0000 C CNN -F 1 "5000" V 4400 3850 50 0000 C CNN - 1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/lm555n/lm555n.cir.ckt b/src/SubcircuitLibrary/lm555n/lm555n.cir.ckt deleted file mode 100644 index 90f04a32..00000000 --- a/src/SubcircuitLibrary/lm555n/lm555n.cir.ckt +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/src/SubcircuitLibrary/lm555n/lm555n.cir.out~ b/src/SubcircuitLibrary/lm555n/lm555n.cir.out~ deleted file mode 100644 index bc50c640..00000000 --- a/src/SubcircuitLibrary/lm555n/lm555n.cir.out~ +++ /dev/null @@ -1,30 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* u5 5 21 d_inverter -* u6 1 4 5 21 21 8 10 d_srlatch -e2 18 0 23 14 10000 -r8 9 2 1500 -q1 22 2 3 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -a2 1 4 5 21 21 8 10 u6 -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_srlatch, NgSpice Name: d_srlatch -.model u6 d_srlatch(ic=0 sr_load=1.0e-12 set_delay=1.0e-9 set_load=1.0e-12 sr_delay=1.0e-9 reset_load=1.0e-12 enable_delay=1.0e-9 reset_delay=1.0e-9 rise_delay=1.0e-9 fall_delay=1.0e-9 enable_load=1.0e-12 ) -.ac lin 0 0Hz 0Hz - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/lm555n/lm555n.cir~ b/src/SubcircuitLibrary/lm555n/lm555n.cir~ deleted file mode 100644 index 7ef9e6a5..00000000 --- a/src/SubcircuitLibrary/lm555n/lm555n.cir~ +++ /dev/null @@ -1,25 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:49 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 5 21 D_INVERTER -U6 1 4 5 21 21 8 10 D_SRLATCH -E2 18 0 23 14 10000 -*U4 19 20 11 12 LIMIT8 -*U3 8 10 7 9 DAC8 -*U2 11 12 6 4 1 5 ADC8 -*U1 22 14 7 6 15 16 3 13 PORT -R8 9 2 1500 -Q1 22 2 3 QNOM -R7 18 20 25 -R6 17 19 25 -E1 17 0 16 15 10000 -R4 16 15 2E6 -R5 23 14 2E6 -R3 23 22 5000 -R2 15 23 5000 -R1 13 15 5000 - -.end diff --git a/src/SubcircuitLibrary/scr/scr.bak b/src/SubcircuitLibrary/scr/scr.bak deleted file mode 100644 index 58b985d9..00000000 --- a/src/SubcircuitLibrary/scr/scr.bak +++ /dev/null @@ -1,243 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:scr-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 aug 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 3600 3250 3600 3150 -Connection ~ 5550 4950 -Wire Wire Line - 5800 3900 5800 3850 -Wire Wire Line - 5800 3850 6150 3850 -Wire Wire Line - 6150 3850 6150 4950 -Wire Wire Line - 6150 4950 3600 4950 -Connection ~ 4300 4950 -Wire Wire Line - 4300 4950 4300 4050 -Wire Wire Line - 4300 4050 3850 4050 -Wire Wire Line - 4700 5950 4700 5450 -Wire Wire Line - 4250 5950 4250 5500 -Connection ~ 4250 4950 -Wire Wire Line - 4250 5000 4250 4950 -Wire Wire Line - 5550 3600 5550 3450 -Wire Wire Line - 5550 4950 5550 4250 -Wire Wire Line - 3600 4950 3600 4400 -Wire Wire Line - 3600 2650 3600 2300 -Wire Wire Line - 3600 2300 3150 2300 -Wire Wire Line - 3600 4150 3600 4300 -Wire Wire Line - 5550 4150 5550 4000 -Wire Wire Line - 5550 2550 5550 2250 -Wire Wire Line - 4700 5050 4700 4950 -Connection ~ 4700 4950 -Wire Wire Line - 6650 2000 6650 5950 -Connection ~ 4700 5950 -Wire Wire Line - 3850 4650 3850 5950 -Wire Wire Line - 3850 5950 6650 5950 -Connection ~ 4250 5950 -Wire Wire Line - 5800 4500 5800 5950 -Connection ~ 5800 5950 -$Comp -L PORT U2 -U 3 1 53F4C93D -P 6650 2250 -F 0 "U2" H 6650 2200 30 0000 C CNN -F 1 "PORT" H 6650 2250 30 0000 C CNN -F 2 "" H 6650 2250 60 0001 C CNN -F 3 "" H 6650 2250 60 0001 C CNN - 3 6650 2250 - -1 0 0 1 -$EndComp -$Comp -L PORT U2 -U 2 1 53F4C934 -P 2900 2300 -F 0 "U2" H 2900 2250 30 0000 C CNN -F 1 "PORT" H 2900 2300 30 0000 C CNN -F 2 "" H 2900 2300 60 0001 C CNN -F 3 "" H 2900 2300 60 0001 C CNN - 2 2900 2300 - 1 0 0 -1 -$EndComp -$Comp -L PORT U2 -U 1 1 53F4C92A -P 6400 4950 -F 0 "U2" H 6400 4900 30 0000 C CNN -F 1 "PORT" H 6400 4950 30 0000 C CNN -F 2 "" H 6400 4950 60 0001 C CNN -F 3 "" H 6400 4950 60 0001 C CNN - 1 6400 4950 - -1 0 0 1 -$EndComp -$Comp -L CCCS F2 -U 1 1 53F4C735 -P 5750 4200 -F 0 "F2" H 5550 4300 50 0000 C CNN -F 1 "100" H 5550 4150 50 0000 C CNN -F 2 "" H 5750 4200 60 0001 C CNN -F 3 "" H 5750 4200 60 0001 C CNN - 1 5750 4200 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 53F4C6D9 -P 5550 3800 -F 0 "D1" H 5550 3900 40 0000 C CNN -F 1 "D" H 5550 3700 40 0000 C CNN -F 2 "" H 5550 3800 60 0001 C CNN -F 3 "" H 5550 3800 60 0001 C CNN - 1 5550 3800 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 53F4C6C2 -P 4700 5250 -F 0 "C1" H 4750 5350 50 0000 L CNN -F 1 "10u" H 4750 5150 50 0000 L CNN -F 2 "" H 4700 5250 60 0001 C CNN -F 3 "" H 4700 5250 60 0001 C CNN - 1 4700 5250 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 53F4C6BB -P 4250 5250 -F 0 "R2" V 4330 5250 50 0000 C CNN -F 1 "1" V 4250 5250 50 0000 C CNN -F 2 "" H 4250 5250 60 0001 C CNN -F 3 "" H 4250 5250 60 0001 C CNN - 1 4250 5250 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F1 -U 1 1 53F4C67F -P 3800 4350 -F 0 "F1" H 3600 4450 50 0000 C CNN -F 1 "10" H 3600 4300 50 0000 C CNN -F 2 "" H 3800 4350 60 0001 C CNN -F 3 "" H 3800 4350 60 0001 C CNN - 1 3800 4350 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 53F4C5C9 -P 3600 2900 -F 0 "R1" V 3680 2900 50 0000 C CNN -F 1 "50" V 3600 2900 50 0000 C CNN -F 2 "" H 3600 2900 60 0001 C CNN -F 3 "" H 3600 2900 60 0001 C CNN - 1 3600 2900 - 1 0 0 -1 -$EndComp -$Comp -L dc v1 -U 1 1 565DBF58 -P 3600 3700 -F 0 "v1" H 3400 3800 60 0000 C CNN -F 1 "dc" H 3400 3650 60 0000 C CNN -F 2 "R1" H 3300 3700 60 0000 C CNN -F 3 "" H 3600 3700 60 0000 C CNN - 1 3600 3700 - 1 0 0 -1 -$EndComp -$Comp -L dc v2 -U 1 1 565DC066 -P 5550 3000 -F 0 "v2" H 5350 3100 60 0000 C CNN -F 1 "dc" H 5350 2950 60 0000 C CNN -F 2 "R1" H 5250 3000 60 0000 C CNN -F 3 "" H 5550 3000 60 0000 C CNN - 1 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L aswitch U1 -U 1 1 565DC87E -P 6400 2100 -F 0 "U1" H 6850 2400 60 0000 C CNN -F 1 "aswitch" H 6850 2300 60 0000 C CNN -F 2 "" H 6850 2200 60 0000 C CNN -F 3 "" H 6850 2200 60 0000 C CNN - 1 6400 2100 - -1 0 0 1 -$EndComp -Wire Wire Line - 5950 2000 6650 2000 -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/scr/scr.cir.ckt b/src/SubcircuitLibrary/scr/scr.cir.ckt deleted file mode 100644 index b0e218fd..00000000 --- a/src/SubcircuitLibrary/scr/scr.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 08/21/14 11:07:22
-.include diode.lib
-
-u2 5 8 1 port
-* f2
-* Analog Switch analogswitch
-d1 4 2 diode
-v2 3 4 dc 0
-c1 5 6 10u
-r2 5 6 1
-* f1
-v1 9 7 dc 0
-r1 8 9 50
-Vf2 2 5 0
-f2 5 6 Vf2 100
-Vf1 7 5 0
-f1 5 6 Vf1 10
-a1 6 (1 3) u1
-.model u1 aswitch(cntl_on=0.25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/src/SubcircuitLibrary/scr/scr.cir.out~ b/src/SubcircuitLibrary/scr/scr.cir.out~ deleted file mode 100644 index d600f25d..00000000 --- a/src/SubcircuitLibrary/scr/scr.cir.out~ +++ /dev/null @@ -1,29 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/scr/scr.cir - -.include PowerDiode.lib -* u2 3 7 1 port -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 (1 6) u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -.tran 0e-12 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/scr/scr.sub~ b/src/SubcircuitLibrary/scr/scr.sub~ deleted file mode 100644 index 0fdddbf4..00000000 --- a/src/SubcircuitLibrary/scr/scr.sub~ +++ /dev/null @@ -1,23 +0,0 @@ -* Subcircuit scr -.subckt scr 3 7 1 -* /opt/esim/src/subcircuitlibrary/scr/scr.cir -.include PowerDiode.lib -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 [1 6 ] u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -* Control Statements - -.ends scr
\ No newline at end of file diff --git a/src/SubcircuitLibrary/triac/.triac.s.swp b/src/SubcircuitLibrary/triac/.triac.s.swp Binary files differdeleted file mode 100644 index 1a4c2d0e..00000000 --- a/src/SubcircuitLibrary/triac/.triac.s.swp +++ /dev/null diff --git a/src/SubcircuitLibrary/triac/.triac.sub.swp b/src/SubcircuitLibrary/triac/.triac.sub.swp Binary files differdeleted file mode 100644 index 521ce758..00000000 --- a/src/SubcircuitLibrary/triac/.triac.sub.swp +++ /dev/null diff --git a/src/SubcircuitLibrary/triac/triac.bak b/src/SubcircuitLibrary/triac/triac.bak deleted file mode 100644 index f30533a0..00000000 --- a/src/SubcircuitLibrary/triac/triac.bak +++ /dev/null @@ -1,308 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:triac-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 sep 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U3 -U 3 1 541D1606 -P 1250 1750 -F 0 "U3" H 1250 1700 30 0000 C CNN -F 1 "PORT" H 1250 1750 30 0000 C CNN -F 2 "" H 1250 1750 60 0001 C CNN -F 3 "" H 1250 1750 60 0001 C CNN - 3 1250 1750 - 1 0 0 -1 -$EndComp -$Comp -L PORT U3 -U 2 1 541D1601 -P 1300 900 -F 0 "U3" H 1300 850 30 0000 C CNN -F 1 "PORT" H 1300 900 30 0000 C CNN -F 2 "" H 1300 900 60 0001 C CNN -F 3 "" H 1300 900 60 0001 C CNN - 2 1300 900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U3 -U 1 1 541D15F6 -P 1150 4050 -F 0 "U3" H 1150 4000 30 0000 C CNN -F 1 "PORT" H 1150 4050 30 0000 C CNN -F 2 "" H 1150 4050 60 0001 C CNN -F 3 "" H 1150 4050 60 0001 C CNN - 1 1150 4050 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F3 -U 1 1 541D1417 -P 6250 3100 -F 0 "F3" H 6050 3200 50 0000 C CNN -F 1 "10" H 6050 3050 50 0000 C CNN -F 2 "" H 6250 3100 60 0001 C CNN -F 3 "" H 6250 3100 60 0001 C CNN - 1 6250 3100 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 541D13FB -P 6050 1950 -F 0 "v3" H 5850 2050 60 0000 C CNN -F 1 "DC" H 5850 1900 60 0000 C CNN -F 2 "R1" H 5750 1950 60 0000 C CNN -F 3 "" H 6050 1950 60 0001 C CNN - 1 6050 1950 - -1 0 0 1 -$EndComp -$Comp -L CCCS F2 -U 1 1 541D13A3 -P 3900 2550 -F 0 "F2" H 3700 2650 50 0000 C CNN -F 1 "10" H 3700 2500 50 0000 C CNN -F 2 "" H 3900 2550 60 0001 C CNN -F 3 "" H 3900 2550 60 0001 C CNN - 1 3900 2550 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 541D1398 -P 3700 1850 -F 0 "v2" H 3500 1950 60 0000 C CNN -F 1 "DC" H 3500 1800 60 0000 C CNN -F 2 "R1" H 3400 1850 60 0000 C CNN -F 3 "" H 3700 1850 60 0001 C CNN - 1 3700 1850 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 541D137C -P 3300 4350 -F 0 "C1" H 3350 4450 50 0000 L CNN -F 1 "10u" H 3350 4250 50 0000 L CNN -F 2 "" H 3300 4350 60 0001 C CNN -F 3 "" H 3300 4350 60 0001 C CNN - 1 3300 4350 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F1 -U 1 1 541D1363 -P 2100 3600 -F 0 "F1" H 1900 3700 50 0000 C CNN -F 1 "100" H 1900 3550 50 0000 C CNN -F 2 "" H 2100 3600 60 0001 C CNN -F 3 "" H 2100 3600 60 0001 C CNN - 1 2100 3600 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 541D1357 -P 1900 2900 -F 0 "v1" H 1700 3000 60 0000 C CNN -F 1 "DC" H 1700 2850 60 0000 C CNN -F 2 "R1" H 1600 2900 60 0000 C CNN -F 3 "" H 1900 2900 60 0001 C CNN - 1 1900 2900 - 1 0 0 -1 -$EndComp -$Comp -L aswitch U1 -U 1 1 56669B8A -P 4600 1100 -F 0 "U1" H 5050 1400 60 0000 C CNN -F 1 "aswitch" H 5050 1300 60 0000 C CNN -F 2 "" H 5050 1200 60 0000 C CNN -F 3 "" H 5050 1200 60 0000 C CNN - 1 4600 1100 - -1 0 0 1 -$EndComp -$Comp -L aswitch U2 -U 1 1 56669DB5 -P 6400 1350 -F 0 "U2" H 6850 1650 60 0000 C CNN -F 1 "aswitch" H 6850 1550 60 0000 C CNN -F 2 "" H 6850 1450 60 0000 C CNN -F 3 "" H 6850 1450 60 0000 C CNN - 1 6400 1350 - 1 0 0 -1 -$EndComp -Connection ~ 4600 900 -Wire Wire Line - 4600 1250 4600 900 -Wire Wire Line - 1900 1750 1500 1750 -Connection ~ 6300 4900 -Wire Wire Line - 6300 3400 6300 4900 -Connection ~ 3950 4900 -Wire Wire Line - 3950 2850 3950 4900 -Connection ~ 2700 4050 -Wire Wire Line - 2700 3300 2700 4050 -Wire Wire Line - 2150 3300 2700 3300 -Connection ~ 3300 4900 -Wire Wire Line - 7450 4900 7450 700 -Connection ~ 3700 4050 -Wire Wire Line - 6050 4050 6050 3150 -Wire Wire Line - 6050 2400 6050 2500 -Wire Wire Line - 3700 1250 3750 1250 -Wire Wire Line - 3700 1400 3700 1250 -Wire Wire Line - 3700 2850 3700 2600 -Connection ~ 2750 4050 -Wire Wire Line - 2750 4050 2750 4150 -Wire Wire Line - 1900 3350 1900 3550 -Wire Wire Line - 1900 2450 1900 1750 -Wire Wire Line - 1900 4050 1900 3650 -Wire Wire Line - 3300 4050 3300 4200 -Wire Wire Line - 3700 3150 3700 4050 -Connection ~ 3300 4050 -Wire Wire Line - 3700 2500 3700 2300 -Wire Wire Line - 6050 1200 6050 1500 -Wire Wire Line - 6400 1200 6050 1200 -Wire Wire Line - 6050 2800 6050 3050 -Wire Wire Line - 2750 4450 2750 4900 -Wire Wire Line - 3300 4500 3300 4900 -Connection ~ 7450 1400 -Wire Wire Line - 2150 4900 2150 3900 -Wire Wire Line - 2150 4900 7450 4900 -Connection ~ 2750 4900 -Wire Wire Line - 4450 2250 3950 2250 -Wire Wire Line - 4450 4050 4450 2250 -Connection ~ 4450 4050 -Wire Wire Line - 6650 2800 6300 2800 -Wire Wire Line - 6650 4050 6650 2800 -Connection ~ 6050 4050 -Wire Wire Line - 1550 900 7250 900 -Wire Wire Line - 1400 4050 6650 4050 -Connection ~ 1900 4050 -Wire Wire Line - 7450 700 4150 700 -Wire Wire Line - 4150 700 4150 1000 -Wire Wire Line - 6850 1450 7350 1450 -Wire Wire Line - 7350 1450 7350 1400 -Wire Wire Line - 7350 1400 7450 1400 -Wire Wire Line - 7250 900 7250 1200 -$Comp -L R R1 -U 1 1 5666A886 -P 2700 4250 -F 0 "R1" H 2750 4380 50 0000 C CNN -F 1 "1" H 2750 4300 50 0000 C CNN -F 2 "" H 2750 4230 30 0000 C CNN -F 3 "" V 2750 4300 30 0000 C CNN - 1 2700 4250 - 0 1 1 0 -$EndComp -$Comp -L D D1 -U 1 1 5666A9A7 -P 3700 3000 -F 0 "D1" H 3700 3100 50 0000 C CNN -F 1 "D" H 3700 2900 50 0000 C CNN -F 2 "" H 3700 3000 60 0000 C CNN -F 3 "" H 3700 3000 60 0000 C CNN - 1 3700 3000 - 0 1 1 0 -$EndComp -$Comp -L D D2 -U 1 1 5666A9E4 -P 6050 2650 -F 0 "D2" H 6050 2750 50 0000 C CNN -F 1 "D" H 6050 2550 50 0000 C CNN -F 2 "" H 6050 2650 60 0000 C CNN -F 3 "" H 6050 2650 60 0000 C CNN - 1 6050 2650 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/triac/triac.cir.ckt b/src/SubcircuitLibrary/triac/triac.cir.ckt deleted file mode 100644 index 821b417b..00000000 --- a/src/SubcircuitLibrary/triac/triac.cir.ckt +++ /dev/null @@ -1,26 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 09/20/14 11:23:24
-.include diode.lib
-
-u3 7 4 5 port
-* f3
-d2 3 2 diode
-v3 2 1 dc 0
-* Analog Switch analogswitch
-d1 11 7 diode
-* f2
-v2 8 10 dc 0
-* Analog Switch analogswitch
-c1 7 9 10u
-r1 7 9 1
-* f1
-v1 5 6 dc 0
-Vf3 3 7 0
-f3 7 9 Vf3 10
-Vf2 10 11 0
-f2 7 9 Vf2 10
-Vf1 6 7 0
-f1 7 9 Vf1 100
-a1 9 (1 4) u2
-.model u2 aswitch(cntl_on=-1 cntl_off=-0.1 r_on=0.0125 r_off=1000000)
-a2 9 (4 8) u1
-.model u1 aswitch(cntl_on=1 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/src/SubcircuitLibrary/triac/triac.cir.out~ b/src/SubcircuitLibrary/triac/triac.cir.out~ deleted file mode 100644 index 7bd15a7b..00000000 --- a/src/SubcircuitLibrary/triac/triac.cir.out~ +++ /dev/null @@ -1,41 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/triac/triac.cir - -.include PowerDiode.lib -* u3 8 11 10 port -* f3 -v3 7 2 dc 0 -* f2 -v2 6 3 dc 0 -c1 8 9 10u -* f1 -v1 10 4 dc 0 -* u1 9 11 6 aswitch -* u2 9 2 11 aswitch -r1 8 9 1 -d1 5 8 PowerDiode -d2 1 7 PowerDiode -Vf3 1 8 0 -f3 8 9 Vf3 10 -Vf2 3 5 0 -f2 8 9 Vf2 10 -Vf1 4 8 0 -f1 8 9 Vf1 100 -a1 9 [11 6 ] u1 -a2 9 [2 11 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/triac/triac.sub~ b/src/SubcircuitLibrary/triac/triac.sub~ deleted file mode 100644 index ebbed05e..00000000 --- a/src/SubcircuitLibrary/triac/triac.sub~ +++ /dev/null @@ -1,35 +0,0 @@ -* Subcircuit triac -.subckt triac 8 11 10 -* /opt/esim/src/subcircuitlibrary/triac/triac.cir -.include PowerDiode.lib -* f3 -v3 7 2 dc 0 -* f2 -v2 6 3 dc 0 -c1 8 9 10u -* f1 -v1 10 4 dc 0 -* u1 9 11 6 aswitch -* u2 9 2 11 aswitch -r1 8 9 1 -d1 5 8 PowerDiode -d2 1 7 PowerDiode -Vf3 1 8 0 -f3 8 9 Vf3 10 -Vf2 3 5 0 -f2 8 9 Vf2 10 -Vf1 4 8 0 -f1 8 9 Vf1 100 -a1 9 [11 6 ] u1 -a2 9 [2 11 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Control Statements - -.ends triac
\ No newline at end of file diff --git a/src/SubcircuitLibrary/ua741/ua741-cache.bak b/src/SubcircuitLibrary/ua741/ua741-cache.bak deleted file mode 100644 index eaad34ad..00000000 --- a/src/SubcircuitLibrary/ua741/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 I -X ~ 2 250 0 100 L 30 30 2 1 I -X ~ 3 250 0 100 L 30 30 3 1 I -X ~ 4 250 0 100 L 30 30 4 1 I -X ~ 5 250 0 100 L 30 30 5 1 I -X ~ 6 250 0 100 L 30 30 6 1 I -X ~ 7 250 0 100 L 30 30 7 1 I -X ~ 8 250 0 100 L 30 30 8 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/ua741/ua741.bak b/src/SubcircuitLibrary/ua741/ua741.bak deleted file mode 100644 index 6be92803..00000000 --- a/src/SubcircuitLibrary/ua741/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/ua741/ua741.cir.ckt b/src/SubcircuitLibrary/ua741/ua741.cir.ckt deleted file mode 100644 index 3661a9a2..00000000 --- a/src/SubcircuitLibrary/ua741/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 |