Updated manual for release of v2.2

6 files changed, 39 insertions, 25 deletions

diff --git a/Appendix.tex b/Appendix.tex
index bd7b7981..7f8b9800 100644
--- a/Appendix.tex
+++ b/Appendix.tex
@@ -114,7 +114,7 @@ Review global labels in hierarchy to find possible duplicates, watch for similar
 \begin{compactenum}
 \item VHDL filename should be in small letters without any space or special characters (Underscore is allowed).
 \item Entity name, architecture declaration and the VHDL file name should match exactly.
-\item Declaration of each port should be done on a new line. See \textbf{nghdl/Example/} for further reference.
+% \item Declaration of each port should be done on a new line. See \textbf{nghdl/Example/} for further reference.
 \item Port declaration can be either \textbf{std\_logic} or \textbf{std\_logic\_vector}. No other declarations are allowed.
 \item All \textbf{in} ports should be declared before \textbf{out} ports.
 \item Maximum number of output ports that a VHDL entity under simulation can have is 64, provided the port names are not too lengthy to overflow the buffer.
@@ -122,7 +122,7 @@ Review global labels in hierarchy to find possible duplicates, watch for similar
 (See \textbf{nghdl/Example/counter/counter.vhdl} for further reference)
 \item If structural style is used, then the main entity of your VHDL code which is to be simulated,  should be declared first in the file with inclusion of libraries for subsequent declaration of each supporting entity.
 See \textbf{nghdl/Example/full\_adder/ \\ full\_adder\_structural.vhdl} for further reference.
-\item Do not use \texttt{sudo} or root permissions while working Mixed-Mode Simulation and eSim.
+\item Do not use \texttt{sudo} or root permissions while working with Mixed Signal Simulation and eSim.
 \item If there are more than one VHDL file to be uploaded, then do it \textbf{one-by-one}, as described below:
     \begin{compactenum}
     \item Click on \texttt{NGHDL} button on eSim or type \texttt{nghdl}/ in terminal. A new window will be opened.
@@ -153,7 +153,7 @@ Hence, \texttt{browsing} one file and \texttt{adding} several files won’t crea
 
 \section {Appendix F: Common Errors in NGHDL}
 
-Before concluding anything about NGHDL’s working or about eSim’s Mixed-Mode Simulation, do check the console for outputs and logs. Kindly see the following errors on User’s end that can be rectified there itself :
+Before concluding anything about NGHDL’s working or about eSim’s Mixed Signal Simulation, do check the console for outputs and logs. Kindly see the following errors on User’s end that can be rectified there itself:
 
 \subsection{NGHDL Upload Errors}
 
diff --git a/chap_2.tex b/chap_2.tex
index 2526f236..2016e006 100644
--- a/chap_2.tex
+++ b/chap_2.tex
@@ -8,11 +8,9 @@ to design, test and analyse their circuits. But the important feature
 of this tool is that it is open source and hence the user can modify
 the source as per his/her need. The software provides a generic,
 modular and extensible platform for experiment with electronic
-circuits. This software runs on Ubuntu Linux LTS distributions 18.04 and 20.04 %some flavours of Windows.
-It uses {\tt Python 3}, {\tt KiCad 4.0.7},
-{\tt GHDL}, {\tt Verilator}
-and 
-{\tt Ngspice}.
+circuits. This software runs on Ubuntu Linux LTS distributions 18.04 and 20.04, and  Microsoft Windows 7, 8 and 10.
+It uses {\tt Python 3}, {\tt KiCad 4.0.7}, {\tt Makerchip},
+{\tt GHDL}, {\tt Verilator} and {\tt Ngspice}.
 
 The objective behind the development of eSim is to provide an open
 source EDA solution for electronics and electrical engineers. The 
@@ -200,9 +198,23 @@ and MOSFET. \index{MOSFET}
 This module is indicated by the label 9 in \figref{blockd}.
 
 \subsection{NGHDL} \index{NGHDL} \label{sec:nghdl}
-NGHDL, a module for mixed mode circuit simulation is also integrated with eSim. 
-It uses ghdl for digital simulation and the mixed mode simulation happens through 
-NgSpice.
+NGHDL, a module for mixed signal circuit simulation, is also integrated with eSim.  It makes use of VHDL code.
+It uses ghdl for digital simulation and the mixed signal simulation happens through 
+Ngspice.
+
+\subsection{NgVeri} \index{NgVeri} \label{sec:NgVeri}
+NgVeri, a module for mixed signal circuit simulation, is also integrated with eSim. It makes use of Verilog/System Verilog/Transaction-Level Verilog  code.
+It uses SandPiper SaaS and Verilator for digital simulation and the mixed signal simulation happens through 
+Ngspice. 
+
+\subsection{Makerchip-App} \index{Makerchip-App} \label{sec:Makerchip-App}
+Makerchip is a cloud based browser application developed by Redwood EDA to do digital circuit design. One can simulate Verilog/SystemVerilog/Transaction-Level Verilog code in Makerchip. eSim is interfaced with Makerchip using a Python based application called Makerchip-App which launches the Makerchip IDE.
+
+\subsection{SandPiper SaaS} \index{SandPiper SaaS} \label{sec:Sandpiper-saas}
+Sandpiper-saas is a tool developed by Redwood EDA which converts Transaction Level Verilog code to SystemVerilog code. It is used by NgVeri so that it can get the System Verilog code which can be further passed to the Verilator.
+
+\subsection{Verilator} \index{Verilator} \label{sec:Verilator}
+Verilator is a Verilog/SystemVerilog simulator tool. It converts the Verilog/SystemVerilog code to C++ object files. These object files are linked with that of Ngspice thus enabling mixed signal simulation in eSim.
 
 \subsection{OpenModelica} \index{OpenModelica} \label{sec:openmodelica}
 OpenModelica (OM) is an open source modeling and simulation tool based on
diff --git a/chap_3.tex b/chap_3.tex
index 36c936a8..66d748fa 100644
--- a/chap_3.tex
+++ b/chap_3.tex
@@ -6,7 +6,7 @@
 \begin{enumerate}
 \item Download eSim installer from {\tt http://esim.fossee.in/downloads} to a local directory and unpack it. You can also unpack the  installer through the terminal. Open the terminal and navigate to the directory where the installer is located. Use the following command to unpack: \\
 \\
-\quad {\tt \$ unzip eSim-2.2\_pre-release.zip}
+\quad {\tt \$ unzip eSim-2.2.zip}
 \item To install eSim and other dependencies run the following command: \\
 \\
  \quad {\tt \$ cd eSim-2.2 \newline \$ chmod +x install-eSim.sh \newline \$ ./install-eSim.sh --install}
@@ -18,11 +18,13 @@
 \end{enumerate}
 
 
-%\section {eSim installation in Windows OS}
-%\begin{enumerate}
-%\item Download \textbf{eSim-2.2\_install.exe} from  {\tt %https://esim.fossee.in/downloads}
-%\item Disable the antivirus (if any). Now, double click on the exe file to start the installation process. If a window appears, click {\tt Yes} to complete the installation.
-%\item By default eSim will be installed in C drive, under an auto-generated FOSSEE Folder. Note that installation directory can neither be in "Program Files" nor contain spaces in its path.
-%\item \textbf{eSim} icon will be created on desktop. You can double click on the {\tt eSim} icon created on the Desktop after installation.
-%\end{enumerate}
+\section {eSim installation in Windows OS}
+\begin{enumerate}
+\item Download \textbf{eSim-2.2\_installer.exe} from  {\tt https://esim.fossee.in/downloads}
+\item Disable the antivirus (if any). 
+\item If MinGW and/or MSYS is already installed in your machine, then remove it from the PATH environment variable as it may interfere with eSim and might not work as intended.
+\item Now, double click on the exe file to start the installation process. If a window appears, click {\tt Yes} to complete the installation.
+\item By default eSim will be installed in C drive, under an auto-generated FOSSEE Folder. Note that installation directory can neither be in "Program Files" nor can contain any spaces in its path.
+\item \textbf{eSim} icon will be created on desktop. You can double click on the {\tt eSim} icon created on the Desktop after installation.
+\end{enumerate}
 
diff --git a/chap_4.tex b/chap_4.tex
index aded8ea2..adac6cc2 100644
--- a/chap_4.tex
+++ b/chap_4.tex
@@ -197,7 +197,7 @@ Builder} tool will allow one to edit or create a subcircuit. To know
 how to make a subcircuit, refer to \chapref{chap8}.
 
 \subsubsection {NGHDL}
-NGHDL is an add on to eSim for mixed mode circuit simulation. By using the foreign language interface of GHDL, NGHDL communicates with Ngspice and accomplishes mixed-mode simulation. Using NGHDL, user can create custom digital model using VHDL language. From simple multiplexers, counters to microcontrollers and ASICs, any custom component in the digital domain can be realized using the NGHDL tool. The created digital model can be used in either mixed-mode circuit or a standalone circuit operating in digital domain. NGHDL gives user the liberty to edit existing models supplied with eSim per their needs, either for experimenting new ideas or to change the model per their specific requirement.
+NGHDL is an add on to eSim for mixed signal circuit simulation. By using the foreign language interface of GHDL, NGHDL communicates with Ngspice and accomplishes mixed signal simulation. Using NGHDL, user can create custom digital model using VHDL language. From simple multiplexers, counters to microcontrollers and ASICs, any custom component in the digital domain can be realized using the NGHDL tool. The created digital model can be used in either mixed signal circuit or a standalone circuit operating in digital domain. NGHDL gives user the liberty to edit existing models supplied with eSim per their needs, either for experimenting new ideas or to change the model per their specific requirement.
 
 \subsubsection {Modelica Converter}
 OpenModelica (OM) is an open source modeling and simulation tool based on
diff --git a/chap_6.tex b/chap_6.tex
index 073670a6..948cfe27 100644
--- a/chap_6.tex
+++ b/chap_6.tex
@@ -237,8 +237,8 @@ The component libraries for components like DAC, ADC, transformer etc. which are
 Spice based simulators include a feature which allows accurate modeling of semiconductor devices such as diodes, transistors etc. Model libraries holds these features to define models for devices such as diodes, MOSFET, BJT, JFET, IGBT, Magnetic core etc.
 
 The fields in this tab are added for each such device in the circuit and the corresponding model library is added. In the example of bridge rectifier as shown in \figref{bridgerectifier} for four diodes library files are added as in \figref{devicemodel}. Location for these libraries is as following : \\
-../library/deviceModelLibrary/Diode/ if you are using version 2.0 and above \\
-../src/deviceModelLibrary/Diode/ if you are using versions lower than 2.0
+library/deviceModelLibrary/Diode/ if you are using version 2.0 and above \\
+src/deviceModelLibrary/Diode/ if you are using versions lower than 2.0
 
 \begin{figure}[h]
 \centering
@@ -254,7 +254,7 @@ The fields in this tab are added for each such device in the circuit and the cor
 \subsection{Sub Circuit}
 Subcircuit is a way to implement hierarchical modeling.  Once a subcircuit for a compo-
 nent is created, it can be used in other circuits. \\
-In the KiCadToNgspice conversion of example 7805VoltageRegulator, where a bridge rectifier is further connected to a voltage regulator LM7805, a subcircuit of this 7805 IC is used. These are located in library/Subcircuitlibrary if you are using version 2.0 and above and in src/SubcircuitLibrary if you are using versions lower than 2.0. The association is done as shown in \figref{7805}.
+In the KiCadToNgspice conversion of example 7805VoltageRegulator, where a bridge rectifier is further connected to a voltage regulator LM7805, a subcircuit of this 7805 IC is used. These are located in library/SubcircuitLibrary if you are using version 2.0 and above and in src/SubcircuitLibrary if you are using versions lower than 2.0. The association is done as shown in \figref{7805}.
 \begin{figure}
 \centering
 \includegraphics[width=\lgfig]{7805.png}
diff --git a/cover_page.tex b/cover_page.tex
index 71d87e88..c725cbe2 100644
--- a/cover_page.tex
+++ b/cover_page.tex
@@ -7,7 +7,7 @@
 \vfill
 \LARGE \textbf{eSim User Manual} \\ 
 %\vfill
-\small{Version 2.2 (\textbf{\textit{Pre-release}})}\\
+\small{Version 2.2}\\
 \vspace{1cm}
 \textbf{Prepared By:}\\
 eSim Team\\
@@ -17,7 +17,7 @@ FOSSEE, IIT Bombay
 \includegraphics[width=0.2\linewidth]{iitblogo.png} \\
 Indian Institute of Technology Bombay \\ [2mm]
 {\LARGE \byncnd} \\ [1mm]
-January 2022
+February 2022
 \end{center}
 % \clearpage