diff options
Diffstat (limited to 'InvertingAmplifier')
25 files changed, 1712 insertions, 0 deletions
diff --git a/InvertingAmplifier/D.lib b/InvertingAmplifier/D.lib new file mode 100755 index 0000000..ef18bb5 --- /dev/null +++ b/InvertingAmplifier/D.lib @@ -0,0 +1,20 @@ +.MODEL D1N750 D( ++ Vj=.75 ++ Nbvl=14.976 ++ Cjo=175p ++ Rs=.25 ++ Isr=1.859n ++ Eg=1.11 ++ M=.5516 ++ Nbv=1.6989 ++ N=1 ++ Tbv1=-21.277u ++ Bv=8.1 ++ Fc=.5 ++ Ikf=0 ++ Nr=2 ++ Ibv=20.245m ++ Is=880.5E-18 ++ Xti=3 ++ Ibvl=1.9556m +)
\ No newline at end of file diff --git a/InvertingAmplifier/InvertingAmplifier-cache.lib b/InvertingAmplifier/InvertingAmplifier-cache.lib new file mode 100644 index 0000000..d481b43 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier-cache.lib @@ -0,0 +1,82 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "R" 50 50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# UA741 +# +DEF UA741 X 0 40 Y Y 1 F N +F0 "X" 150 0 60 H V C CNN +F1 "UA741" 250 -150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 0 150 0 -150 350 0 0 150 N +X + 1 -200 100 200 R 50 50 1 1 I +X - 2 -200 -100 200 R 50 50 1 1 I +X ~ 3 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# plot_v1 +# +DEF plot_v1 U 0 40 Y Y 1 F N +F0 "U" 0 500 60 H V C CNN +F1 "plot_v1" 200 350 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 500 100 0 1 0 N +X ~ ~ 0 200 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# sine +# +DEF sine v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "sine" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 +A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/InvertingAmplifier/InvertingAmplifier.bak b/InvertingAmplifier/InvertingAmplifier.bak new file mode 100644 index 0000000..9b42699 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier.bak @@ -0,0 +1,184 @@ +EESchema Schematic File Version 2 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L UA741 X1 +U 1 1 56A88D40 +P 6000 3400 +F 0 "X1" H 6150 3400 60 0000 C CNN +F 1 "UA741" H 6250 3250 60 0000 C CNN +F 2 "" H 6000 3400 60 0000 C CNN +F 3 "" H 6000 3400 60 0000 C CNN + 1 6000 3400 + 1 0 0 1 +$EndComp +$Comp +L R R1 +U 1 1 56A88DB5 +P 5250 3350 +F 0 "R1" H 5300 3480 50 0000 C CNN +F 1 "1k" H 5300 3400 50 0000 C CNN +F 2 "" H 5300 3330 30 0000 C CNN +F 3 "" V 5300 3400 30 0000 C CNN + 1 5250 3350 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 56A88DD8 +P 6100 2850 +F 0 "R2" H 6150 2980 50 0000 C CNN +F 1 "5k" H 6150 2900 50 0000 C CNN +F 2 "" H 6150 2830 30 0000 C CNN +F 3 "" V 6150 2900 30 0000 C CNN + 1 6100 2850 + 1 0 0 -1 +$EndComp +$Comp +L sine v1 +U 1 1 56A88E30 +P 4850 3750 +F 0 "v1" H 4650 3850 60 0000 C CNN +F 1 "sine" H 4650 3700 60 0000 C CNN +F 2 "R1" H 4550 3750 60 0000 C CNN +F 3 "" H 4850 3750 60 0000 C CNN + 1 4850 3750 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 56A88EC6 +P 5600 3850 +F 0 "#PWR01" H 5600 3600 50 0001 C CNN +F 1 "GND" H 5600 3700 50 0000 C CNN +F 2 "" H 5600 3850 50 0000 C CNN +F 3 "" H 5600 3850 50 0000 C CNN + 1 5600 3850 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 56A88F10 +P 4850 4200 +F 0 "#PWR02" H 4850 3950 50 0001 C CNN +F 1 "GND" H 4850 4050 50 0000 C CNN +F 2 "" H 4850 4200 50 0000 C CNN +F 3 "" H 4850 4200 50 0000 C CNN + 1 4850 4200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4850 3300 5150 3300 +Wire Wire Line + 5450 3300 5800 3300 +Wire Wire Line + 6000 2800 5650 2800 +Wire Wire Line + 5650 2800 5650 3300 +Connection ~ 5650 3300 +Wire Wire Line + 6550 3400 6900 3400 +Wire Wire Line + 6700 3400 6700 2800 +Wire Wire Line + 6700 2800 6300 2800 +Text GLabel 4900 3150 0 60 Input ~ 0 +in +Wire Wire Line + 4900 3150 4950 3150 +Wire Wire Line + 4950 3150 4950 3300 +Connection ~ 4950 3300 +Connection ~ 6700 3400 +$Comp +L R R3 +U 1 1 56A890CA +P 7000 3450 +F 0 "R3" H 7050 3580 50 0000 C CNN +F 1 "1k" H 7050 3500 50 0000 C CNN +F 2 "" H 7050 3430 30 0000 C CNN +F 3 "" V 7050 3500 30 0000 C CNN + 1 7000 3450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 56A89129 +P 7200 3400 +F 0 "#PWR03" H 7200 3150 50 0001 C CNN +F 1 "GND" H 7200 3250 50 0000 C CNN +F 2 "" H 7200 3400 50 0000 C CNN +F 3 "" H 7200 3400 50 0000 C CNN + 1 7200 3400 + 1 0 0 -1 +$EndComp +Text GLabel 6850 3250 1 60 Input ~ 0 +out +Wire Wire Line + 6850 3250 6850 3400 +Connection ~ 6850 3400 +$Comp +L R R4 +U 1 1 56A891BE +P 5550 3650 +F 0 "R4" H 5600 3780 50 0000 C CNN +F 1 "1k" H 5600 3700 50 0000 C CNN +F 2 "" H 5600 3630 30 0000 C CNN +F 3 "" V 5600 3700 30 0000 C CNN + 1 5550 3650 + 0 1 1 0 +$EndComp +Wire Wire Line + 5800 3500 5600 3500 +Wire Wire Line + 5600 3500 5600 3550 +$EndSCHEMATC diff --git a/InvertingAmplifier/InvertingAmplifier.cir b/InvertingAmplifier/InvertingAmplifier.cir new file mode 100644 index 0000000..9ae9208 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier.cir @@ -0,0 +1,18 @@ +* /home/fossee/UpdatedExamples/InvertingAmplifier/InvertingAmplifier.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar 3 22:37:06 2016 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 Net-_R4-Pad1_ Net-_R1-Pad2_ out UA741 +R1 in Net-_R1-Pad2_ 1k +R2 Net-_R1-Pad2_ out 5k +v1 in GND sine +R3 out GND 1k +R4 Net-_R4-Pad1_ GND 1k +U1 in plot_v1 +U2 out plot_v1 + +.end diff --git a/InvertingAmplifier/InvertingAmplifier.cir.out b/InvertingAmplifier/InvertingAmplifier.cir.out new file mode 100644 index 0000000..0437c97 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier.cir.out @@ -0,0 +1,22 @@ +* /home/fossee/updatedexamples/invertingamplifier/invertingamplifier.cir + +.include ua741.sub +x1 net-_r4-pad1_ net-_r1-pad2_ out ua741 +r1 in net-_r1-pad2_ 1k +r2 net-_r1-pad2_ out 5k +v1 in gnd sine(0 2 50 0 0) +r3 out gnd 1k +r4 net-_r4-pad1_ gnd 1k +* u1 in plot_v1 +* u2 out plot_v1 +.tran 10e-03 100e-03 0e-03 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +plot v(in) +plot v(out) +.endc +.end diff --git a/InvertingAmplifier/InvertingAmplifier.pro b/InvertingAmplifier/InvertingAmplifier.pro new file mode 100644 index 0000000..575fa78 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier.pro @@ -0,0 +1,71 @@ +update=Mon Feb 29 20:28:17 2016 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=eSim_Analog +LibName2=eSim_Devices +LibName3=eSim_Digital +LibName4=eSim_Hybrid +LibName5=eSim_Miscellaneous +LibName6=eSim_Plot +LibName7=eSim_Power +LibName8=eSim_Sources +LibName9=eSim_Subckt +LibName10=eSim_User +LibName11=adc-dac +LibName12=memory +LibName13=xilinx +LibName14=microcontrollers +LibName15=dsp +LibName16=microchip +LibName17=analog_switches +LibName18=motorola +LibName19=texas +LibName20=intel +LibName21=audio +LibName22=interface +LibName23=digital-audio +LibName24=philips +LibName25=display +LibName26=cypress +LibName27=siliconi +LibName28=opto +LibName29=atmel +LibName30=contrib +LibName31=power +LibName32=device +LibName33=transistors +LibName34=conn +LibName35=linear +LibName36=regul +LibName37=74xx +LibName38=cmos4000 diff --git a/InvertingAmplifier/InvertingAmplifier.proj b/InvertingAmplifier/InvertingAmplifier.proj new file mode 100644 index 0000000..c78c533 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier.proj @@ -0,0 +1 @@ +schematicFile InvertingAmplifier.sch diff --git a/InvertingAmplifier/InvertingAmplifier.sch b/InvertingAmplifier/InvertingAmplifier.sch new file mode 100644 index 0000000..8eb7ed7 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier.sch @@ -0,0 +1,212 @@ +EESchema Schematic File Version 2 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Plot +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:InvertingAmplifier-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L UA741 X1 +U 1 1 56A88D40 +P 6000 3400 +F 0 "X1" H 6150 3400 60 0000 C CNN +F 1 "UA741" H 6250 3250 60 0000 C CNN +F 2 "" H 6000 3400 60 0000 C CNN +F 3 "" H 6000 3400 60 0000 C CNN + 1 6000 3400 + 1 0 0 1 +$EndComp +$Comp +L R R1 +U 1 1 56A88DB5 +P 5250 3350 +F 0 "R1" H 5300 3480 50 0000 C CNN +F 1 "1k" H 5300 3400 50 0000 C CNN +F 2 "" H 5300 3330 30 0000 C CNN +F 3 "" V 5300 3400 30 0000 C CNN + 1 5250 3350 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 56A88DD8 +P 6100 2850 +F 0 "R2" H 6150 2980 50 0000 C CNN +F 1 "5k" H 6150 2900 50 0000 C CNN +F 2 "" H 6150 2830 30 0000 C CNN +F 3 "" V 6150 2900 30 0000 C CNN + 1 6100 2850 + 1 0 0 -1 +$EndComp +$Comp +L sine v1 +U 1 1 56A88E30 +P 4850 3750 +F 0 "v1" H 4650 3850 60 0000 C CNN +F 1 "sine" H 4650 3700 60 0000 C CNN +F 2 "R1" H 4550 3750 60 0000 C CNN +F 3 "" H 4850 3750 60 0000 C CNN + 1 4850 3750 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 56A88EC6 +P 5600 3850 +F 0 "#PWR01" H 5600 3600 50 0001 C CNN +F 1 "GND" H 5600 3700 50 0000 C CNN +F 2 "" H 5600 3850 50 0000 C CNN +F 3 "" H 5600 3850 50 0000 C CNN + 1 5600 3850 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 56A88F10 +P 4850 4200 +F 0 "#PWR02" H 4850 3950 50 0001 C CNN +F 1 "GND" H 4850 4050 50 0000 C CNN +F 2 "" H 4850 4200 50 0000 C CNN +F 3 "" H 4850 4200 50 0000 C CNN + 1 4850 4200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4850 3300 5150 3300 +Wire Wire Line + 5450 3300 5800 3300 +Wire Wire Line + 6000 2800 5650 2800 +Wire Wire Line + 5650 2800 5650 3300 +Connection ~ 5650 3300 +Wire Wire Line + 6550 3400 6900 3400 +Wire Wire Line + 6700 3400 6700 2800 +Wire Wire Line + 6700 2800 6300 2800 +Text GLabel 4900 3150 0 60 Input ~ 0 +in +Wire Wire Line + 4900 3150 4950 3150 +Wire Wire Line + 4950 3100 4950 3300 +Connection ~ 4950 3300 +Connection ~ 6700 3400 +$Comp +L R R3 +U 1 1 56A890CA +P 7000 3450 +F 0 "R3" H 7050 3580 50 0000 C CNN +F 1 "1k" H 7050 3500 50 0000 C CNN +F 2 "" H 7050 3430 30 0000 C CNN +F 3 "" V 7050 3500 30 0000 C CNN + 1 7000 3450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 56A89129 +P 7200 3400 +F 0 "#PWR03" H 7200 3150 50 0001 C CNN +F 1 "GND" H 7200 3250 50 0000 C CNN +F 2 "" H 7200 3400 50 0000 C CNN +F 3 "" H 7200 3400 50 0000 C CNN + 1 7200 3400 + 1 0 0 -1 +$EndComp +Text GLabel 6950 3250 2 60 Input ~ 0 +out +Wire Wire Line + 6850 3150 6850 3400 +Connection ~ 6850 3400 +$Comp +L R R4 +U 1 1 56A891BE +P 5550 3650 +F 0 "R4" H 5600 3780 50 0000 C CNN +F 1 "1k" H 5600 3700 50 0000 C CNN +F 2 "" H 5600 3630 30 0000 C CNN +F 3 "" V 5600 3700 30 0000 C CNN + 1 5550 3650 + 0 1 1 0 +$EndComp +Wire Wire Line + 5800 3500 5600 3500 +Wire Wire Line + 5600 3500 5600 3550 +$Comp +L plot_v1 U1 +U 1 1 56D45D15 +P 4950 3300 +F 0 "U1" H 4950 3800 60 0000 C CNN +F 1 "plot_v1" H 5150 3650 60 0000 C CNN +F 2 "" H 4950 3300 60 0000 C CNN +F 3 "" H 4950 3300 60 0000 C CNN + 1 4950 3300 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U2 +U 1 1 56D45D99 +P 6850 3350 +F 0 "U2" H 6850 3850 60 0000 C CNN +F 1 "plot_v1" H 7050 3700 60 0000 C CNN +F 2 "" H 6850 3350 60 0000 C CNN +F 3 "" H 6850 3350 60 0000 C CNN + 1 6850 3350 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6950 3250 6850 3250 +Connection ~ 6850 3250 +Connection ~ 4950 3150 +$EndSCHEMATC diff --git a/InvertingAmplifier/InvertingAmplifier_Previous_Values.xml b/InvertingAmplifier/InvertingAmplifier_Previous_Values.xml new file mode 100644 index 0000000..8c7b2d9 --- /dev/null +++ b/InvertingAmplifier/InvertingAmplifier_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><v1 name="Source type">sine<field1 name="Offset Value">0</field1><field2 name="Amplitude">2</field2><field3 name="Frequency">50</field3><field4 name="Delay Time">0</field4><field5 name="Damping Factor">0</field5></v1></source><model /><devicemodel /><subcircuit><x1><field>/home/fossee/esim-updated/eSim/src/SubcircuitLibrary/ua741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/InvertingAmplifier/PowerDiode.lib b/InvertingAmplifier/PowerDiode.lib new file mode 100644 index 0000000..a2f61dc --- /dev/null +++ b/InvertingAmplifier/PowerDiode.lib @@ -0,0 +1,20 @@ +.MODEL PowerDiode D( ++ Vj=.75 ++ Nbvl=14.976 ++ Cjo=175p ++ Rs=.25 ++ Isr=1.859n ++ Eg=1.11 ++ M=.5516 ++ Nbv=1.6989 ++ N=1 ++ Tbv1=-21.277u ++ bv=1800 ++ Fc=.5 ++ Ikf=0 ++ Nr=2 ++ Ibv=20.245m ++ Is=2.2E-15 ++ Xti=3 ++ Ibvl=1.9556m +)
\ No newline at end of file diff --git a/InvertingAmplifier/analysis b/InvertingAmplifier/analysis new file mode 100644 index 0000000..660a46c --- /dev/null +++ b/InvertingAmplifier/analysis @@ -0,0 +1 @@ +.tran 10e-03 100e-03 0e-03
\ No newline at end of file diff --git a/InvertingAmplifier/plot_data_i.txt b/InvertingAmplifier/plot_data_i.txt new file mode 100644 index 0000000..5cc7727 --- /dev/null +++ b/InvertingAmplifier/plot_data_i.txt @@ -0,0 +1,68 @@ + * /home/fossee/updatedexamples/invertingamplifier/invertingamplifier.cir + Transient Analysis Thu Mar 3 22:37:21 2016 +-------------------------------------------------------------------------------- +Index time e.x1.ein1#branc e.x1.eout1#bran v1#branch +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 +1 1.000000e-05 1.217339e-04 4.196637e-05 -6.89253e-06 +2 1.454354e-05 1.053120e-04 5.852075e-05 -9.66530e-06 +3 2.363063e-05 1.150600e-04 9.312134e-05 -1.54239e-05 +4 4.180481e-05 1.015232e-04 1.611628e-04 -2.67753e-05 +5 7.815316e-05 1.174954e-04 2.987361e-04 -4.96906e-05 +6 1.508499e-04 1.000026e-04 5.720175e-04 -9.52518e-05 +7 2.962433e-04 1.178404e-04 1.119399e-03 -1.86466e-04 +8 5.870301e-04 9.799066e-05 2.204101e-03 -3.67265e-04 +9 1.168604e-03 1.116682e-04 4.311419e-03 -7.18470e-04 +10 2.331751e-03 7.322232e-05 8.028210e-03 -1.33796e-03 +11 4.331751e-03 3.411625e-05 1.173847e-02 -1.95637e-03 +12 6.331751e-03 -5.65335e-05 1.096369e-02 -1.82731e-03 +13 8.331751e-03 -8.69968e-05 6.002499e-03 -1.00048e-03 +14 1.033175e-02 -1.22903e-04 -1.25279e-03 2.086944e-04 +15 1.233175e-02 -7.31113e-05 -8.02821e-03 1.337961e-03 +16 1.433175e-02 -3.42275e-05 -1.17385e-02 1.956366e-03 +17 1.633175e-02 5.664505e-05 -1.09637e-02 1.827311e-03 +18 1.833175e-02 8.688500e-05 -6.00250e-03 1.000481e-03 +19 2.033175e-02 1.230152e-04 1.252799e-03 -2.08695e-04 +20 2.233175e-02 7.299903e-05 8.028202e-03 -1.33796e-03 +21 2.433175e-02 3.434000e-05 1.173848e-02 -1.95637e-03 +22 2.633175e-02 -5.67577e-05 1.096368e-02 -1.82731e-03 +23 2.833175e-02 -8.67721e-05 6.002507e-03 -1.00048e-03 +24 3.033175e-02 -1.23128e-04 -1.25280e-03 2.086955e-04 +25 3.233175e-02 -7.28856e-05 -8.02820e-03 1.337960e-03 +26 3.433175e-02 -3.44536e-05 -1.17385e-02 1.956367e-03 +27 3.633175e-02 5.687162e-05 -1.09637e-02 1.827310e-03 +28 3.833175e-02 8.665797e-05 -6.00251e-03 1.000482e-03 +29 4.033175e-02 1.232427e-04 1.252806e-03 -2.08696e-04 +30 4.233175e-02 7.277105e-05 8.028194e-03 -1.33796e-03 +31 4.433175e-02 3.456846e-05 1.173849e-02 -1.95637e-03 +32 4.633175e-02 -5.69867e-05 1.096367e-02 -1.82731e-03 +33 4.833175e-02 -8.65427e-05 6.002515e-03 -1.00048e-03 +34 5.033175e-02 -1.23358e-04 -1.25281e-03 2.086967e-04 +35 5.233175e-02 -7.26553e-05 -8.02819e-03 1.337959e-03 +36 5.433175e-02 -3.46845e-05 -1.17385e-02 1.956368e-03 +37 5.633175e-02 5.710294e-05 -1.09637e-02 1.827309e-03 +38 5.833175e-02 8.642616e-05 -6.00252e-03 1.000483e-03 +39 6.033175e-02 1.234750e-04 1.252815e-03 -2.08697e-04 +40 6.233175e-02 7.253828e-05 8.028186e-03 -1.33796e-03 +41 6.433175e-02 3.480172e-05 1.173850e-02 -1.95637e-03 +42 6.633175e-02 -5.72204e-05 1.096366e-02 -1.82731e-03 +43 6.833175e-02 -8.63084e-05 6.002523e-03 -1.00048e-03 +44 7.033175e-02 -1.23593e-04 -1.25282e-03 2.086979e-04 +45 7.233175e-02 -7.24201e-05 -8.02818e-03 1.337958e-03 +46 7.433175e-02 -3.49202e-05 -1.17385e-02 1.956370e-03 +47 7.633175e-02 5.733913e-05 -1.09637e-02 1.827308e-03 +48 7.833175e-02 8.618948e-05 -6.00253e-03 1.000484e-03 +49 8.033175e-02 1.237122e-04 1.252823e-03 -2.08698e-04 +50 8.233175e-02 7.230061e-05 8.028177e-03 -1.33796e-03 +51 8.433175e-02 3.503988e-05 1.173850e-02 -1.95637e-03 +52 8.633175e-02 -5.74591e-05 1.096366e-02 -1.82731e-03 +53 8.833175e-02 -8.60693e-05 6.002532e-03 -1.00048e-03 +54 9.033175e-02 -1.23833e-04 -1.25283e-03 2.086991e-04 + +Index time e.x1.ein1#branc e.x1.eout1#bran v1#branch +-------------------------------------------------------------------------------- +55 9.233175e-02 -7.21799e-05 -8.02817e-03 1.337956e-03 +56 9.433175e-02 -3.51608e-05 -1.17385e-02 1.956371e-03 +57 9.633175e-02 5.758029e-05 -1.09637e-02 1.827307e-03 +58 9.833175e-02 8.594782e-05 -6.00254e-03 1.000485e-03 +59 1.000000e-01 1.223918e-04 4.287971e-06 -6.12305e-07 diff --git a/InvertingAmplifier/plot_data_v.txt b/InvertingAmplifier/plot_data_v.txt new file mode 100644 index 0000000..4094575 --- /dev/null +++ b/InvertingAmplifier/plot_data_v.txt @@ -0,0 +1,206 @@ + * /home/fossee/updatedexamples/invertingamplifier/invertingamplifier.cir + Transient Analysis Thu Mar 3 22:37:21 2016 +-------------------------------------------------------------------------------- +Index time in net-_r1-pad2_ net-_r4-pad1_ +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 +1 1.000000e-05 6.283175e-03 -6.09356e-04 -3.04526e-07 +2 1.454354e-05 9.137947e-03 -5.27356e-04 -2.63546e-07 +3 2.363063e-05 1.484743e-02 -5.76435e-04 -2.88073e-07 +4 4.180481e-05 2.626598e-02 -5.09335e-04 -2.54540e-07 +5 7.815316e-05 4.910015e-02 -5.90487e-04 -2.95096e-07 +6 1.508499e-04 9.474630e-02 -5.05462e-04 -2.52605e-07 +7 2.962433e-04 1.858666e-01 -5.99671e-04 -2.99685e-07 +8 5.870301e-04 3.667547e-01 -5.10230e-04 -2.54987e-07 +9 1.168604e-03 7.178721e-01 -5.97803e-04 -2.98752e-07 +10 2.331751e-03 1.337522e+00 -4.39255e-04 -2.19518e-07 +11 4.331751e-03 1.956088e+00 -2.77345e-04 -1.38603e-07 +12 6.331751e-03 1.827495e+00 1.831727e-04 9.154056e-08 +13 8.331751e-03 1.000861e+00 3.806520e-04 1.902309e-07 +14 1.033175e-02 -2.08068e-01 6.262096e-04 3.129483e-07 +15 1.233175e-02 -1.33752e+00 4.386991e-04 2.192399e-07 +16 1.433175e-02 -1.95609e+00 2.779016e-04 1.388813e-07 +17 1.633175e-02 -1.82750e+00 -1.83731e-04 -9.18194e-08 +18 1.833175e-02 -1.00086e+00 -3.80093e-04 -1.89951e-07 +19 2.033175e-02 2.080682e-01 -6.26770e-04 -3.13228e-07 +20 2.233175e-02 1.337522e+00 -4.38138e-04 -2.18959e-07 +21 2.433175e-02 1.956088e+00 -2.78464e-04 -1.39162e-07 +22 2.633175e-02 1.827495e+00 1.842944e-04 9.210114e-08 +23 2.833175e-02 1.000861e+00 3.795279e-04 1.896691e-07 +24 3.033175e-02 -2.08068e-01 6.273360e-04 3.135113e-07 +25 3.233175e-02 -1.33752e+00 4.375704e-04 2.186759e-07 +26 3.433175e-02 -1.95609e+00 2.790327e-04 1.394466e-07 +27 3.633175e-02 -1.82750e+00 -1.84864e-04 -9.23858e-08 +28 3.833175e-02 -1.00086e+00 -3.78957e-04 -1.89384e-07 +29 4.033175e-02 2.080682e-01 -6.27908e-04 -3.13797e-07 +30 4.233175e-02 1.337522e+00 -4.36997e-04 -2.18389e-07 +31 4.433175e-02 1.956088e+00 -2.79607e-04 -1.39734e-07 +32 4.633175e-02 1.827495e+00 1.854397e-04 9.267351e-08 +33 4.833175e-02 1.000861e+00 3.783802e-04 1.890956e-07 +34 5.033175e-02 -2.08068e-01 6.284861e-04 3.140860e-07 +35 5.233175e-02 -1.33752e+00 4.364179e-04 2.180999e-07 +36 5.433175e-02 -1.95609e+00 2.801875e-04 1.400238e-07 +37 5.633175e-02 -1.82750e+00 -1.86021e-04 -9.29642e-08 +38 5.833175e-02 -1.00086e+00 -3.77797e-04 -1.88804e-07 +39 6.033175e-02 2.080682e-01 -6.29070e-04 -3.14378e-07 +40 6.233175e-02 1.337522e+00 -4.35833e-04 -2.17807e-07 +41 6.433175e-02 1.956088e+00 -2.80774e-04 -1.40317e-07 +42 6.633175e-02 1.827495e+00 1.866091e-04 9.325791e-08 +43 6.833175e-02 1.000861e+00 3.772084e-04 1.885099e-07 +44 7.033175e-02 -2.08068e-01 6.296604e-04 3.146728e-07 +45 7.233175e-02 -1.33752e+00 4.352412e-04 2.175118e-07 +46 7.433175e-02 -1.95609e+00 2.813667e-04 1.406130e-07 +47 7.633175e-02 -1.82750e+00 -1.87203e-04 -9.35547e-08 +48 7.833175e-02 -1.00086e+00 -3.76613e-04 -1.88213e-07 +49 8.033175e-02 2.080682e-01 -6.30257e-04 -3.14971e-07 +50 8.233175e-02 1.337522e+00 -4.34644e-04 -2.17213e-07 +51 8.433175e-02 1.956088e+00 -2.81966e-04 -1.40912e-07 +52 8.633175e-02 1.827495e+00 1.878030e-04 9.385460e-08 +53 8.833175e-02 1.000861e+00 3.760119e-04 1.879120e-07 +54 9.033175e-02 -2.08068e-01 6.308593e-04 3.152720e-07 + +Index time in net-_r1-pad2_ net-_r4-pad1_ +-------------------------------------------------------------------------------- +55 9.233175e-02 -1.33752e+00 4.340398e-04 2.169114e-07 +56 9.433175e-02 -1.95609e+00 2.825706e-04 1.412147e-07 +57 9.633175e-02 -1.82750e+00 -1.88409e-04 -9.41576e-08 +58 9.833175e-02 -1.00086e+00 -3.75404e-04 -1.87608e-07 +59 1.000000e-01 -2.44929e-15 -6.12305e-04 -3.05999e-07 + + * /home/fossee/updatedexamples/invertingamplifier/invertingamplifier.cir + Transient Analysis Thu Mar 3 22:37:21 2016 +-------------------------------------------------------------------------------- +Index time out x1.1 x1.2 +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 +1 1.000000e-05 -3.50735e-02 -3.82210e-02 -3.82210e-02 +2 1.454354e-05 -4.88552e-02 -5.32442e-02 -5.32442e-02 +3 2.363063e-05 -7.76972e-02 -8.46813e-02 -8.46813e-02 +4 4.180481e-05 -1.34387e-01 -1.46474e-01 -1.46474e-01 +5 7.815316e-05 -2.49045e-01 -2.71450e-01 -2.71450e-01 +6 1.508499e-04 -4.76766e-01 -5.19667e-01 -5.19667e-01 +7 2.962433e-04 -9.32932e-01 -1.01689e+00 -1.01689e+00 +8 5.870301e-04 -1.83684e+00 -2.00214e+00 -2.00214e+00 +9 1.168604e-03 -3.59295e+00 -3.91630e+00 -3.91630e+00 +10 2.331751e-03 -6.69025e+00 -7.29236e+00 -7.29236e+00 +11 4.331751e-03 -9.78211e+00 -1.06625e+01 -1.06625e+01 +12 6.331751e-03 -9.13638e+00 -9.95865e+00 -9.95865e+00 +13 8.331751e-03 -5.00202e+00 -5.45221e+00 -5.45221e+00 +14 1.033175e-02 1.044100e+00 1.138059e+00 1.138059e+00 +15 1.233175e-02 6.690245e+00 7.292360e+00 7.292360e+00 +16 1.433175e-02 9.782109e+00 1.066250e+01 1.066250e+01 +17 1.633175e-02 9.136372e+00 9.958649e+00 9.958649e+00 +18 1.833175e-02 5.002023e+00 5.452210e+00 5.452210e+00 +19 2.033175e-02 -1.04410e+00 -1.13806e+00 -1.13806e+00 +20 2.233175e-02 -6.69024e+00 -7.29236e+00 -7.29236e+00 +21 2.433175e-02 -9.78211e+00 -1.06625e+01 -1.06625e+01 +22 2.633175e-02 -9.13637e+00 -9.95864e+00 -9.95864e+00 +23 2.833175e-02 -5.00203e+00 -5.45221e+00 -5.45221e+00 +24 3.033175e-02 1.044107e+00 1.138067e+00 1.138067e+00 +25 3.233175e-02 6.690238e+00 7.292353e+00 7.292353e+00 +26 3.433175e-02 9.782116e+00 1.066250e+01 1.066250e+01 +27 3.633175e-02 9.136366e+00 9.958641e+00 9.958641e+00 +28 3.833175e-02 5.002029e+00 5.452218e+00 5.452218e+00 +29 4.033175e-02 -1.04411e+00 -1.13807e+00 -1.13807e+00 +30 4.233175e-02 -6.69023e+00 -7.29235e+00 -7.29235e+00 +31 4.433175e-02 -9.78212e+00 -1.06625e+01 -1.06625e+01 +32 4.633175e-02 -9.13636e+00 -9.95864e+00 -9.95864e+00 +33 4.833175e-02 -5.00203e+00 -5.45222e+00 -5.45222e+00 +34 5.033175e-02 1.044114e+00 1.138074e+00 1.138074e+00 +35 5.233175e-02 6.690231e+00 7.292345e+00 7.292345e+00 +36 5.433175e-02 9.782123e+00 1.066251e+01 1.066251e+01 +37 5.633175e-02 9.136359e+00 9.958634e+00 9.958634e+00 +38 5.833175e-02 5.002036e+00 5.452225e+00 5.452225e+00 +39 6.033175e-02 -1.04412e+00 -1.13808e+00 -1.13808e+00 +40 6.233175e-02 -6.69023e+00 -7.29234e+00 -7.29234e+00 +41 6.433175e-02 -9.78213e+00 -1.06625e+01 -1.06625e+01 +42 6.633175e-02 -9.13636e+00 -9.95863e+00 -9.95863e+00 +43 6.833175e-02 -5.00204e+00 -5.45223e+00 -5.45223e+00 +44 7.033175e-02 1.044121e+00 1.138082e+00 1.138082e+00 +45 7.233175e-02 6.690224e+00 7.292337e+00 7.292337e+00 +46 7.433175e-02 9.782130e+00 1.066252e+01 1.066252e+01 +47 7.633175e-02 9.136352e+00 9.958626e+00 9.958626e+00 +48 7.833175e-02 5.002043e+00 5.452233e+00 5.452233e+00 +49 8.033175e-02 -1.04412e+00 -1.13809e+00 -1.13809e+00 +50 8.233175e-02 -6.69022e+00 -7.29233e+00 -7.29233e+00 +51 8.433175e-02 -9.78213e+00 -1.06625e+01 -1.06625e+01 +52 8.633175e-02 -9.13635e+00 -9.95862e+00 -9.95862e+00 +53 8.833175e-02 -5.00205e+00 -5.45224e+00 -5.45224e+00 +54 9.033175e-02 1.044128e+00 1.138090e+00 1.138090e+00 + +Index time out x1.1 x1.2 +-------------------------------------------------------------------------------- +55 9.233175e-02 6.690217e+00 7.292330e+00 7.292330e+00 +56 9.433175e-02 9.782137e+00 1.066253e+01 1.066253e+01 +57 9.633175e-02 9.136344e+00 9.958618e+00 9.958618e+00 +58 9.833175e-02 5.002051e+00 5.452241e+00 5.452241e+00 +59 1.000000e-01 -3.67536e-03 -3.99696e-03 -3.99696e-03 + + * /home/fossee/updatedexamples/invertingamplifier/invertingamplifier.cir + Transient Analysis Thu Mar 3 22:37:21 2016 +-------------------------------------------------------------------------------- +Index time x1.4 +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 +1 1.000000e-05 -6.09052e+01 +2 1.454354e-05 -5.27093e+01 +3 2.363063e-05 -5.76147e+01 +4 4.180481e-05 -5.09081e+01 +5 7.815316e-05 -5.90192e+01 +6 1.508499e-04 -5.05210e+01 +7 2.962433e-04 -5.99371e+01 +8 5.870301e-04 -5.09975e+01 +9 1.168604e-03 -5.97504e+01 +10 2.331751e-03 -4.39035e+01 +11 4.331751e-03 -2.77206e+01 +12 6.331751e-03 1.830811e+01 +13 8.331751e-03 3.804618e+01 +14 1.033175e-02 6.258967e+01 +15 1.233175e-02 4.384799e+01 +16 1.433175e-02 2.777627e+01 +17 1.633175e-02 -1.83639e+01 +18 1.833175e-02 -3.79903e+01 +19 2.033175e-02 -6.26457e+01 +20 2.233175e-02 -4.37919e+01 +21 2.433175e-02 -2.78325e+01 +22 2.633175e-02 1.842023e+01 +23 2.833175e-02 3.793382e+01 +24 3.033175e-02 6.270225e+01 +25 3.233175e-02 4.373517e+01 +26 3.433175e-02 2.788932e+01 +27 3.633175e-02 -1.84772e+01 +28 3.833175e-02 -3.78768e+01 +29 4.033175e-02 -6.27594e+01 +30 4.233175e-02 -4.36779e+01 +31 4.433175e-02 -2.79467e+01 +32 4.633175e-02 1.853470e+01 +33 4.833175e-02 3.781911e+01 +34 5.033175e-02 6.281720e+01 +35 5.233175e-02 4.361998e+01 +36 5.433175e-02 2.800475e+01 +37 5.633175e-02 -1.85928e+01 +38 5.833175e-02 -3.77609e+01 +39 6.033175e-02 -6.28756e+01 +40 6.233175e-02 -4.35615e+01 +41 6.433175e-02 -2.80634e+01 +42 6.633175e-02 1.865158e+01 +43 6.833175e-02 3.770199e+01 +44 7.033175e-02 6.293457e+01 +45 7.233175e-02 4.350237e+01 +46 7.433175e-02 2.812261e+01 +47 7.633175e-02 -1.87109e+01 +48 7.833175e-02 -3.76425e+01 +49 8.033175e-02 -6.29942e+01 +50 8.233175e-02 -4.34426e+01 +51 8.433175e-02 -2.81825e+01 +52 8.633175e-02 1.877092e+01 +53 8.833175e-02 3.758240e+01 +54 9.033175e-02 6.305440e+01 + +Index time x1.4 +-------------------------------------------------------------------------------- +55 9.233175e-02 4.338228e+01 +56 9.433175e-02 2.824294e+01 +57 9.633175e-02 -1.88315e+01 +58 9.833175e-02 -3.75217e+01 +59 1.000000e-01 -6.11999e+01 diff --git a/InvertingAmplifier/scr.cir.out~ b/InvertingAmplifier/scr.cir.out~ new file mode 100644 index 0000000..d600f25 --- /dev/null +++ b/InvertingAmplifier/scr.cir.out~ @@ -0,0 +1,29 @@ +* /opt/esim/src/subcircuitlibrary/scr/scr.cir + +.include PowerDiode.lib +* u2 3 7 1 port +* f2 +d1 5 2 PowerDiode +c1 3 9 10u +* f1 +v1 8 4 dc 0 +v2 6 5 dc 0 +* u1 9 1 6 aswitch +r1 7 8 50 +r2 3 9 1 +Vf2 2 3 0 +f2 3 9 Vf2 100 +Vf1 4 3 0 +f1 3 9 Vf1 10 +a1 9 (1 6) u1 +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) +.tran 0e-12 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/InvertingAmplifier/scr.sub~ b/InvertingAmplifier/scr.sub~ new file mode 100644 index 0000000..0fdddbf --- /dev/null +++ b/InvertingAmplifier/scr.sub~ @@ -0,0 +1,23 @@ +* Subcircuit scr +.subckt scr 3 7 1 +* /opt/esim/src/subcircuitlibrary/scr/scr.cir +.include PowerDiode.lib +* f2 +d1 5 2 PowerDiode +c1 3 9 10u +* f1 +v1 8 4 dc 0 +v2 6 5 dc 0 +* u1 9 1 6 aswitch +r1 7 8 50 +r2 3 9 1 +Vf2 2 3 0 +f2 3 9 Vf2 100 +Vf1 4 3 0 +f1 3 9 Vf1 10 +a1 9 [1 6 ] u1 +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) +* Control Statements + +.ends scr
\ No newline at end of file diff --git a/InvertingAmplifier/ua741-cache.bak b/InvertingAmplifier/ua741-cache.bak new file mode 100644 index 0000000..eaad34a --- /dev/null +++ b/InvertingAmplifier/ua741-cache.bak @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 I +X ~ 2 250 0 100 L 30 30 2 1 I +X ~ 3 250 0 100 L 30 30 3 1 I +X ~ 4 250 0 100 L 30 30 4 1 I +X ~ 5 250 0 100 L 30 30 5 1 I +X ~ 6 250 0 100 L 30 30 6 1 I +X ~ 7 250 0 100 L 30 30 7 1 I +X ~ 8 250 0 100 L 30 30 8 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/InvertingAmplifier/ua741-cache.lib b/InvertingAmplifier/ua741-cache.lib new file mode 100644 index 0000000..9114d34 --- /dev/null +++ b/InvertingAmplifier/ua741-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Saturday 17 November 2012 08:10:48 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 I +X ~ 2 250 0 100 L 30 30 2 1 I +X ~ 3 250 0 100 L 30 30 3 1 I +X ~ 4 250 0 100 L 30 30 4 1 I +X ~ 5 250 0 100 L 30 30 5 1 I +X ~ 6 250 0 100 L 30 30 6 1 I +X ~ 7 250 0 100 L 30 30 7 1 I +X ~ 8 250 0 100 L 30 30 8 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/InvertingAmplifier/ua741.bak b/InvertingAmplifier/ua741.bak new file mode 100644 index 0000000..6be9280 --- /dev/null +++ b/InvertingAmplifier/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/InvertingAmplifier/ua741.cir b/InvertingAmplifier/ua741.cir new file mode 100644 index 0000000..de79742 --- /dev/null +++ b/InvertingAmplifier/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/InvertingAmplifier/ua741.cir.ckt b/InvertingAmplifier/ua741.cir.ckt new file mode 100644 index 0000000..3661a9a --- /dev/null +++ b/InvertingAmplifier/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/InvertingAmplifier/ua741.cir.out b/InvertingAmplifier/ua741.cir.out new file mode 100644 index 0000000..72e6851 --- /dev/null +++ b/InvertingAmplifier/ua741.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +* u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 +.ac lin 0 0Hz 0Hz + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/InvertingAmplifier/ua741.pro b/InvertingAmplifier/ua741.pro new file mode 100644 index 0000000..5dbb81a --- /dev/null +++ b/InvertingAmplifier/ua741.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:14:06 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/InvertingAmplifier/ua741.sch b/InvertingAmplifier/ua741.sch new file mode 100644 index 0000000..7dfc5e1 --- /dev/null +++ b/InvertingAmplifier/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/InvertingAmplifier/ua741.sub b/InvertingAmplifier/ua741.sub new file mode 100644 index 0000000..ad26c00 --- /dev/null +++ b/InvertingAmplifier/ua741.sub @@ -0,0 +1,12 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 +* Control Statements + +.ends ua741
\ No newline at end of file diff --git a/InvertingAmplifier/ua741_Previous_Values.xml b/InvertingAmplifier/ua741_Previous_Values.xml new file mode 100644 index 0000000..9c7bb53 --- /dev/null +++ b/InvertingAmplifier/ua741_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file |