From 4df2fcdb711f02b08dbc8cea88b39d64a79b17aa Mon Sep 17 00:00:00 2001
From: sashi20
Date: Thu, 23 Apr 2020 17:03:58 +0530
Subject: first commit

---
 4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt | 8 ++++++++
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 create mode 100755 4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt

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diff --git a/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt b/4_Bit_Synchronous_Up-Counter_By_Dr_Maheswari_R/README.txt
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+About the Circuit Simulation
+
+Title Of The Circuit Simulation Project: 4 Bit Synchronous Up-Counter
+Proposar Name: Dr Maheswari R
+University: Vit Chennai
+
+
+eSim Circuit Simulation Project By FOSSEE, IIT Bombay
-- 
cgit