EESchema Schematic File Version 4
LIBS:high pass filter with opamp-cache
EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L pspice:VSOURCE V1
U 1 1 5B0C3012
P 3050 4100
F 0 "V1" H 3278 4146 50  0000 L CNN
F 1 "VSOURCE" H 3278 4055 50  0000 L CNN
F 2 "" H 3050 4100 50  0001 C CNN
F 3 "" H 3050 4100 50  0001 C CNN
F 4 "V" H 3050 4100 50  0001 C CNN "Spice_Primitive"
F 5 "ac 5 0" H 3050 4100 50  0001 C CNN "Spice_Model"
F 6 "Y" H 3050 4100 50  0001 C CNN "Spice_Netlist_Enabled"
	1    3050 4100
	1    0    0    -1  
$EndComp
$Comp
L Device:C C1
U 1 1 5B0C32D3
P 3700 3700
F 0 "C1" V 3448 3700 50  0000 C CNN
F 1 "10n" V 3539 3700 50  0000 C CNN
F 2 "" H 3738 3550 50  0001 C CNN
F 3 "~" H 3700 3700 50  0001 C CNN
	1    3700 3700
	0    1    1    0   
$EndComp
$Comp
L Device:R R1
U 1 1 5B0C3340
P 4000 4100
F 0 "R1" H 4070 4146 50  0000 L CNN
F 1 "1k" H 4070 4055 50  0000 L CNN
F 2 "" V 3930 4100 50  0001 C CNN
F 3 "~" H 4000 4100 50  0001 C CNN
	1    4000 4100
	1    0    0    -1  
$EndComp
$Comp
L power:GND #PWR02
U 1 1 5B0C33C3
P 4000 4650
F 0 "#PWR02" H 4000 4400 50  0001 C CNN
F 1 "GND" H 4005 4477 50  0000 C CNN
F 2 "" H 4000 4650 50  0001 C CNN
F 3 "" H 4000 4650 50  0001 C CNN
	1    4000 4650
	1    0    0    -1  
$EndComp
Wire Wire Line
	3050 3800 3050 3700
Wire Wire Line
	3050 3700 3550 3700
Wire Wire Line
	3850 3700 4000 3700
Wire Wire Line
	4000 3950 4000 3700
Connection ~ 4000 3700
Wire Wire Line
	4000 3700 5250 3700
Wire Wire Line
	4000 4650 4000 4250
$Comp
L power:GND #PWR01
U 1 1 5B0C3470
P 3050 4750
F 0 "#PWR01" H 3050 4500 50  0001 C CNN
F 1 "GND" H 3055 4577 50  0000 C CNN
F 2 "" H 3050 4750 50  0001 C CNN
F 3 "" H 3050 4750 50  0001 C CNN
	1    3050 4750
	1    0    0    -1  
$EndComp
Wire Wire Line
	3050 4750 3050 4400
$Comp
L Device:R R3
U 1 1 5B0C34C9
P 6200 2950
F 0 "R3" V 5993 2950 50  0000 C CNN
F 1 "9k" V 6084 2950 50  0000 C CNN
F 2 "" V 6130 2950 50  0001 C CNN
F 3 "~" H 6200 2950 50  0001 C CNN
	1    6200 2950
	0    1    1    0   
$EndComp
$Comp
L Device:R R2
U 1 1 5B0C352B
P 4600 3100
F 0 "R2" V 4393 3100 50  0000 C CNN
F 1 "3k" V 4484 3100 50  0000 C CNN
F 2 "" V 4530 3100 50  0001 C CNN
F 3 "~" H 4600 3100 50  0001 C CNN
	1    4600 3100
	0    1    1    0   
$EndComp
$Comp
L power:GND #PWR03
U 1 1 5B0C35A7
P 4400 3300
F 0 "#PWR03" H 4400 3050 50  0001 C CNN
F 1 "GND" H 4405 3127 50  0000 C CNN
F 2 "" H 4400 3300 50  0001 C CNN
F 3 "" H 4400 3300 50  0001 C CNN
	1    4400 3300
	1    0    0    -1  
$EndComp
Wire Wire Line
	5850 3600 6550 3600
Wire Wire Line
	6550 3600 6550 2950
Wire Wire Line
	6550 2950 6350 2950
Wire Wire Line
	6050 2950 5100 2950
Wire Wire Line
	5100 2950 5100 3100
Wire Wire Line
	5100 3500 5250 3500
Wire Wire Line
	4750 3100 5100 3100
Connection ~ 5100 3100
Wire Wire Line
	5100 3100 5100 3500
Wire Wire Line
	4450 3100 4400 3100
Wire Wire Line
	4400 3100 4400 3300
$Comp
L power:VSS #PWR05
U 1 1 5B0C38A4
P 6000 3250
F 0 "#PWR05" H 6000 3100 50  0001 C CNN
F 1 "VSS" H 6017 3423 50  0000 C CNN
F 2 "" H 6000 3250 50  0001 C CNN
F 3 "" H 6000 3250 50  0001 C CNN
	1    6000 3250
	1    0    0    -1  
$EndComp
$Comp
L power:VDD #PWR04
U 1 1 5B0C3925
P 5850 4000
F 0 "#PWR04" H 5850 3850 50  0001 C CNN
F 1 "VDD" H 5867 4173 50  0000 C CNN
F 2 "" H 5850 4000 50  0001 C CNN
F 3 "" H 5850 4000 50  0001 C CNN
	1    5850 4000
	1    0    0    -1  
$EndComp
Wire Wire Line
	6000 3300 6000 3250
Wire Wire Line
	5450 4000 5450 3900
Wire Wire Line
	6000 3300 5450 3300
Wire Wire Line
	5450 4000 5850 4000
$Comp
L pspice:VSOURCE V2
U 1 1 5B0C4695
P 8500 3000
F 0 "V2" H 8728 3046 50  0000 L CNN
F 1 "VSOURCE" H 8728 2955 50  0000 L CNN
F 2 "" H 8500 3000 50  0001 C CNN
F 3 "" H 8500 3000 50  0001 C CNN
F 4 "V" H 8500 3000 50  0001 C CNN "Spice_Primitive"
F 5 "dc 15" H 8500 3000 50  0001 C CNN "Spice_Model"
F 6 "Y" H 8500 3000 50  0001 C CNN "Spice_Netlist_Enabled"
	1    8500 3000
	1    0    0    -1  
$EndComp
$Comp
L pspice:VSOURCE V3
U 1 1 5B0C46DE
P 8500 3950
F 0 "V3" H 8728 3996 50  0000 L CNN
F 1 "VSOURCE" H 8728 3905 50  0000 L CNN
F 2 "" H 8500 3950 50  0001 C CNN
F 3 "" H 8500 3950 50  0001 C CNN
F 4 "V" H 8500 3950 50  0001 C CNN "Spice_Primitive"
F 5 "dc 15" H 8500 3950 50  0001 C CNN "Spice_Model"
F 6 "Y" H 8500 3950 50  0001 C CNN "Spice_Netlist_Enabled"
	1    8500 3950
	1    0    0    -1  
$EndComp
Wire Wire Line
	8500 3650 8500 3450
$Comp
L power:GND #PWR06
U 1 1 5B0C4942
P 7700 3550
F 0 "#PWR06" H 7700 3300 50  0001 C CNN
F 1 "GND" H 7705 3377 50  0000 C CNN
F 2 "" H 7700 3550 50  0001 C CNN
F 3 "" H 7700 3550 50  0001 C CNN
	1    7700 3550
	1    0    0    -1  
$EndComp
Wire Wire Line
	7700 3550 7700 3450
Wire Wire Line
	7700 3450 8500 3450
Connection ~ 8500 3450
Wire Wire Line
	8500 3450 8500 3300
$Comp
L power:VDD #PWR07
U 1 1 5B0C4BE8
P 8500 2550
F 0 "#PWR07" H 8500 2400 50  0001 C CNN
F 1 "VDD" H 8517 2723 50  0000 C CNN
F 2 "" H 8500 2550 50  0001 C CNN
F 3 "" H 8500 2550 50  0001 C CNN
	1    8500 2550
	1    0    0    -1  
$EndComp
$Comp
L power:VSS #PWR08
U 1 1 5B0C4C77
P 8700 4550
F 0 "#PWR08" H 8700 4400 50  0001 C CNN
F 1 "VSS" H 8717 4723 50  0000 C CNN
F 2 "" H 8700 4550 50  0001 C CNN
F 3 "" H 8700 4550 50  0001 C CNN
	1    8700 4550
	1    0    0    -1  
$EndComp
Wire Wire Line
	8500 2700 8500 2550
Wire Wire Line
	8500 4250 8500 4550
Wire Wire Line
	8500 4550 8700 4550
$Comp
L Amplifier_Operational:AD8620 U1
U 1 1 5B0C5383
P 5550 3600
F 0 "U1" H 5891 3646 50  0000 L CNN
F 1 "AD8620" H 5891 3555 50  0000 L CNN
F 2 "" H 5550 3600 50  0001 C CNN
F 3 "http://www.analog.com/media/en/technical-documentation/data-sheets/AD8610_8620.pdf" H 5550 3600 50  0001 C CNN
	1    5550 3600
	1    0    0    -1  
$EndComp
Text GLabel 6850 3850 0    50   Output ~ 0
out
Wire Wire Line
	6850 3850 6950 3850
Wire Wire Line
	6950 3850 6950 3600
Wire Wire Line
	6950 3600 6550 3600
Connection ~ 6550 3600
$EndSCHEMATC